arm64: dts: qcom: db845c: add Low speed expansion i2c and spi nodes

This patch adds support UART0, I2C0, I2C1 and SPI0 available
on Low Speed expansion connector.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200305145344.14670-5-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index 6e60e81f8db7e6bc093beabeb3a33355b0c8fc81..8fc1766aa8b9184cd13db973a96eb50125728863 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -359,6 +359,18 @@
        };
 };
 
+&i2c11 {
+       /* On Low speed expansion */
+       label = "LS-I2C1";
+       status = "okay";
+};
+
+&i2c14 {
+       /* On Low speed expansion */
+       label = "LS-I2C0";
+       status = "okay";
+};
+
 &mss_pil {
        status = "okay";
        firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
@@ -438,6 +450,12 @@
        cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
 };
 
+&spi2 {
+       /* On Low speed expansion */
+       label = "LS-SPI0";
+       status = "okay";
+};
+
 &tlmm {
        pcie0_default_state: pcie0-default {
                clkreq {
@@ -537,6 +555,11 @@
        };
 };
 
+&uart3 {
+       label = "LS-UART0";
+       status = "disabled";
+};
+
 &uart6 {
        status = "okay";
 
@@ -552,6 +575,7 @@
 };
 
 &uart9 {
+       label = "LS-UART1";
        status = "okay";
 };
 
@@ -637,6 +661,16 @@
 };
 
 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
+&qup_spi2_default {
+       drive-strength = <16>;
+};
+
+&qup_uart3_default{
+       pinmux {
+               pins = "gpio41", "gpio42", "gpio43", "gpio44";
+               function = "qup3";
+       };
+};
 
 &qup_uart6_default {
        pinmux {