void ramips_intc_irq_init(unsigned intc_base, unsigned irq, unsigned irq_base);
u32 ramips_intc_get_status(void);
+void ramips_soc_prom_init(void);
void ramips_soc_setup(void);
void ramips_early_serial_setup(int line, unsigned base, unsigned freq,
unsigned irq);
#include <linux/init.h>
#include <linux/io.h>
-void rt288x_detect_sys_type(void);
-
#define RT288X_CPU_IRQ_BASE 0
#define RT288X_INTC_IRQ_BASE 8
#define RT288X_INTC_IRQ_COUNT 32
#include <linux/init.h>
#include <linux/io.h>
-void rt305x_detect_sys_type(void);
-
#define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
#include <linux/init.h>
#include <linux/io.h>
-void rt3883_detect_sys_type(void);
-
#define RT3883_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RT3883_MEM_SIZE_MAX (256 * 1024 * 1024)
char **envp;
char **argv;
+ ramips_soc_prom_init();
+
printk(KERN_DEBUG
"prom: fw_arg0=%08x, fw_arg1=%08x, fw_arg2=%08x, fw_arg3=%08x\n",
(unsigned int)fw_arg0, (unsigned int)fw_arg1,
void __iomem * rt288x_sysc_base;
void __iomem * rt288x_memc_base;
-void __init rt288x_detect_sys_type(void)
+void __init ramips_soc_prom_init(void)
{
+ void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT2880_SYSC_BASE);
u32 n0;
u32 n1;
u32 id;
- n0 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME0);
- n1 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME1);
- id = rt288x_sysc_rr(SYSC_REG_CHIP_ID);
+ n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
+ n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
+ id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
"Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE);
rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE);
- rt288x_detect_sys_type();
rt288x_clocks_init();
clk = clk_get(NULL, "cpu");
void __iomem * rt305x_sysc_base;
void __iomem * rt305x_memc_base;
-void __init rt305x_detect_sys_type(void)
+void __init ramips_soc_prom_init(void)
{
+ void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
u32 n0;
u32 n1;
u32 id;
- n0 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME0);
- n1 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME1);
- id = rt305x_sysc_rr(SYSC_REG_CHIP_ID);
+ n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
+ n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
+ id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
"Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
rt305x_sysc_base = ioremap_nocache(RT305X_SYSC_BASE, PAGE_SIZE);
rt305x_memc_base = ioremap_nocache(RT305X_MEMC_BASE, PAGE_SIZE);
- rt305x_detect_sys_type();
rt305x_clocks_init();
clk = clk_get(NULL, "cpu");
void __iomem * rt3883_sysc_base;
void __iomem * rt3883_memc_base;
-void __init rt3883_detect_sys_type(void)
+void __init ramips_soc_prom_init(void)
{
+ void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT3883_SYSC_BASE);
u32 n0;
u32 n1;
u32 id;
- n0 = rt3883_sysc_rr(RT3883_SYSC_REG_CHIPID0_3);
- n1 = rt3883_sysc_rr(RT3883_SYSC_REG_CHIPID4_7);
- id = rt3883_sysc_rr(RT3883_SYSC_REG_REVID);
+ n0 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID0_3);
+ n1 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID4_7);
+ id = __raw_readl(sysc + RT3883_SYSC_REG_REVID);
snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
"Ralink %c%c%c%c%c%c%c%c ver:%u eco:%u",
rt3883_sysc_base = ioremap_nocache(RT3883_SYSC_BASE, PAGE_SIZE);
rt3883_memc_base = ioremap_nocache(RT3883_MEMC_BASE, PAGE_SIZE);
- rt3883_detect_sys_type();
rt3883_clocks_init();
clk = clk_get(NULL, "cpu");