Merge tag 'drm-intel-next-2019-01-10' of git://anongit.freedesktop.org/drm/drm-intel...
authorDave Airlie <airlied@redhat.com>
Thu, 24 Jan 2019 09:44:16 +0000 (19:44 +1000)
committerDave Airlie <airlied@redhat.com>
Thu, 24 Jan 2019 09:44:16 +0000 (19:44 +1000)
- Unwind failure on pinning the gen7 PPGTT (Chris)
- Fastset updates to make sure DRRS and PSR are properly enabled (Hans)
- Header include clean-up (Brajeswar, Jani)
- Improvements and clean-up on debugfs (Chris, Jani)
- Avoid division by zero on CNL clocks setup (Xiao)
- Restrict PSMI context load w/a to Haswell GT1 (Chris)
- Remove HW semaphores for gen7 inter-engine sync (Chris)
- Pull the render flush into breadcrumb emission (Chris)
- i915_params copy and free helpers and other reorgs and docs (Jani)
- Remove has_pooled_eu static initializer (Tvrtko)
- Updates on kerneldoc (Chris)
- Remove redundant trailing request flush (Chris)
- ringbuffer irq seqno fixes and clean-up (Chris)
- splitting off runtime device info and other clean-up around (Jani)
- Selftests improvements (Chris, Daniele)
- Flush RING_IMR changes before changing the global GT IMR on gen6 and HSW (Chris)
- Some improvements and fixes around GPU reset and GPU hang report (Chris)
- Remove partial attempt to swizzle on pread/pwrite (Chris)
- Return immediately if trylock fails for direct-reclaim (Chris)
- Downgrade scare message for unknown HuC firmware (Jani)
- ACPI / PMIC for MIPI / DSI (Hans)
- Reduce i915_request_alloc retirement to local context (Chris)
- Init per-engine WAs for all engines (Daniele)
- drop DPF code for gen8+ (Daniele)
- Guard error capture against unpinned vma (Chris)
- Use mutex_lock_killable from inside the shrinker (Chris)
- Removing pooling from struct_mutex from vmap shrinker (Chris)

Signed-off-by: Dave Airlie <airlied@redhat.com>
# gpg: Signature made Fri 11 Jan 2019 09:58:18 AEST
# gpg:                using RSA key FA625F640EEB13CA
# gpg: Good signature from "Rodrigo Vivi <rodrigo.vivi@intel.com>"
# gpg:                 aka "Rodrigo Vivi <rodrigo.vivi@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6D20 7068 EEDD 6509 1C2C  E2A3 FA62 5F64 0EEB 13CA

# Conflicts:
# drivers/gpu/drm/i915/intel_dp.c
# drivers/gpu/drm/i915/intel_drv.h
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114183820.GA2855@intel.com
21 files changed:
1  2 
drivers/gpu/drm/drm_dp_helper.c
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_context.c
drivers/gpu/drm/i915/i915_request.c
drivers/gpu/drm/i915/intel_connector.c
drivers/gpu/drm/i915/intel_crt.c
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_dp_mst.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_dvo.c
drivers/gpu/drm/i915/intel_engine_cs.c
drivers/gpu/drm/i915/intel_hdmi.c
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_lvds.c
drivers/gpu/drm/i915/intel_sdvo.c
drivers/gpu/drm/i915/intel_tv.c
drivers/gpu/drm/i915/selftests/intel_hangcheck.c
drivers/gpu/drm/i915/vlv_dsi.c

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index d18b72b5f0b89b52bb12ebb2489fa211fe047ec2,d3cd40e656fe14ac01c1bcf0cf4405893f35480b..c1eda64ada9dfde987363daffd73425921ad6d4d
@@@ -2055,11 -2052,11 +2056,12 @@@ intel_dp_compute_link_config(struct int
                                                        &limits);
  
        /* enable compression if the mode doesn't fit available BW */
-       if (ret) {
+       DRM_DEBUG_KMS("Force DSC en = %d\n", intel_dp->force_dsc_en);
 -      if (!ret || intel_dp->force_dsc_en) {
 -              if (!intel_dp_dsc_compute_config(intel_dp, pipe_config,
 -                                               conn_state, &limits))
 -                      return false;
++      if (ret || intel_dp->force_dsc_en) {
 +              ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
 +                                                conn_state, &limits);
 +              if (ret < 0)
 +                      return ret;
        }
  
        if (pipe_config->dsc_params.compression_enable) {
Simple merge
index 19d9abd2666ebdaea0fbb36bb7e8bb2c6b5ae6fb,1a11c2beb7f31437ad771345b9358771ab3137a6..d4ee09fb275a859475107991ddf59d60279496d4
@@@ -1805,10 -1813,10 +1812,10 @@@ void intel_dp_sink_set_decompression_st
                                           bool enable);
  void intel_dp_encoder_reset(struct drm_encoder *encoder);
  void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
- void intel_dp_encoder_destroy(struct drm_encoder *encoder);
+ void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
 -bool intel_dp_compute_config(struct intel_encoder *encoder,
 -                           struct intel_crtc_state *pipe_config,
 -                           struct drm_connector_state *conn_state);
 +int intel_dp_compute_config(struct intel_encoder *encoder,
 +                          struct intel_crtc_state *pipe_config,
 +                          struct drm_connector_state *conn_state);
  bool intel_dp_is_edp(struct intel_dp *intel_dp);
  bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
  enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port,
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