r8169: phy init for the 8169sce

Synced with Realtek's 6.011.00 r8169 driver.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 6c4b879497d8f768c4a873339e74d73089f1f1d6..86722886ae47dbe640c3399061bc628cb44ee98d 100644 (file)
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1389,6 +1389,59 @@ static void rtl8169sb_hw_phy_config(void __iomem *ioaddr)
        rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
 }
 
+static void rtl8169sce_hw_phy_config(void __iomem *ioaddr)
+{
+       struct phy_reg phy_reg_init[] = {
+               { 0x1f, 0x0001 },
+               { 0x04, 0x0000 },
+               { 0x03, 0x00a1 },
+               { 0x02, 0x0008 },
+               { 0x01, 0x0120 },
+               { 0x00, 0x1000 },
+               { 0x04, 0x0800 },
+               { 0x04, 0x9000 },
+               { 0x03, 0x802f },
+               { 0x02, 0x4f02 },
+               { 0x01, 0x0409 },
+               { 0x00, 0xf099 },
+               { 0x04, 0x9800 },
+               { 0x04, 0xa000 },
+               { 0x03, 0xdf01 },
+               { 0x02, 0xdf20 },
+               { 0x01, 0xff95 },
+               { 0x00, 0xba00 },
+               { 0x04, 0xa800 },
+               { 0x04, 0xf000 },
+               { 0x03, 0xdf01 },
+               { 0x02, 0xdf20 },
+               { 0x01, 0x101a },
+               { 0x00, 0xa0ff },
+               { 0x04, 0xf800 },
+               { 0x04, 0x0000 },
+               { 0x1f, 0x0000 },
+
+               { 0x1f, 0x0001 },
+               { 0x0b, 0x8480 },
+               { 0x1f, 0x0000 },
+
+               { 0x1f, 0x0001 },
+               { 0x18, 0x67c7 },
+               { 0x04, 0x2000 },
+               { 0x03, 0x002f },
+               { 0x02, 0x4360 },
+               { 0x01, 0x0109 },
+               { 0x00, 0x3022 },
+               { 0x04, 0x2800 },
+               { 0x1f, 0x0000 },
+
+               { 0x1f, 0x0001 },
+               { 0x17, 0x0cc0 },
+               { 0x1f, 0x0000 }
+       };
+
+       rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
 static void rtl8168bb_hw_phy_config(void __iomem *ioaddr)
 {
        struct phy_reg phy_reg_init[] = {
@@ -1628,6 +1681,9 @@ static void rtl_hw_phy_config(struct net_device *dev)
        case RTL_GIGA_MAC_VER_04:
                rtl8169sb_hw_phy_config(ioaddr);
                break;
+       case RTL_GIGA_MAC_VER_06:
+               rtl8169sce_hw_phy_config(ioaddr);
+               break;
        case RTL_GIGA_MAC_VER_07:
        case RTL_GIGA_MAC_VER_08:
        case RTL_GIGA_MAC_VER_09: