Add CPUECTLR_EL1 and Snoop Control register to crash reporting

This patch adds the CPUECTLR_EL1 register and the CCI Snoop Control
register to the list of registers being reported when an unhandled
exception occurs.

Change-Id: I2d997f2d6ef3d7fa1fad5efe3364dc9058f9f22c

diff --git a/bl31/aarch64/crash_reporting.S b/bl31/aarch64/crash_reporting.S
index 4570514fdfa407c882e9551f7b68a875d120904a..e69878b27f4ff1b492b74f6e8b2acba39cb47cca 100644 (file)
--- a/bl31/aarch64/crash_reporting.S
+++ b/bl31/aarch64/crash_reporting.S
@@ -52,6 +52,9 @@
 print_spacer:
        .asciz  " =\t\t0x"
 
+cpu_ectlr_reg:
+       .asciz  "cpuectlr_el1 =\t\t0x"
+
 gp_regs:
        .asciz  "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",\
                "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",\
@@ -334,9 +337,28 @@ func do_crash_reporting
        mrs     x10, sp_el0
        bl      str_in_crash_buf_print
 
+       /* Print the CPUECTLR_EL1 reg */
+       mrs     x0, midr_el1
+       lsr     x0, x0, #MIDR_PN_SHIFT
+       and     x0, x0, #MIDR_PN_MASK
+       cmp     x0, #MIDR_PN_A57
+       b.eq    1f
+       cmp     x0, #MIDR_PN_A53
+       b.ne    2f
+1:
+       adr     x4, cpu_ectlr_reg
+       bl      asm_print_str
+       mrs     x4, CPUECTLR_EL1
+       bl      asm_print_hex
+       bl      print_newline
+2:
+
        /* Print the gic registers */
        plat_print_gic_regs
 
+       /* Print the interconnect registers */
+       plat_print_interconnect_regs
+
        /* Done reporting */
        b       crash_panic
 

diff --git a/docs/porting-guide.md b/docs/porting-guide.md
index 9002a99922d33288d5351c4d7885f3c32940dff2..82dcf9d01659a2fec44f47d5b8850d07b95b007a 100644 (file)
--- a/docs/porting-guide.md
+++ b/docs/porting-guide.md
@@ -275,10 +275,18 @@ the following macro defined. In the ARM FVP port, this file is found in
 *   **Macro : plat_print_gic_regs**
 
     This macro allows the crash reporting routine to print GIC registers
-    in case of an unhandled IRQ or FIQ in BL3-1. This aids in debugging and
+    in case of an unhandled exception in BL3-1. This aids in debugging and
     this macro can be defined to be empty in case GIC register reporting is
     not desired.
 
+*   **Macro : plat_print_interconnect_regs**
+
+    This macro allows the crash reporting routine to print interconnect registers
+    in case of an unhandled exception in BL3-1. This aids in debugging and
+    this macro can be defined to be empty in case interconnect register reporting
+    is not desired. In the ARM FVP port, the CCI snoop control registers are
+    reported.
+
 ### Other mandatory modifications
 
 The following mandatory modifications may be implemented in any file

diff --git a/include/drivers/arm/cci400.h b/include/drivers/arm/cci400.h
index 7222391f9260f1383261594f4282e68650f72331..6246e48076870df48532b15b687c97e2356fcbb3 100644 (file)
--- a/include/drivers/arm/cci400.h
+++ b/include/drivers/arm/cci400.h
@@ -65,8 +65,11 @@
 /* Status register bit definitions */
 #define CHANGE_PENDING_BIT             (1 << 0)
 
+#ifndef __ASSEMBLY__
+
 /* Function declarations */
 void cci_enable_coherency(unsigned long mpidr);
 void cci_disable_coherency(unsigned long mpidr);
 
+#endif /* __ASSEMBLY__ */
 #endif /* __CCI_400_H__ */

diff --git a/plat/fvp/include/plat_macros.S b/plat/fvp/include/plat_macros.S
index 728ee1eb850ce5675e5a5376dc65565274588fe1..727b95801298a926c0760d1dff12d7a2d30e447e 100644 (file)
--- a/plat/fvp/include/plat_macros.S
+++ b/plat/fvp/include/plat_macros.S
@@ -27,9 +27,10 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
-
+#include <cci400.h>
 #include <gic_v2.h>
 #include <plat_config.h>
+#include "platform_def.h"
 
 .section .rodata.gic_reg_name, "aS"
 gic_regs:
@@ -79,3 +80,26 @@ spacer:
        b       2b
 1:
        .endm
+
+.section .rodata.cci_reg_name, "aS"
+cci_iface_regs:
+       .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
+
+       /* ------------------------------------------------
+        * The below macro prints out relevant interconnect
+        * registers whenever an unhandled exception is
+        * taken in BL31.
+        * Clobbers: x0 - x9, sp
+        * ------------------------------------------------
+        */
+       .macro plat_print_interconnect_regs
+       adr     x6, cci_iface_regs
+       /* Store in x7 the base address of the first interface */
+       mov_imm x7, (CCI400_BASE + SLAVE_IFACE3_OFFSET)
+       ldr     w8, [x7, #SNOOP_CTRL_REG]
+       /* Store in x7 the base address of the second interface */
+       mov_imm x7, (CCI400_BASE + SLAVE_IFACE4_OFFSET)
+       ldr     w9, [x7, #SNOOP_CTRL_REG]
+       /* Store to the crash buf and print to console */
+       bl      str_in_crash_buf_print
+       .endm