ramips: mt7621-dts: properly organize pcie node
authorSergio Paracuellos <sergio.paracuellos@gmail.com>
Wed, 5 May 2021 12:17:36 +0000 (14:17 +0200)
committerChristian Lamparter <chunkeey@gmail.com>
Sat, 6 Nov 2021 22:36:32 +0000 (23:36 +0100)
Device tree pcie node for this SoC is using different
styles in its different properties. Hence properly
unify them to be able to write a a proper yaml schema
documentation.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210505121736.6459-11-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
target/linux/ramips/dts/mt7621.dtsi

index d1c4756cecb9ffc80e7083c556c60152c92fca79..4a3327a364eb4886853186dd92331a4f007521f6 100644 (file)
 
        pcie: pcie@1e140000 {
                compatible = "mediatek,mt7621-pci";
-               reg = <0x1e140000 0x100     /* host-pci bridge registers */
-                       0x1e142000 0x100    /* pcie port 0 RC control registers */
-                       0x1e143000 0x100    /* pcie port 1 RC control registers */
-                       0x1e144000 0x100>;  /* pcie port 2 RC control registers */
+               reg = <0x1e140000 0x100>, /* host-pci bridge registers */
+                     <0x1e142000 0x100>, /* pcie port 0 RC control registers */
+                     <0x1e143000 0x100>, /* pcie port 1 RC control registers */
+                     <0x1e144000 0x100>; /* pcie port 2 RC control registers */
                #address-cells = <3>;
                #size-cells = <2>;
 
 
                device_type = "pci";
 
-               ranges = <
-                       0x02000000 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */
-                       0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
-               >;
+               ranges = <0x02000000 0 0x00000000 0x60000000 0 0x10000000>, /* pci memory */
+                        <0x01000000 0 0x00000000 0x1e160000 0 0x00010000>; /* io space */
 
                interrupt-parent = <&gic>;
                interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
 
                status = "disabled";
 
-               resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>;
+               resets = <&rstctrl 24>, <&rstctrl 25>, <&rstctrl 26>;
                reset-names = "pcie0", "pcie1", "pcie2";
-               clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
+               clocks = <&clkctrl 24>, <&clkctrl 25>, <&clkctrl 26>;
                clock-names = "pcie0", "pcie1", "pcie2";
                phys = <&pcie0_phy 1>, <&pcie2_phy 0>;
                phy-names = "pcie-phy0", "pcie-phy2";