mediatek: correct address of MT753x switch IC
authorDaniel Golle <daniel@makrotopia.org>
Tue, 23 Apr 2024 11:14:07 +0000 (12:14 +0100)
committerDaniel Golle <daniel@makrotopia.org>
Wed, 24 Apr 2024 20:05:46 +0000 (21:05 +0100)
For all boards currently working with the mt7530 DSA driver we can
be sure that the address of the switch on the MDIO bus is 31 --
simply because that address is hard-coded in the driver and the
address from the Device Tree is being ignore.

An upcoming patch will add support for MT753x ICs which are programmed
to addresses different from 0x1f using bootstrap pins. As a result the
address from the Device Tree will then be taken into account, which
will break currently working boards which got the address set to
anything else than 31.

While at it also unify the syntax in Device Tree to always us a decimal
value for the 'reg' property.

 * mt7622-buffalo-wsr-3200ax4s.dts
   Cosmetic change 'reg = <0x1f>' -> 'reg = <31>'

 * mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi
   Wrong address: 0 -> 31

 * mt7622-elecom-wrc-x3200gst3.dts
   Wrong address: 0 -> 31

 * mt7622-linksys-e8450.dtsi
   Wrong address: 0 -> 31

 * mt7622-ruijie-rg-ew3200.dtsi
   Wrong address: 0 -> 31

 * mt7622-xiaomi-redmi-router-ax6s.dts
   Wrong address: 0 -> 31

 * mt7629-iptime-a6004mx.dts
   Wrong address: 2 -> 31

 * mt7981b-zbtlink-zbt-z8102ax.dts
   Cosmetic change 'reg = <0x1f>' -> 'reg = <31>'

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
target/linux/mediatek/dts/mt7622-buffalo-wsr-3200ax4s.dts
target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi
target/linux/mediatek/dts/mt7622-elecom-wrc-x3200gst3.dts
target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi
target/linux/mediatek/dts/mt7622-ruijie-rg-ew3200.dtsi
target/linux/mediatek/dts/mt7622-xiaomi-redmi-router-ax6s.dts
target/linux/mediatek/dts/mt7629-iptime-a6004mx.dts
target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts

index 678c31b711b74191b4dcca48e388699405879660..82cc970fddaec7a58e077f80cf9fded01b2db331 100644 (file)
@@ -39,7 +39,7 @@
 &mdio {
        switch@1f {
                compatible = "mediatek,mt7531";
-               reg = <0x1f>;
+               reg = <31>;
                reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
 
                ports {
index 10cee7bceff724115e14ade188ef384eee64a202..0560bbd33e0adc6c270c94f9115b4b4574f41265 100644 (file)
@@ -76,9 +76,9 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               switch: switch@0 {
+               switch: switch@1f {
                        compatible = "mediatek,mt7531";
-                       reg = <0>;
+                       reg = <31>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
                        interrupt-parent = <&pio>;
index f3a688b2d684b437c39fdb19a5c3e7f9dcac873b..2bf4a33a50c840cec9f115db17a7e2caa712acaf 100644 (file)
                #address-cells = <1>;
                #size-cells = <0>;
 
-               switch@0 {
+               switch@1f {
                        compatible = "mediatek,mt7531";
-                       reg = <0>;
+                       reg = <31>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
                        interrupt-parent = <&pio>;
index bd686073cbceeed17b20ae883c097bb96998b18d..48b25f7a4a0452ba35743bbd3668bc20e4184fa1 100644 (file)
                #address-cells = <1>;
                #size-cells = <0>;
 
-               switch@0 {
+               switch@1f {
                        compatible = "mediatek,mt7531";
-                       reg = <0>;
+                       reg = <31>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
                        interrupt-parent = <&pio>;
index a240f9bfcec111f600c66568e8e0c7b0bbcce46e..24ed92788ef911664e302121f46dc0e7024a0ca9 100644 (file)
@@ -97,9 +97,9 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               switch@0 {
+               switch@1f {
                        compatible = "mediatek,mt7531";
-                       reg = <0>;
+                       reg = <31>;
                        reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
index c0db31fd3ae55f676132dec75c0c7d84d7e27e85..ebc8731bc70831df284fe08431a9e726f7749fa6 100644 (file)
                #address-cells = <1>;
                #size-cells = <0>;
 
-               switch@0 {
+               switch@1f {
                        compatible = "mediatek,mt7531";
-                       reg = <0>;
+                       reg = <31>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
                        interrupt-parent = <&pio>;
index 78286714eafa6f8f4b27c495dc982fd32ba01ef9..7a3fa4deffbcdd6a1622866d9d5eca8b671ddd7f 100644 (file)
                        reg = <0>;
                };
 
-               switch@2 {
+               switch@1f {
                        compatible = "mediatek,mt7531";
-                       reg = <2>;
+                       reg = <31>;
                        reset-gpios = <&pio 28 0>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
index de35d150980ef35b141a3ac014fd4d1f1b981431..f4d5271f977784f2e5c24b9de16ff45f4573cba2 100644 (file)
 &mdio_bus {
        switch: switch@1f {
                compatible = "mediatek,mt7531";
-               reg = <0x1f>;
+               reg = <31>;
                reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
                interrupt-controller;
                #interrupt-cells = <1>;