Refreshed all patches.
Compile-tested on: ath79, lantiq, ipq40xx, x86_64
Runtime-tested on: ipq40xx, x86_64
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
endif
-LINUX_VERSION-5.4 = .99
+LINUX_VERSION-5.4 = .102
-LINUX_KERNEL_HASH-5.4.99 = 5bdad12c69253d30d836dd51e0b2a9a04a6749cc6b4b2412561a1efcb1351a27
+LINUX_KERNEL_HASH-5.4.102 = fd697ce1c3f6024d4ae77d4eb5a1552199407b60cb8e90bc621e23cbce639aed
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1985,7 +1985,7 @@ static int sr2_bit7_quad_enable(struct s
+@@ -1987,7 +1987,7 @@ static int sr2_bit7_quad_enable(struct s
static int spi_nor_clear_sr_bp(struct spi_nor *nor)
{
int ret;
static void pxa_camera_setup_cicr(struct pxa_camera_dev *pcdev,
unsigned long flags, __u32 pixfmt)
{
-@@ -1598,99 +1537,78 @@ static int pxa_camera_init_videobuf2(str
+@@ -1601,99 +1540,78 @@ static int pxa_camera_init_videobuf2(str
*/
static int pxa_camera_set_bus_param(struct pxa_camera_dev *pcdev)
{
}
static const struct pxa_mbus_pixelfmt pxa_camera_formats[] = {
-@@ -1738,11 +1656,6 @@ static int pxa_camera_get_formats(struct
+@@ -1741,11 +1659,6 @@ static int pxa_camera_get_formats(struct
return 0;
}
/* 240-255: Unused at present */
--- a/drivers/mtd/parsers/parser_imagetag.c
+++ b/drivers/mtd/parsers/parser_imagetag.c
-@@ -132,7 +132,8 @@ static int bcm963xx_parse_imagetag_parti
+@@ -136,7 +136,8 @@ static int bcm963xx_parse_imagetag_parti
} else {
/* OpenWrt layout */
rootfsaddr = kerneladdr + kernellen;
config MODULES_TREE_LOOKUP
--- a/kernel/module.c
+++ b/kernel/module.c
-@@ -3125,9 +3125,11 @@ static int setup_load_info(struct load_i
+@@ -3142,9 +3142,11 @@ static int setup_load_info(struct load_i
static int check_modinfo(struct module *mod, struct load_info *info, int flags)
{
if (flags & MODULE_INIT_IGNORE_VERMAGIC)
modmagic = NULL;
-@@ -3148,6 +3150,7 @@ static int check_modinfo(struct module *
+@@ -3165,6 +3167,7 @@ static int check_modinfo(struct module *
mod->name);
add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK);
}
} \
\
/* __*init sections */ \
-@@ -898,6 +908,8 @@
+@@ -903,6 +913,8 @@
EXIT_TEXT \
EXIT_DATA \
EXIT_CALL \
/* Part specific fixup hooks. */
const struct spi_nor_fixups *fixups;
-@@ -1983,6 +1987,9 @@ static int spi_nor_clear_sr_bp(struct sp
+@@ -1985,6 +1989,9 @@ static int spi_nor_clear_sr_bp(struct sp
int ret;
u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
ret = read_sr(nor);
if (ret < 0) {
dev_err(nor->dev, "error while reading status register\n");
-@@ -2335,7 +2342,7 @@ static const struct flash_info spi_nor_i
+@@ -2337,7 +2344,7 @@ static const struct flash_info spi_nor_i
{ "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
{ "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) },
{ "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
{ "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) },
{ "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-@@ -5024,6 +5031,9 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -5025,6 +5032,9 @@ int spi_nor_scan(struct spi_nor *nor, co
if (info->flags & USE_CLSR)
nor->flags |= SNOR_F_USE_CLSR;
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2704,7 +2704,7 @@ static int spi_nor_write(struct mtd_info
+@@ -2706,7 +2706,7 @@ static int spi_nor_write(struct mtd_info
write_enable(nor);
ret = spi_nor_write_data(nor, addr, page_remain, buf + i);
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -4883,6 +4883,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -4884,6 +4884,7 @@ int spi_nor_scan(struct spi_nor *nor, co
*/
if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -4397,6 +4397,7 @@ static void st_micron_set_default_init(s
+@@ -4398,6 +4398,7 @@ static void st_micron_set_default_init(s
static void winbond_set_default_init(struct spi_nor *nor)
{
nor->params.set_4byte = winbond_set_4byte;
}
-@@ -4885,6 +4886,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -4886,6 +4887,7 @@ int spi_nor_scan(struct spi_nor *nor, co
JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
JEDEC_MFR(nor->info) == SNOR_MFR_MACRONIX ||
JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
depends on OF && (ARM || ARM64 || COMPILE_TEST)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -4463,6 +4463,7 @@ static void spi_nor_info_init_params(str
+@@ -4464,6 +4464,7 @@ static void spi_nor_info_init_params(str
struct spi_nor_erase_map *map = ¶ms->erase_map;
const struct flash_info *info = nor->info;
struct device_node *np = spi_nor_get_flash_node(nor);
u8 i, erase_mask;
/* Initialize legacy flash parameters and settings. */
-@@ -4526,6 +4527,21 @@ static void spi_nor_info_init_params(str
+@@ -4527,6 +4528,21 @@ static void spi_nor_info_init_params(str
*/
erase_mask = 0;
i = 0;
if (info->flags & SECT_4K_PMC) {
erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], 4096u,
-@@ -4537,6 +4553,7 @@ static void spi_nor_info_init_params(str
+@@ -4538,6 +4554,7 @@ static void spi_nor_info_init_params(str
SPINOR_OP_BE_4K);
i++;
}
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2177,6 +2177,7 @@ static const struct flash_info spi_nor_i
+@@ -2179,6 +2179,7 @@ static const struct flash_info spi_nor_i
{ "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, 0) },
{ "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) },
{ "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2504,6 +2504,9 @@ static const struct flash_info spi_nor_i
+@@ -2506,6 +2506,9 @@ static const struct flash_info spi_nor_i
/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
{ "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
static int macronix_set_4byte(struct spi_nor *nor, bool enable)
{
if (nor->spimem) {
-@@ -1259,6 +1275,10 @@ static int spi_nor_erase(struct mtd_info
+@@ -1261,6 +1277,10 @@ static int spi_nor_erase(struct mtd_info
if (ret)
return ret;
/* whole-chip erase? */
if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) {
unsigned long timeout;
-@@ -1315,6 +1335,7 @@ static int spi_nor_erase(struct mtd_info
+@@ -1317,6 +1337,7 @@ static int spi_nor_erase(struct mtd_info
write_disable(nor);
erase_err:
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE);
return ret;
-@@ -1621,7 +1642,9 @@ static int spi_nor_lock(struct mtd_info
+@@ -1623,7 +1644,9 @@ static int spi_nor_lock(struct mtd_info
if (ret)
return ret;
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_UNLOCK);
return ret;
-@@ -1636,7 +1659,9 @@ static int spi_nor_unlock(struct mtd_inf
+@@ -1638,7 +1661,9 @@ static int spi_nor_unlock(struct mtd_inf
if (ret)
return ret;
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK);
return ret;
-@@ -1651,7 +1676,9 @@ static int spi_nor_is_locked(struct mtd_
+@@ -1653,7 +1678,9 @@ static int spi_nor_is_locked(struct mtd_
if (ret)
return ret;
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK);
return ret;
-@@ -2557,6 +2584,10 @@ static int spi_nor_read(struct mtd_info
+@@ -2559,6 +2586,10 @@ static int spi_nor_read(struct mtd_info
if (ret)
return ret;
while (len) {
loff_t addr = from;
-@@ -2580,6 +2611,7 @@ static int spi_nor_read(struct mtd_info
+@@ -2582,6 +2613,7 @@ static int spi_nor_read(struct mtd_info
ret = 0;
read_err:
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
return ret;
}
-@@ -2597,6 +2629,10 @@ static int sst_write(struct mtd_info *mt
+@@ -2599,6 +2631,10 @@ static int sst_write(struct mtd_info *mt
if (ret)
return ret;
write_enable(nor);
nor->sst_write_second = false;
-@@ -2659,6 +2695,7 @@ static int sst_write(struct mtd_info *mt
+@@ -2661,6 +2697,7 @@ static int sst_write(struct mtd_info *mt
}
sst_write_err:
*retlen += actual;
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
return ret;
}
-@@ -2681,6 +2718,10 @@ static int spi_nor_write(struct mtd_info
+@@ -2683,6 +2720,10 @@ static int spi_nor_write(struct mtd_info
if (ret)
return ret;
for (i = 0; i < len; ) {
ssize_t written;
loff_t addr = to + i;
-@@ -2720,6 +2761,7 @@ static int spi_nor_write(struct mtd_info
+@@ -2722,6 +2763,7 @@ static int spi_nor_write(struct mtd_info
}
write_err:
spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
return ret;
}
-@@ -4725,9 +4767,13 @@ static int spi_nor_init(struct spi_nor *
+@@ -4726,9 +4768,13 @@ static int spi_nor_init(struct spi_nor *
* reboots (e.g., crashes). Warn the user (or hopefully, system
* designer) that this is bad.
*/
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2230,6 +2230,11 @@ static const struct flash_info spi_nor_i
+@@ -2232,6 +2232,11 @@ static const struct flash_info spi_nor_i
/* GigaDevice */
{
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2170,6 +2170,32 @@ static struct spi_nor_fixups gd25q256_fi
+@@ -2172,6 +2172,32 @@ static struct spi_nor_fixups gd25q256_fi
.default_init = gd25q256_default_init,
};
/* NOTE: double check command sets and memory organization when you add
* more nor chips. This current list focusses on newer chips, which
* have been converging on command sets which including JEDEC ID.
-@@ -2513,7 +2539,8 @@ static const struct flash_info spi_nor_i
+@@ -2515,7 +2541,8 @@ static const struct flash_info spi_nor_i
{ "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) },
{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },
{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2351,6 +2351,8 @@ static const struct flash_info spi_nor_i
+@@ -2353,6 +2353,8 @@ static const struct flash_info spi_nor_i
{ "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
--- a/drivers/watchdog/qcom-wdt.c
+++ b/drivers/watchdog/qcom-wdt.c
-@@ -40,6 +40,11 @@ static const u32 reg_offset_data_kpss[]
+@@ -39,6 +39,11 @@ static const u32 reg_offset_data_kpss[]
[WDT_BITE_TIME] = 0x14,
};
struct qcom_wdt {
struct watchdog_device wdd;
unsigned long rate;
-@@ -179,19 +184,29 @@ static void qcom_clk_disable_unprepare(v
+@@ -168,19 +173,29 @@ static void qcom_clk_disable_unprepare(v
clk_disable_unprepare(data);
}
dev_err(dev, "Unsupported QCOM WDT module\n");
return -ENODEV;
}
-@@ -247,7 +262,7 @@ static int qcom_wdt_probe(struct platfor
+@@ -236,7 +251,7 @@ static int qcom_wdt_probe(struct platfor
/* check if there is pretimeout support */
irq = platform_get_irq_optional(pdev, 0);
ret = devm_request_irq(dev, irq, qcom_wdt_isr,
IRQF_TRIGGER_RISING,
"wdt_bark", &wdt->wdd);
-@@ -267,7 +282,7 @@ static int qcom_wdt_probe(struct platfor
+@@ -256,7 +271,7 @@ static int qcom_wdt_probe(struct platfor
wdt->wdd.min_timeout = 1;
wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
wdt->wdd.parent = dev;
if (readl(wdt_addr(wdt, WDT_STS)) & 1)
wdt->wdd.bootstatus = WDIOF_CARDRESET;
-@@ -311,9 +326,9 @@ static int __maybe_unused qcom_wdt_resum
+@@ -300,9 +315,9 @@ static int __maybe_unused qcom_wdt_resum
static SIMPLE_DEV_PM_OPS(qcom_wdt_pm_ops, qcom_wdt_suspend, qcom_wdt_resume);
static const struct of_device_id qcom_wdt_of_table[] = {
/* enable PCIe clocks and resets */
val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
-@@ -406,36 +393,6 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -408,36 +395,6 @@ static int qcom_pcie_init_2_1_0(struct q
val |= PHY_REFCLK_SSP_EN;
writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
/* wait for clock acquisition */
usleep_range(1000, 1500);
-@@ -448,15 +405,19 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -450,15 +407,19 @@ static int qcom_pcie_init_2_1_0(struct q
return 0;
writel(PCS_DEEMPH_TX_DEEMPH_GEN1(24) |
PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(24) |
PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(34),
-@@ -1328,6 +1329,7 @@ err_pm_runtime_put:
+@@ -1330,6 +1331,7 @@ err_pm_runtime_put:
static const struct of_device_id qcom_pcie_match[] = {
{ .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
{ .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
};
#define to_qcom_pcie(x) dev_get_drvdata((x)->dev)
-@@ -397,6 +401,11 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -399,6 +403,11 @@ static int qcom_pcie_init_2_1_0(struct q
/* wait for clock acquisition */
usleep_range(1000, 1500);
/* Set the Max TLP size to 2K, instead of using default of 4K */
writel(CFG_REMOTE_RD_REQ_BRIDGE_SIZE_2K,
-@@ -1261,6 +1270,10 @@ static int qcom_pcie_probe(struct platfo
+@@ -1263,6 +1272,10 @@ static int qcom_pcie_probe(struct platfo
goto err_pm_runtime_put;
}
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2417,7 +2417,7 @@ static const struct flash_info spi_nor_i
+@@ -2419,7 +2419,7 @@ static const struct flash_info spi_nor_i
{ "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256,
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | USE_CLSR) },
* All 3.1 IP version constants are greater than the 3.0 IP
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
-@@ -3543,6 +3543,10 @@ int dwc3_gadget_init(struct dwc3 *dwc)
+@@ -3558,6 +3558,10 @@ int dwc3_gadget_init(struct dwc3 *dwc)
dwc->gadget.sg_supported = true;
dwc->gadget.name = "dwc3-gadget";
dwc->gadget.lpm_capable = true;
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-@@ -714,6 +714,17 @@
+@@ -716,6 +716,17 @@
status = "disabled";
};
when making changes to the MAC configuration. This means the
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -3653,9 +3653,11 @@ static void mvneta_mac_link_down(struct
+@@ -3655,9 +3655,11 @@ static void mvneta_mac_link_down(struct
mvneta_set_eee(pp, false);
}
&pio {
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-@@ -792,45 +792,41 @@
+@@ -794,45 +794,41 @@
#reset-cells = <1>;
};
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
-@@ -842,15 +838,39 @@
+@@ -844,15 +840,39 @@
#interrupt-cells = <1>;
};
};
interface-type = "ace";
reg = <0x5000 0x1000>;
};
-@@ -967,6 +967,8 @@
+@@ -969,6 +969,8 @@
power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
mediatek,ethsys = <ðsys>;
mediatek,sgmiisys = <&sgmiisys>;
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-@@ -803,6 +803,8 @@
+@@ -805,6 +805,8 @@
reg = <0 0x1a143000 0 0x1000>;
reg-names = "port0";
mediatek,pcie-cfg = <&pciecfg>;
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
-@@ -820,6 +822,7 @@
+@@ -822,6 +824,7 @@
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
status = "disabled";
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
-@@ -846,6 +849,8 @@
+@@ -848,6 +851,8 @@
reg = <0 0x1a145000 0 0x1000>;
reg-names = "port1";
mediatek,pcie-cfg = <&pciecfg>;
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-@@ -864,6 +869,7 @@
+@@ -866,6 +871,7 @@
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
status = "disabled";
slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
-@@ -923,6 +929,11 @@
+@@ -925,6 +931,11 @@
};
};
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2550,6 +2550,9 @@ static const struct flash_info spi_nor_i
+@@ -2552,6 +2552,9 @@ static const struct flash_info spi_nor_i
.fixups = &w25q256_fixups },
{ "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
MVNETA_RX_BUF_SIZE(pp->pkt_size));
mvneta_rxq_bm_disable(pp, rxq);
mvneta_rxq_fill(pp, rxq, rxq->size);
-@@ -4708,7 +4713,7 @@ static int mvneta_probe(struct platform_
+@@ -4715,7 +4720,7 @@ static int mvneta_probe(struct platform_
SET_NETDEV_DEV(dev, &pdev->dev);
pp->id = global_port_id++;
};
int err;
-@@ -3364,6 +3447,11 @@ static int mvneta_change_mtu(struct net_
+@@ -3366,6 +3449,11 @@ static int mvneta_change_mtu(struct net_
mtu = ALIGN(MVNETA_RX_PKT_SIZE(mtu), 8);
}
dev->mtu = mtu;
if (!netif_running(dev)) {
-@@ -4029,6 +4117,47 @@ static int mvneta_ioctl(struct net_devic
+@@ -4036,6 +4124,47 @@ static int mvneta_ioctl(struct net_devic
return phylink_mii_ioctl(pp->phylink, ifr, cmd);
}
/* Ethtool methods */
/* Set link ksettings (phy address, speed) for ethtools */
-@@ -4425,6 +4554,7 @@ static const struct net_device_ops mvnet
+@@ -4432,6 +4561,7 @@ static const struct net_device_ops mvnet
.ndo_fix_features = mvneta_fix_features,
.ndo_get_stats64 = mvneta_get_stats64,
.ndo_do_ioctl = mvneta_ioctl,
};
static const struct ethtool_ops mvneta_eth_tool_ops = {
-@@ -4713,7 +4843,7 @@ static int mvneta_probe(struct platform_
+@@ -4720,7 +4850,7 @@ static int mvneta_probe(struct platform_
SET_NETDEV_DEV(dev, &pdev->dev);
pp->id = global_port_id++;
dma_free_coherent(pp->dev->dev.parent,
txq->size * MVNETA_DESC_ALIGNED_SIZE,
txq->descs, txq->descs_phys);
-@@ -3205,7 +3225,7 @@ static void mvneta_txq_sw_deinit(struct
+@@ -3207,7 +3227,7 @@ static void mvneta_txq_sw_deinit(struct
{
struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id);
default:
bpf_warn_invalid_xdp_action(act);
/* fall through */
-@@ -4574,6 +4687,7 @@ static const struct net_device_ops mvnet
+@@ -4581,6 +4694,7 @@ static const struct net_device_ops mvnet
.ndo_get_stats64 = mvneta_get_stats64,
.ndo_do_ioctl = mvneta_ioctl,
.ndo_bpf = mvneta_xdp,
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -4263,6 +4263,12 @@ static int mvneta_xdp_setup(struct net_d
+@@ -4270,6 +4270,12 @@ static int mvneta_xdp_setup(struct net_d
return -EOPNOTSUPP;
}
mvreg_write(pp, MVNETA_ACC_MODE, MVNETA_ACC_MODE_EXT1);
netdev_info(pp->dev, "fail to update MTU, fall back to software BM\n");
}
-@@ -4984,7 +4984,6 @@ static int mvneta_probe(struct platform_
+@@ -4991,7 +4991,6 @@ static int mvneta_probe(struct platform_
SET_NETDEV_DEV(dev, &pdev->dev);
pp->id = global_port_id++;
/* Obtain access to BM resources if enabled and already initialized */
bm_node = of_parse_phandle(dn, "buffer-manager", 0);
-@@ -5009,6 +5008,10 @@ static int mvneta_probe(struct platform_
+@@ -5016,6 +5015,10 @@ static int mvneta_probe(struct platform_
}
of_node_put(bm_node);
err = mvneta_init(&pdev->dev, pp);
if (err < 0)
goto err_netdev;
-@@ -5166,6 +5169,7 @@ static int mvneta_resume(struct device *
+@@ -5173,6 +5176,7 @@ static int mvneta_resume(struct device *
err = mvneta_bm_port_init(pdev, pp);
if (err < 0) {
dev_info(&pdev->dev, "use SW buffer management\n");
memory {
device_type = "memory";
-@@ -70,10 +77,9 @@
+@@ -73,10 +80,9 @@
+ pinctrl-names = "default";
+ pinctrl-0 = <&helios_system_led_pins>;
- system-leds {
- compatible = "gpio-leds";
- status-led {
+ led_status: status-led {
label = "helios4:green:status";
---
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -4684,6 +4684,14 @@ static int mvneta_ethtool_set_eee(struct
+@@ -4691,6 +4691,14 @@ static int mvneta_ethtool_set_eee(struct
return phylink_ethtool_set_eee(pp->phylink, eee);
}
static const struct net_device_ops mvneta_netdev_ops = {
.ndo_open = mvneta_open,
.ndo_stop = mvneta_stop,
-@@ -4694,6 +4702,7 @@ static const struct net_device_ops mvnet
+@@ -4701,6 +4709,7 @@ static const struct net_device_ops mvnet
.ndo_fix_features = mvneta_fix_features,
.ndo_get_stats64 = mvneta_get_stats64,
.ndo_do_ioctl = mvneta_ioctl,
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -4937,6 +4937,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -4938,6 +4938,7 @@ int spi_nor_scan(struct spi_nor *nor, co
struct mtd_info *mtd = &nor->mtd;
struct device_node *np = spi_nor_get_flash_node(nor);
struct spi_nor_flash_parameter *params = &nor->params;
int ret;
int i;
-@@ -4999,7 +5000,12 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -5000,7 +5001,12 @@ int spi_nor_scan(struct spi_nor *nor, co
/* Init flash parameters based on flash_info struct and SFDP */
spi_nor_init_params(nor);
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -2303,6 +2303,11 @@ static const struct flash_info spi_nor_i
+@@ -2305,6 +2305,11 @@ static const struct flash_info spi_nor_i
SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
.fixups = &gd25q256_fixups,
},
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
-@@ -126,6 +126,15 @@ config RDA_TIMER
+@@ -127,6 +127,15 @@ config RDA_TIMER
help
Enables the support for the RDA Micro timer driver.
config SUN4I_TIMER
bool "Sun4i timer driver" if COMPILE_TEST
depends on HAS_IOMEM
-@@ -695,5 +704,4 @@ config INGENIC_TIMER
+@@ -696,5 +705,4 @@ config INGENIC_TIMER
select IRQ_DOMAIN
help
Support for the timer/counter unit of the Ingenic JZ SoCs.
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
-@@ -82,6 +82,28 @@
+@@ -81,6 +81,28 @@
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
projects / openwrt / staging / 981213.git / commitdiff