--- /dev/null
+From 96c04aab58e351fa9ed7e95783018d6dbf60768f Mon Sep 17 00:00:00 2001
+From: Jun Nie <jun.nie@linaro.org>
+Date: Mon, 7 May 2018 13:03:40 +0530
+Subject: sunxi: h3: Sync OTG and HCI nodes from Linux DT
+
+Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
+or MUSB controller.
+
+Signed-off-by: Jun Nie <jun.nie@linaro.org>
+Reviewed-by: Jagan Teki <jagan@openedev.com>
+Acked-by: Jun Nie <jun.nie@linaro.org>
+---
+ arch/arm/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+
+--- a/arch/arm/dts/sun8i-h3.dtsi
++++ b/arch/arm/dts/sun8i-h3.dtsi
+@@ -219,6 +219,19 @@
+ #size-cells = <0>;
+ };
+
++ usb_otg: usb@1c19000 {
++ compatible = "allwinner,sun8i-h3-musb";
++ reg = <0x01c19000 0x400>;
++ clocks = <&ccu CLK_BUS_OTG>;
++ resets = <&ccu RST_BUS_OTG>;
++ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "mc";
++ phys = <&usbphy 0>;
++ phy-names = "usb";
++ extcon = <&usbphy 0>;
++ status = "disabled";
++ };
++
+ usbphy: phy@01c19400 {
+ compatible = "allwinner,sun8i-h3-usb-phy";
+ reg = <0x01c19400 0x2c>,
+@@ -251,6 +264,25 @@
+ #phy-cells = <1>;
+ };
+
++ ehci0: usb@1c1a000 {
++ compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
++ reg = <0x01c1a000 0x100>;
++ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
++ resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
++ status = "disabled";
++ };
++
++ ohci0: usb@1c1a400 {
++ compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
++ reg = <0x01c1a400 0x100>;
++ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
++ <&ccu CLK_USB_OHCI0>;
++ resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
++ status = "disabled";
++ };
++
+ ehci1: usb@01c1b000 {
+ compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
+ reg = <0x01c1b000 0x100>;
-From 068fb0d5728c5ec93cb961718d59e7c718886edd Mon Sep 17 00:00:00 2001
+From fd3736abbe57a819312c8df96d14ec396b074581 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Tue, 26 Sep 2017 22:16:59 +0200
-Subject: sunxi: Add support for Orange Pi R1
+Subject: sun8i: h2: Add initial Orange Pi R1
-The device tree files are also submitted for inclusion into the Linux
-kernel.
+Orange Pi R1 is an open-source single-board computer using the
+Allwinner H2+ SOC.
+
+H2+ Orange Pi R1 has
+ - Quad-core Cortex-A7
+ - 256MB DDR3
+ - micrSD slot
+ - 128MBit SPI Nor flash
+ - Debug TTL UART
+ - 100MBit/s Ethernet (H2+)
+ - 100MBit/s Ethernet (RTL8152B)
+ - Wifi (RTL8189ETV)
+ - USB 2.0 OTG + power supply
+This board is very similar to the Orange Pi Zero.
+
+The device tree file is copied from the Linux kernel 4.18.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
- arch/arm/dts/Makefile | 1 +
- arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 77 ++++++++++++++++++++++++++++++
- board/sunxi/MAINTAINERS | 5 ++
- configs/orangepi_r1_defconfig | 26 ++++++++++
- 4 files changed, 109 insertions(+)
+ arch/arm/dts/Makefile | 1 +
+ arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 101 +++++++++++++++++++++++++++++
+ board/sunxi/MAINTAINERS | 5 ++
+ configs/orangepi_r1_defconfig | 16 +++++
+ 4 files changed, 123 insertions(+)
create mode 100644 arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
create mode 100644 configs/orangepi_r1_defconfig
sun8i-h3-libretech-all-h3-cc.dtb \
--- /dev/null
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
-@@ -0,0 +1,91 @@
+@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ */
+ reg_vcc_usb_eth: reg-vcc-usb-ethernet {
+ compatible = "regulator-fixed";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-usb-ethernet";
+ enable-active-high;
+ gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+};
+
++/*
++&spi0 {
++ status = "okay";
++
++ flash@0 {
++ compatible = "mxicy,mx25l12805d", "jedec,spi-nor";
++ };
++};
++*/
++
+&ohci1 {
+ /*
+ * RTL8152B USB-Ethernet adapter is connected to USB1,
S: Maintained
--- /dev/null
+++ b/configs/orangepi_r1_defconfig
-@@ -0,0 +1,18 @@
+@@ -0,0 +1,16 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
-+CONFIG_SPL_SPI_FLASH_SUPPORT=y
++CONFIG_SPL=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+# CONFIG_VIDEO_DE2 is not set
++CONFIG_SPL_SPI_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
-+CONFIG_SPL=y
-+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
-+# CONFIG_CMD_FPGA is not set
-+CONFIG_SPL_SPI_SUNXI=y
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+From fd576a3c594ee2356b50a0738403e5cef094935a Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Sat, 9 Jun 2018 15:16:42 +0200
+Subject: sun50i: h5: Add initial Orange Pi Zero Plus support
+
+Orange Pi Zero Plus is an open-source single-board computer
+using the Allwinner H5 SOC.
+
+H5 Orangepi Zero Plus has
+ - Quad-core Cortex-A53
+ - 512MB DDR3
+ - micrSD slot
+ - 16MBit SPI Nor flash
+ - Debug TTL UART
+ - 1GBit/s Ethernet (RTL8211E)
+ - Wifi (RTL8189FTV)
+ - USB 2.0 Host
+ - USB 2.0 OTG + power supply
+
+The device tree file is copied from the Linux kernel 4.18.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ arch/arm/dts/Makefile | 1 +
+ arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts | 145 ++++++++++++++++++++++++++
+ board/sunxi/MAINTAINERS | 5 +
+ configs/orangepi_zero_plus_defconfig | 16 +++
+ 4 files changed, 167 insertions(+)
+ create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
+ create mode 100644 configs/orangepi_zero_plus_defconfig
+
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -372,6 +372,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun50i-h5-orangepi-prime.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
--- /dev/null
-+++ b/configs/orangepi_zero_plus_defconfig
-@@ -0,0 +1,19 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_MACH_SUN50I_H5=y
-+CONFIG_DRAM_CLK=624
-+CONFIG_DRAM_ZQ=3881977
-+CONFIG_MACPWR="PD6"
-+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
-+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_SPL=y
-+# CONFIG_CMD_IMLS is not set
-+# CONFIG_CMD_FLASH is not set
-+# CONFIG_CMD_FPGA is not set
-+# CONFIG_SPL_DOS_PARTITION is not set
-+# CONFIG_SPL_ISO_PARTITION is not set
-+# CONFIG_SPL_EFI_PARTITION is not set
-+CONFIG_SPL_SPI_SUNXI=y
-+CONFIG_SUN8I_EMAC=y
-+CONFIG_USB_EHCI_HCD=y
---- /dev/null
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
-@@ -0,0 +1,113 @@
+@@ -0,0 +1,145 @@
+/*
-+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
-+ * Copyright (c) 2016 ARM Ltd.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This library is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This library is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
++ * Copyright (C) 2016 ARM Ltd.
++ * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
++ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
+ */
+
+/dts-v1/;
-+
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Xunlong Orange Pi Zero Plus";
-+ compatible = "xunlong,orangepizero-zero-plus", "allwinner,sun50i-h5";
++ compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
++
++ reg_vcc3v3: vcc3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
+
+ aliases {
++ ethernet0 = &emac;
++ ethernet1 = &rtl8189ftv;
+ serial0 = &uart0;
+ };
+
+ stdout-path = "serial0:115200n8";
+ };
+
-+ memory {
-+ reg = <0x40000000 0x40000000>;
++ leds {
++ compatible = "gpio-leds";
++
++ pwr {
++ label = "orangepi:green:pwr";
++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
++ default-state = "on";
++ };
++
++ status {
++ label = "orangepi:red:status";
++ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
++ };
+ };
+
-+ reg_vcc3v3: vcc3v3 {
++ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
-+ regulator-name = "vcc3v3";
++ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <100000>;
++ enable-active-high;
++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+ };
+};
+
++&ehci0 {
++ status = "okay";
++};
++
+&ehci1 {
+ status = "okay";
+};
+
-+&mmc0 {
-+ compatible = "allwinner,sun50i-h5-mmc",
-+ "allwinner,sun50i-a64-mmc",
-+ "allwinner,sun5i-a13-mmc";
++&emac {
+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
++ pinctrl-0 = <&emac_rgmii_pins>;
++ phy-supply = <®_gmac_3v3>;
++ phy-handle = <&ext_rgmii_phy>;
++ phy-mode = "rgmii";
++ status = "okay";
++};
++
++&external_mdio {
++ ext_rgmii_phy: ethernet-phy@1 {
++ compatible = "ethernet-phy-ieee802.3-c22";
++ reg = <1>;
++ };
++};
++
++&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
-+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
-+ cd-inverted;
++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
-+&mmc2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc2_8bit_pins>;
++&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
-+ bus-width = <8>;
++ bus-width = <4>;
+ non-removable;
-+ cap-mmc-hw-reset;
++ status = "okay";
++
++ /*
++ * Explicitly define the sdio device, so that we can add an ethernet
++ * alias for it (which e.g. makes u-boot set a mac-address).
++ */
++ rtl8189ftv: sdio_wifi@1 {
++ reg = <1>;
++ };
++};
++
++/*
++&spi0 {
++ status = "okay";
++
++ flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "mxicy,mx25l1606e", "winbond,w25q128";
++ reg = <0>;
++ spi-max-frequency = <40000000>;
++ };
++};
++*/
++
++&ohci0 {
+ status = "okay";
+};
+
+ status = "okay";
+};
+
++&usb_otg {
++ dr_mode = "peripheral";
++ status = "okay";
++};
++
+&usbphy {
++ /* USB Type-A ports' VBUS is always on */
++ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ status = "okay";
+};
+--- a/board/sunxi/MAINTAINERS
++++ b/board/sunxi/MAINTAINERS
+@@ -327,6 +327,11 @@ M: Icenowy Zheng <icenowy@aosc.xyz>
+ S: Maintained
+ F: configs/orangepi_zero_defconfig
+
++ORANGEPI ZERO PLUS BOARD
++M: Hauke Mehrtens <hauke@hauke-m.de>
++S: Maintained
++F: configs/orangepi_zero_plus_defconfig
++
+ ORANGEPI ZERO PLUS 2 BOARD
+ M: Jagan Teki <jagan@amarulasolutions.com>
+ S: Maintained
+--- /dev/null
++++ b/configs/orangepi_zero_plus_defconfig
+@@ -0,0 +1,16 @@
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_SPL=y
++CONFIG_MACH_SUN50I_H5=y
++CONFIG_DRAM_CLK=624
++CONFIG_DRAM_ZQ=3881977
++CONFIG_MMC0_CD_PIN="PH13"
++CONFIG_MMC_SUNXI_SLOT_EXTRA=2
++CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++# CONFIG_CMD_FLASH is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++# CONFIG_SPL_EFI_PARTITION is not set
++CONFIG_SUN8I_EMAC=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
projects / openwrt / staging / jow.git / commitdiff