if (ath79_soc == ATH79_SOC_AR9341 ||
ath79_soc == ATH79_SOC_AR9342 ||
ath79_soc == ATH79_SOC_AR9344 ||
+ ath79_soc == ATH79_SOC_QCA9556 ||
ath79_soc == ATH79_SOC_QCA9558)
max_id = 1;
else
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
+ case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558:
if (id == 0) {
mdio_dev = &ath79_mdio0_device;
}
mdio_data->is_ar934x = 1;
break;
+
case ATH79_SOC_QCA9558:
if (id == 1)
mdio_data->builtin_switch = 1;
mdio_data->is_ar934x = 1;
break;
+ case ATH79_SOC_QCA9556:
+ mdio_data->is_ar934x = 1;
+ break;
+
default:
break;
}
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
+ case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558:
pll_10 = AR934X_PLL_VAL_10;
pll_100 = AR934X_PLL_VAL_100;
}
break;
+ case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558:
switch (pdata->phy_if_mode) {
case PHY_INTERFACE_MODE_MII:
}
break;
+ case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558:
switch (pdata->phy_if_mode) {
case PHY_INTERFACE_MODE_MII:
pdata->fifo_cfg3 = 0x01f00140;
break;
+ case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558:
if (id == 0) {
pdata->reset_bit = QCA955X_RESET_GE0_MAC |
pdata->mii_bus_dev = &ath79_mdio1_device.dev;
break;
+ case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558:
/* don't assign any MDIO device by default */
break;