--- /dev/null
+From 776461b1795b4dc4084894cf53399044aafa1d21 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 11 Nov 2020 15:55:38 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Move CRU devices to the CRU node
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or
+"Central Resource Unit").
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 51 +++++++++++++++++----------------
+ 1 file changed, 26 insertions(+), 25 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -428,6 +428,26 @@
+ #address-cells = <1>;
+ #size-cells = <1>;
+
++ lcpll0: lcpll0@100 {
++ #clock-cells = <1>;
++ compatible = "brcm,nsp-lcpll0";
++ reg = <0x100 0x14>;
++ clocks = <&osc>;
++ clock-output-names = "lcpll0", "pcie_phy",
++ "sdio", "ddr_phy";
++ };
++
++ genpll: genpll@140 {
++ #clock-cells = <1>;
++ compatible = "brcm,nsp-genpll";
++ reg = <0x140 0x24>;
++ clocks = <&osc>;
++ clock-output-names = "genpll", "phy",
++ "ethernetclk",
++ "usbclk", "iprocfast",
++ "sata1", "sata2";
++ };
++
+ pinctrl: pin-controller@1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+ reg = <0x1c0 0x24>;
+@@ -454,32 +474,13 @@
+ function = "uart1";
+ };
+ };
+- };
+- };
+
+- lcpll0: lcpll0@1800c100 {
+- #clock-cells = <1>;
+- compatible = "brcm,nsp-lcpll0";
+- reg = <0x1800c100 0x14>;
+- clocks = <&osc>;
+- clock-output-names = "lcpll0", "pcie_phy", "sdio",
+- "ddr_phy";
+- };
+-
+- genpll: genpll@1800c140 {
+- #clock-cells = <1>;
+- compatible = "brcm,nsp-genpll";
+- reg = <0x1800c140 0x24>;
+- clocks = <&osc>;
+- clock-output-names = "genpll", "phy", "ethernetclk",
+- "usbclk", "iprocfast", "sata1",
+- "sata2";
+- };
+-
+- thermal: thermal@1800c2c0 {
+- compatible = "brcm,ns-thermal";
+- reg = <0x1800c2c0 0x10>;
+- #thermal-sensor-cells = <0>;
++ thermal: thermal@2c0 {
++ compatible = "brcm,ns-thermal";
++ reg = <0x2c0 0x10>;
++ #thermal-sensor-cells = <0>;
++ };
++ };
+ };
+
+ srab: srab@18007000 {
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -482,7 +482,7 @@
- #thermal-sensor-cells = <0>;
+@@ -483,7 +483,7 @@
+ };
};
- srab: srab@18007000 {
+};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -483,7 +483,7 @@
+@@ -484,7 +484,7 @@
};
srab: ethernet-switch@18007000 {
label = "lan4";
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -489,6 +489,10 @@
+@@ -490,6 +490,10 @@
status = "disabled";
/* ports are defined in board DTS */
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -500,7 +500,7 @@
+@@ -501,7 +501,7 @@
reg = <0x18004000 0x14>;
};
};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -438,18 +438,18 @@
+@@ -458,18 +458,18 @@
function = "spi";
};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -422,16 +422,12 @@
+@@ -422,7 +422,7 @@
#size-cells = <1>;
cru@100 {
- compatible = "simple-bus";
+ compatible = "syscon", "simple-mfd";
reg = <0x100 0x1a4>;
-- ranges;
-- #address-cells = <1>;
-- #size-cells = <1>;
+ ranges;
+ #address-cells = <1>;
+@@ -448,10 +448,9 @@
+ "sata1", "sata2";
+ };
- pinctrl: pin-controller@1c0 {
-+ pinctrl: pinctrl {
++ pinctrl: pin-controller {
compatible = "brcm,bcm4708-pinmux";
- reg = <0x1c0 0x24>;
- reg-names = "cru_gpio_control";
--- /dev/null
+From 776461b1795b4dc4084894cf53399044aafa1d21 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 11 Nov 2020 15:55:38 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Move CRU devices to the CRU node
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or
+"Central Resource Unit").
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 51 +++++++++++++++++----------------
+ 1 file changed, 26 insertions(+), 25 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -428,6 +428,26 @@
+ #address-cells = <1>;
+ #size-cells = <1>;
+
++ lcpll0: lcpll0@100 {
++ #clock-cells = <1>;
++ compatible = "brcm,nsp-lcpll0";
++ reg = <0x100 0x14>;
++ clocks = <&osc>;
++ clock-output-names = "lcpll0", "pcie_phy",
++ "sdio", "ddr_phy";
++ };
++
++ genpll: genpll@140 {
++ #clock-cells = <1>;
++ compatible = "brcm,nsp-genpll";
++ reg = <0x140 0x24>;
++ clocks = <&osc>;
++ clock-output-names = "genpll", "phy",
++ "ethernetclk",
++ "usbclk", "iprocfast",
++ "sata1", "sata2";
++ };
++
+ pinctrl: pin-controller@1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+ reg = <0x1c0 0x24>;
+@@ -454,32 +474,13 @@
+ function = "uart1";
+ };
+ };
+- };
+- };
+
+- lcpll0: lcpll0@1800c100 {
+- #clock-cells = <1>;
+- compatible = "brcm,nsp-lcpll0";
+- reg = <0x1800c100 0x14>;
+- clocks = <&osc>;
+- clock-output-names = "lcpll0", "pcie_phy", "sdio",
+- "ddr_phy";
+- };
+-
+- genpll: genpll@1800c140 {
+- #clock-cells = <1>;
+- compatible = "brcm,nsp-genpll";
+- reg = <0x1800c140 0x24>;
+- clocks = <&osc>;
+- clock-output-names = "genpll", "phy", "ethernetclk",
+- "usbclk", "iprocfast", "sata1",
+- "sata2";
+- };
+-
+- thermal: thermal@1800c2c0 {
+- compatible = "brcm,ns-thermal";
+- reg = <0x1800c2c0 0x10>;
+- #thermal-sensor-cells = <0>;
++ thermal: thermal@2c0 {
++ compatible = "brcm,ns-thermal";
++ reg = <0x2c0 0x10>;
++ #thermal-sensor-cells = <0>;
++ };
++ };
+ };
+
+ srab: srab@18007000 {
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -482,7 +482,7 @@
- #thermal-sensor-cells = <0>;
+@@ -483,7 +483,7 @@
+ };
};
- srab: srab@18007000 {
+};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -483,7 +483,7 @@
+@@ -484,7 +484,7 @@
};
srab: ethernet-switch@18007000 {
label = "lan4";
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -489,6 +489,10 @@
+@@ -490,6 +490,10 @@
status = "disabled";
/* ports are defined in board DTS */
#address-cells = <1>;
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -500,7 +500,7 @@
+@@ -501,7 +501,7 @@
reg = <0x18004000 0x14>;
};
};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -438,18 +438,18 @@
+@@ -458,18 +458,18 @@
function = "spi";
};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -422,16 +422,12 @@
+@@ -422,7 +422,7 @@
#size-cells = <1>;
cru@100 {
- compatible = "simple-bus";
+ compatible = "syscon", "simple-mfd";
reg = <0x100 0x1a4>;
-- ranges;
-- #address-cells = <1>;
-- #size-cells = <1>;
+ ranges;
+ #address-cells = <1>;
+@@ -448,10 +448,9 @@
+ "sata1", "sata2";
+ };
- pinctrl: pin-controller@1c0 {
-+ pinctrl: pinctrl {
++ pinctrl: pin-controller {
compatible = "brcm,bcm4708-pinmux";
- reg = <0x1c0 0x24>;
- reg-names = "cru_gpio_control";