the Vcore voltage of the processor. The early IT8712F have 5 VID pins,
the IT8716F and late IT8712F have 6. They are shared with other functions
though, so the functionality may not be available on a given system.
-The driver dumbly assume it is there.
The IT8718F and IT8720F also features VID inputs (up to 8 pins) but the value
is stored in the Super-I/O configuration space. Due to technical limitations,
#define IT87_BASE_REG 0x60
/* Logical device 7 registers (IT8712F and later) */
+#define IT87_SIO_GPIO3_REG 0x27
#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
#define IT87_SIO_VID_REG 0xfc /* VID value */
/* Values read from Super-I/O config space */
u8 revision;
u8 vid_value;
+ u8 skip_vid;
/* Values set based on DMI strings */
u8 skip_pwm;
};
chip_type, *address, sio_data->revision);
/* Read GPIO config and VID value from LDN 7 (GPIO) */
- if (sio_data->type != it87) {
+ if (sio_data->type == it87) {
+ /* The IT8705F doesn't have VID pins at all */
+ sio_data->skip_vid = 1;
+ } else {
int reg;
superio_select(GPIO);
- if (sio_data->type == it8718 || sio_data->type == it8720)
+ /* We need at least 4 VID pins */
+ reg = superio_inb(IT87_SIO_GPIO3_REG);
+ if (reg & 0x0f) {
+ pr_info("it87: VID is disabled (pins used for GPIO)\n");
+ sio_data->skip_vid = 1;
+ }
+
+ if ((sio_data->type == it8718 || sio_data->type == it8720)
+ && !(sio_data->skip_vid))
sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
reg = superio_inb(IT87_SIO_PINX2_REG);
}
}
- if (data->type == it8712 || data->type == it8716
- || data->type == it8718 || data->type == it8720) {
+ if (!sio_data->skip_vid) {
data->vrm = vid_which_vrm();
/* VID reading from Super-I/O config space if available */
data->vid = sio_data->vid_value;