drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()

For bdw+ let's move the GAMMA_MODE write for the legacy LUT
mode into the .load_luts() funciton directly, rather than
relying on haswell_load_luts(). We'll be getting rid of
haswell_load_luts() entirely soon, and it's anyway cleaner
to have the GAMMA_MODE write in a single place.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190205160848.24662-5-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index 96d4ece4870c6234250ca93e30d5e94787ef398c..171dff60d62f348caaa4ca9c33c8f592ac3487cb 100644 (file)
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -473,21 +473,20 @@ static void broadwell_load_luts(const struct intel_crtc_state *crtc_state)
        enum pipe pipe = crtc->pipe;
 
        if (crtc_state_is_legacy_gamma(crtc_state)) {
-               haswell_load_luts(crtc_state);
-               return;
-       }
+               i9xx_load_luts(crtc_state);
+       } else {
+               bdw_load_degamma_lut(crtc_state);
+               bdw_load_gamma_lut(crtc_state,
+                                  INTEL_INFO(dev_priv)->color.degamma_lut_size);
 
-       bdw_load_degamma_lut(crtc_state);
-       bdw_load_gamma_lut(crtc_state,
-                          INTEL_INFO(dev_priv)->color.degamma_lut_size);
+               /*
+                * Reset the index, otherwise it prevents the legacy palette to be
+                * written properly.
+                */
+               I915_WRITE(PREC_PAL_INDEX(pipe), 0);
+       }
 
        I915_WRITE(GAMMA_MODE(pipe), crtc_state->gamma_mode);
-
-       /*
-        * Reset the index, otherwise it prevents the legacy palette to be
-        * written properly.
-        */
-       I915_WRITE(PREC_PAL_INDEX(pipe), 0);
 }
 
 static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
@@ -530,11 +529,16 @@ static void glk_load_luts(const struct intel_crtc_state *crtc_state)
        glk_load_degamma_lut(crtc_state);
 
        if (crtc_state_is_legacy_gamma(crtc_state)) {
-               haswell_load_luts(crtc_state);
-               return;
-       }
+               i9xx_load_luts(crtc_state);
+       } else {
+               bdw_load_gamma_lut(crtc_state, 0);
 
-       bdw_load_gamma_lut(crtc_state, 0);
+               /*
+                * Reset the index, otherwise it prevents the legacy palette to be
+                * written properly.
+                */
+               I915_WRITE(PREC_PAL_INDEX(pipe), 0);
+       }
 
        I915_WRITE(GAMMA_MODE(pipe), crtc_state->gamma_mode);
 }