Tegra186: mce: add the mce_update_cstate_info() helper function

This patch adds a helper function to the MCE driver to allow its
clients to issue UPDATE_CSTATE_INFO requests, without having to
setup the CPU context struct.

We introduced a struct to encapsulate the request parameters, that
clients can pass on to the MCE driver. The MCE driver gets the
parameters from the struct and programs the hardware accordingly.

Change-Id: I02bce57506c4ccd90da82127805d6b564375cbf1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

diff --git a/plat/nvidia/tegra/soc/t186/drivers/include/mce.h b/plat/nvidia/tegra/soc/t186/drivers/include/mce.h
index 606569236b9f15ac775b89df92927cd34ce8c600..38ca32c37d352001807bd2bf0faf9dd84ddfd3a2 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/drivers/include/mce.h
+++ b/plat/nvidia/tegra/soc/t186/drivers/include/mce.h
@@ -101,6 +101,24 @@ typedef enum mce_cmd {
 
 #define MCE_CMD_MASK                           0xFF
 
+/*******************************************************************************
+ * Struct to prepare UPDATE_CSTATE_INFO request
+ ******************************************************************************/
+typedef struct mce_cstate_info {
+       /* cluster cstate value */
+       uint32_t cluster;
+       /* ccplex cstate value */
+       uint32_t ccplex;
+       /* system cstate value */
+       uint32_t system;
+       /* force system state? */
+       uint8_t system_state_force;
+       /* wake mask value */
+       uint32_t wake_mask;
+       /* update the wake mask? */
+       uint8_t update_wake_mask;
+} mce_cstate_info_t;
+
 /*******************************************************************************
  * Macros to prepare CSTATE info request
  ******************************************************************************/
@@ -322,6 +340,7 @@ int mce_update_gsc_videomem(void);
 int mce_update_gsc_tzdram(void);
 int mce_update_gsc_tzram(void);
 __dead2 void mce_enter_ccplex_state(uint32_t state_idx);
+void mce_update_cstate_info(mce_cstate_info_t *cstate);
 void mce_verify_firmware_version(void);
 
 /* declarations for ARI/NVG handler functions */

diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c b/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c
index 9d0d71fd652497295d8f52e92bbfda71df8f2b29..1a712dcca69aa6283d1c7c16c4d0b921e0d565a8 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c
+++ b/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c
@@ -448,6 +448,19 @@ __dead2 void mce_enter_ccplex_state(uint32_t state_idx)
        panic();
 }
 
+/*******************************************************************************
+ * Handler to issue the UPDATE_CSTATE_INFO request
+ ******************************************************************************/
+void mce_update_cstate_info(mce_cstate_info_t *cstate)
+{
+       arch_mce_ops_t *ops = mce_get_curr_cpu_ops();
+
+       /* issue the UPDATE_CSTATE_INFO request */
+       ops->update_cstate_info(mce_get_curr_cpu_ari_base(), cstate->cluster,
+               cstate->ccplex, cstate->system, cstate->system_state_force,
+               cstate->wake_mask, cstate->update_wake_mask);
+}
+
 /*******************************************************************************
  * Handler to read the MCE firmware version and check if it is compatible
  * with interface header the BL3-1 was compiled against