+++ /dev/null
-From b11ce7e48121a02ceedec9f4dfcab4f2bee8f35f Mon Sep 17 00:00:00 2001
-From: Linus Walleij <linus.walleij@linaro.org>
-Date: Thu, 9 Mar 2023 08:45:54 +0100
-Subject: gpio: ath79: Convert to immutable irq_chip
-
-Convert the driver to immutable irq-chip with a bit of
-intuition.
-
-Cc: Marc Zyngier <maz@kernel.org>
-Acked-by: Marc Zyngier <maz@kernel.org>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
----
- drivers/gpio/gpio-ath79.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
---- a/drivers/gpio/gpio-ath79.c
-+++ b/drivers/gpio/gpio-ath79.c
-@@ -71,6 +71,7 @@ static void ath79_gpio_irq_unmask(struct
- u32 mask = BIT(irqd_to_hwirq(data));
- unsigned long flags;
-
-+ gpiochip_enable_irq(&ctrl->gc, irqd_to_hwirq(data));
- raw_spin_lock_irqsave(&ctrl->lock, flags);
- ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask);
- raw_spin_unlock_irqrestore(&ctrl->lock, flags);
-@@ -85,6 +86,7 @@ static void ath79_gpio_irq_mask(struct i
- raw_spin_lock_irqsave(&ctrl->lock, flags);
- ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0);
- raw_spin_unlock_irqrestore(&ctrl->lock, flags);
-+ gpiochip_disable_irq(&ctrl->gc, irqd_to_hwirq(data));
- }
-
- static void ath79_gpio_irq_enable(struct irq_data *data)
-@@ -169,13 +171,15 @@ static int ath79_gpio_irq_set_type(struc
- return 0;
- }
-
--static struct irq_chip ath79_gpio_irqchip = {
-+static const struct irq_chip ath79_gpio_irqchip = {
- .name = "gpio-ath79",
- .irq_enable = ath79_gpio_irq_enable,
- .irq_disable = ath79_gpio_irq_disable,
- .irq_mask = ath79_gpio_irq_mask,
- .irq_unmask = ath79_gpio_irq_unmask,
- .irq_set_type = ath79_gpio_irq_set_type,
-+ .flags = IRQCHIP_IMMUTABLE,
-+ GPIOCHIP_IRQ_RESOURCE_HELPERS,
- };
-
- static void ath79_gpio_irq_handler(struct irq_desc *desc)
-@@ -274,7 +278,7 @@ static int ath79_gpio_probe(struct platf
- /* Optional interrupt setup */
- if (!np || of_property_read_bool(np, "interrupt-controller")) {
- girq = &ctrl->gc.irq;
-- girq->chip = &ath79_gpio_irqchip;
-+ gpio_irq_chip_set_chip(girq, &ath79_gpio_irqchip);
- girq->parent_handler = ath79_gpio_irq_handler;
- girq->num_parents = 1;
- girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
--- a/drivers/gpio/gpio-ath79.c
+++ b/drivers/gpio/gpio-ath79.c
-@@ -301,7 +301,11 @@ static struct platform_driver ath79_gpio
+@@ -302,7 +302,11 @@ static struct platform_driver ath79_gpio
.probe = ath79_gpio_probe,
};
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -257,6 +257,8 @@ config ATH79
+@@ -255,6 +255,8 @@ config ATH79
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_MIPS16
select SYS_SUPPORTS_ZBOOT_UART_PROM
help
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
-@@ -1,48 +1,14 @@
+@@ -1,32 +1,14 @@
# SPDX-License-Identifier: GPL-2.0
if ATH79
def_bool n
config PCI_AR724X
-- def_bool n
--
--config ATH79_DEV_GPIO_BUTTONS
-- def_bool n
--
--config ATH79_DEV_LEDS_GPIO
-- def_bool n
--
--config ATH79_DEV_SPI
-- def_bool n
--
--config ATH79_DEV_USB
-- def_bool n
--
--config ATH79_DEV_WMAC
-- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
+ bool "PCI support for AR724x type SoCs"
+ depends on PCI
def_bool n
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
-@@ -2964,12 +2964,19 @@ static void spi_nor_set_mtd_info(struct
+@@ -3420,12 +3420,19 @@ static void spi_nor_set_mtd_info(struct
{
struct mtd_info *mtd = &nor->mtd;
struct device *dev = nor->dev;
mtd->flags = MTD_CAP_NORFLASH;
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
-@@ -863,6 +863,17 @@ out_error:
+@@ -870,6 +870,17 @@ out_error:
*/
static void mtd_set_dev_defaults(struct mtd_info *mtd)
{
--- a/drivers/Makefile
+++ b/drivers/Makefile
-@@ -80,8 +80,8 @@ obj-y += scsi/
+@@ -87,8 +87,8 @@ obj-y += scsi/
obj-y += nvme/
obj-$(CONFIG_ATA) += ata/
obj-$(CONFIG_TARGET_CORE) += target/
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
-@@ -557,4 +557,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
+@@ -543,4 +543,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
load time (assuming you build diskonchip as a module) with the module
parameter "inftl_bbt_write=1".
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
-@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_INTEL_LGM) += inte
+@@ -57,6 +57,7 @@ obj-$(CONFIG_MTD_NAND_INTEL_LGM) += inte
obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rockchip-nand-controller.o
obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o
obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
-@@ -24,6 +24,22 @@ config GENERIC_PHY_MIPI_DPHY
+@@ -25,6 +25,22 @@ config GENERIC_PHY_MIPI_DPHY
Provides a number of helpers a core functions for MIPI D-PHY
drivers to us.
+ return PTR_ERR(priv->phy);
+ }
+
-+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0);
-+ if (priv->gpio >= 0) {
++ priv->gpio = of_get_named_gpio(pdev->dev.of_node, "gpios", 0);
++ if (gpio_is_valid(priv->gpio)) {
+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev));
+
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request gpio\n");
+ return ret;
+ }
-+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev));
++ gpio_export_with_name(gpio_to_desc(priv->gpio), 0, dev_name(&pdev->dev));
+ gpio_set_value(priv->gpio, 1);
+ }
+
+ return PTR_ERR(priv->phy);
+ }
+
-+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0);
-+ if (priv->gpio >= 0) {
++ priv->gpio = of_get_named_gpio(pdev->dev.of_node, "gpios", 0);
++ if (gpio_is_valid(priv->gpio)) {
+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev));
+
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request gpio\n");
+ return ret;
+ }
-+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev));
++ gpio_export_with_name(gpio_to_desc(priv->gpio), 0, dev_name(&pdev->dev));
+ gpio_set_value(priv->gpio, 1);
+ }
+
--- a/drivers/net/mdio/mdio-bitbang.c
+++ b/drivers/net/mdio/mdio-bitbang.c
-@@ -152,7 +152,7 @@ static int mdiobb_cmd_addr(struct mdiobb
- int mdiobb_read(struct mii_bus *bus, int phy, int reg)
+@@ -148,23 +148,11 @@ static void mdiobb_cmd_addr(struct mdiob
+ static int mdiobb_read_common(struct mii_bus *bus, int phy)
{
struct mdiobb_ctrl *ctrl = bus->priv;
- int ret, i;
+ int ret;
- if (reg & MII_ADDR_C45) {
- reg = mdiobb_cmd_addr(ctrl, phy, reg);
-@@ -162,19 +162,7 @@ int mdiobb_read(struct mii_bus *bus, int
-
ctrl->ops->set_mdio_dir(ctrl, 0);
- /* check the turnaround bit: the PHY should be driving it to zero, if this
#include <linux/delay.h>
#include <linux/mdio-bitbang.h>
#include <linux/module.h>
-@@ -153,7 +154,9 @@ int mdiobb_read(struct mii_bus *bus, int
+@@ -161,22 +162,32 @@ static int mdiobb_read_common(struct mii
+
+ int mdiobb_read_c22(struct mii_bus *bus, int phy, int reg)
{
++ int ret;
++ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
- int ret;
+
++ local_irq_save(flags);
+ mdiobb_cmd(ctrl, ctrl->op_c22_read, phy, reg);
+
+- return mdiobb_read_common(bus, phy);
++ ret = mdiobb_read_common(bus, phy);
++ local_irq_restore(flags);
++ return ret;
+ }
+ EXPORT_SYMBOL(mdiobb_read_c22);
+
+ int mdiobb_read_c45(struct mii_bus *bus, int phy, int devad, int reg)
+ {
++ int ret;
+ unsigned long flags;
+ struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
- if (reg & MII_ADDR_C45) {
- reg = mdiobb_cmd_addr(ctrl, phy, reg);
- mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg);
-@@ -166,6 +169,7 @@ int mdiobb_read(struct mii_bus *bus, int
+ mdiobb_cmd_addr(ctrl, phy, devad, reg);
+ mdiobb_cmd(ctrl, MDIO_C45_READ, phy, devad);
- ret = mdiobb_get_num(ctrl, 16);
- mdiobb_get_bit(ctrl);
+- return mdiobb_read_common(bus, phy);
++ ret = mdiobb_read_common(bus, phy);
+ local_irq_restore(flags);
- return ret;
++ return ret;
}
- EXPORT_SYMBOL(mdiobb_read);
-@@ -173,7 +177,9 @@ EXPORT_SYMBOL(mdiobb_read);
- int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
+ EXPORT_SYMBOL(mdiobb_read_c45);
+
+@@ -197,22 +208,32 @@ static int mdiobb_write_common(struct mi
+
+ int mdiobb_write_c22(struct mii_bus *bus, int phy, int reg, u16 val)
{
++ int ret;
++ unsigned long flags;
struct mdiobb_ctrl *ctrl = bus->priv;
+
++ local_irq_save(flags);
+ mdiobb_cmd(ctrl, ctrl->op_c22_write, phy, reg);
+
+- return mdiobb_write_common(bus, val);
++ ret = mdiobb_write_common(bus, val);
++ local_irq_restore(flags);
++ return ret;
+ }
+ EXPORT_SYMBOL(mdiobb_write_c22);
+
+ int mdiobb_write_c45(struct mii_bus *bus, int phy, int devad, int reg, u16 val)
+ {
++ int ret;
+ unsigned long flags;
+ struct mdiobb_ctrl *ctrl = bus->priv;
+ local_irq_save(flags);
- if (reg & MII_ADDR_C45) {
- reg = mdiobb_cmd_addr(ctrl, phy, reg);
- mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg);
-@@ -188,6 +194,8 @@ int mdiobb_write(struct mii_bus *bus, in
+ mdiobb_cmd_addr(ctrl, phy, devad, reg);
+ mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, devad);
- ctrl->ops->set_mdio_dir(ctrl, 0);
- mdiobb_get_bit(ctrl);
+- return mdiobb_write_common(bus, val);
++ ret = mdiobb_write_common(bus, val);
+ local_irq_restore(flags);
-+
- return 0;
++ return ret;
}
- EXPORT_SYMBOL(mdiobb_write);
+ EXPORT_SYMBOL(mdiobb_write_c45);
+
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
-@@ -874,6 +874,17 @@ source "drivers/leds/flash/Kconfig"
+@@ -901,6 +901,17 @@ source "drivers/leds/flash/Kconfig"
comment "RGB LED drivers"
source "drivers/leds/rgb/Kconfig"
+MODULE_ALIAS("platform:leds-reset");
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
-@@ -86,6 +86,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds
+@@ -88,6 +88,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds
obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o
obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o
obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o
#define UDP_CORK 1 /* Never send partially complete segments */
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
-@@ -308,8 +308,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
+@@ -298,8 +298,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
switch (l3num) {
case NFPROTO_IPV4:
#include <linux/uaccess.h>
#include <linux/ipv6.h>
#include <linux/icmpv6.h>
-@@ -901,10 +902,10 @@ static void tcp_v6_send_response(const s
+@@ -897,10 +898,10 @@ static void tcp_v6_send_response(const s
topt = (__be32 *)(t1 + 1);
if (tsecr) {
*/
--- a/net/ipv6/datagram.c
+++ b/net/ipv6/datagram.c
-@@ -497,7 +497,7 @@ int ipv6_recv_error(struct sock *sk, str
+@@ -499,7 +499,7 @@ int ipv6_recv_error(struct sock *sk, str
ipv6_iface_scope_id(&sin->sin6_addr,
IP6CB(skb)->iif);
} else {
&sin->sin6_addr);
sin->sin6_scope_id = 0;
}
-@@ -851,12 +851,12 @@ int ip6_datagram_send_ctl(struct net *ne
+@@ -853,12 +853,12 @@ int ip6_datagram_send_ctl(struct net *ne
}
if (fl6->flowlabel&IPV6_FLOWINFO_MASK) {
case IPV6_2292HOPOPTS:
--- a/net/ipv6/exthdrs.c
+++ b/net/ipv6/exthdrs.c
-@@ -1013,7 +1013,7 @@ static bool ipv6_hop_jumbo(struct sk_buf
+@@ -982,7 +982,7 @@ static bool ipv6_hop_jumbo(struct sk_buf
goto drop;
}
SKB_DROP_REASON_IP_INHDR);
--- a/include/linux/types.h
+++ b/include/linux/types.h
-@@ -232,5 +232,11 @@ typedef void (*swap_func_t)(void *a, voi
+@@ -244,5 +244,11 @@ typedef void (*swap_func_t)(void *a, voi
typedef int (*cmp_r_func_t)(const void *a, const void *b, const void *priv);
typedef int (*cmp_func_t)(const void *a, const void *b);
#endif /* _LINUX_TYPES_H */
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
-@@ -1515,8 +1515,8 @@ struct sk_buff *inet_gro_receive(struct
- if (unlikely(ip_fast_csum((u8 *)iph, 5)))
+@@ -1506,8 +1506,8 @@ struct sk_buff *inet_gro_receive(struct
goto out;
+ NAPI_GRO_CB(skb)->proto = proto;
- id = ntohl(*(__be32 *)&iph->id);
- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF));
+ id = ntohl(net_hdr_word(&iph->id));
list_for_each_entry(p, head, list) {
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
-@@ -612,48 +612,53 @@ static void tcp_options_write(struct tcp
+@@ -620,48 +620,53 @@ static void tcp_options_write(struct tcp
u16 options = opts->options; /* mungable copy */
if (unlikely(OPTION_MD5 & options)) {
}
if (unlikely(opts->num_sack_blocks)) {
-@@ -661,16 +666,17 @@ static void tcp_options_write(struct tcp
+@@ -669,16 +674,17 @@ static void tcp_options_write(struct tcp
tp->duplicate_sack : tp->selective_acks;
int this_sack;
}
tp->rx_opt.dsack = 0;
-@@ -683,13 +689,14 @@ static void tcp_options_write(struct tcp
+@@ -691,13 +697,14 @@ static void tcp_options_write(struct tcp
if (foc->exp) {
len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len;
#define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */
--- a/net/core/flow_dissector.c
+++ b/net/core/flow_dissector.c
-@@ -131,7 +131,7 @@ __be32 __skb_flow_get_ports(const struct
+@@ -132,7 +132,7 @@ __be32 __skb_flow_get_ports(const struct
ports = __skb_header_pointer(skb, thoff + poff,
sizeof(_ports), data, hlen, &_ports);
if (ports)
static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey)
--- a/net/sched/cls_u32.c
+++ b/net/sched/cls_u32.c
-@@ -155,7 +155,7 @@ next_knode:
+@@ -157,7 +157,7 @@ next_knode:
data = skb_header_pointer(skb, toff, 4, &hdata);
if (!data)
goto out;
n = rcu_dereference_bh(n->next);
goto next_knode;
}
-@@ -206,8 +206,8 @@ check_terminal:
+@@ -208,8 +208,8 @@ check_terminal:
&hdata);
if (!data)
goto out;
goto next_ht;
--- a/net/ipv6/ip6_offload.c
+++ b/net/ipv6/ip6_offload.c
-@@ -290,7 +290,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff *
+@@ -273,7 +273,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff *
continue;
iph2 = (struct ipv6hdr *)(p->data + off);
/*
* Jumbo payload option, as described in RFC 2675 2.
-@@ -615,8 +615,8 @@ static inline void __ipv6_addr_set_half(
+@@ -649,8 +649,8 @@ static inline void __ipv6_addr_set_half(
}
#endif
#endif
}
static inline void ipv6_addr_set(struct in6_addr *addr,
-@@ -675,6 +675,8 @@ static inline bool ipv6_prefix_equal(con
+@@ -709,6 +709,8 @@ static inline bool ipv6_prefix_equal(con
const __be32 *a1 = addr1->s6_addr32;
const __be32 *a2 = addr2->s6_addr32;
unsigned int pdw, pbi;
/* check complete u32 in prefix */
pdw = prefixlen >> 5;
-@@ -683,7 +685,9 @@ static inline bool ipv6_prefix_equal(con
+@@ -717,7 +719,9 @@ static inline bool ipv6_prefix_equal(con
/* check incomplete u32 in prefix */
pbi = prefixlen & 0x1f;
return false;
return true;
-@@ -805,13 +809,13 @@ static inline void ipv6_addr_set_v4mappe
+@@ -839,13 +843,13 @@ static inline void ipv6_addr_set_v4mappe
*/
static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen)
{
if (xb)
return i * 32 + 31 - __fls(ntohl(xb));
}
-@@ -1005,17 +1009,18 @@ static inline u32 ip6_multipath_hash_fie
+@@ -1040,17 +1044,18 @@ static inline u32 ip6_multipath_hash_fie
static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass,
__be32 flowlabel)
{
#define IP_TOS 1
--- a/net/ipv6/ip6_fib.c
+++ b/net/ipv6/ip6_fib.c
-@@ -142,7 +142,7 @@ static __be32 addr_bit_set(const void *t
+@@ -141,7 +141,7 @@ static __be32 addr_bit_set(const void *t
* See include/asm-generic/bitops/le.h.
*/
return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) &
EXPORT_SYMBOL(xfrm_parse_spi);
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
-@@ -4183,14 +4183,16 @@ static bool tcp_parse_aligned_timestamp(
+@@ -4188,14 +4188,16 @@ static bool tcp_parse_aligned_timestamp(
{
const __be32 *ptr = (const __be32 *)(th + 1);
--- a/net/ipv4/tcp_offload.c
+++ b/net/ipv4/tcp_offload.c
-@@ -62,7 +62,7 @@ static struct sk_buff *__tcpv4_gso_segme
+@@ -63,7 +63,7 @@ static struct sk_buff *__tcpv4_gso_segme
th2 = tcp_hdr(seg->next);
iph2 = ip_hdr(seg->next);
iph->daddr == iph2->daddr && iph->saddr == iph2->saddr)
return segs;
-@@ -254,7 +254,7 @@ struct sk_buff *tcp_gro_lookup(struct li
+@@ -255,7 +255,7 @@ struct sk_buff *tcp_gro_lookup(struct li
continue;
th2 = tcp_hdr(p);
NAPI_GRO_CB(p)->same_flow = 0;
continue;
}
-@@ -320,8 +320,8 @@ struct sk_buff *tcp_gro_receive(struct l
+@@ -321,8 +321,8 @@ struct sk_buff *tcp_gro_receive(struct l
~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH));
flush |= (__force int)(th->ack_seq ^ th2->ack_seq);
for (i = sizeof(*th); i < thlen; i += 4)
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
-@@ -2209,6 +2209,14 @@ config RAVE_SP_CORE
+@@ -2261,6 +2261,14 @@ config RAVE_SP_CORE
Select this to get support for the Supervisory Processor
device found on several devices in RAVE line of hardware.
+obj-$(CONFIG_MFD_RB4XX_CPLD) += rb4xx-cpld.o
obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o
obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o
- obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o
+ obj-$(CONFIG_MFD_SMPRO) += smpro-core.o
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
-@@ -1594,6 +1594,12 @@ config GPIO_SODAVILLE
+@@ -1696,6 +1696,12 @@ config GPIO_SODAVILLE
help
Say Y here to support Intel Sodaville GPIO.
menu "SPI GPIO expanders"
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -123,6 +123,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061.
+@@ -131,6 +131,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061.
obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
obj-$(CONFIG_GPIO_RDA) += gpio-rda.o
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
-@@ -565,4 +565,11 @@ config MTD_NAND_AR934X
+@@ -551,4 +551,11 @@ config MTD_NAND_AR934X
Enables support for NAND controller on Qualcomm Atheros SoCs.
This controller is found on AR934x and QCA955x SoCs.
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
-@@ -60,6 +60,7 @@ obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rock
+@@ -58,6 +58,7 @@ obj-$(CONFIG_MTD_NAND_ROCKCHIP) += rock
obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-nand-controller.o
obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o
obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
-@@ -368,6 +368,12 @@ config GPIO_IXP4XX
+@@ -371,6 +371,12 @@ config GPIO_IXP4XX
If unsure, say N.
config GPIO_LOGICVC
tristate "Xylon LogiCVC GPIO support"
depends on MFD_SYSCON && OF
-@@ -544,6 +550,10 @@ config GPIO_ROCKCHIP
+@@ -553,6 +559,10 @@ config GPIO_ROCKCHIP
help
Say yes here to support GPIO on Rockchip SoCs.
depends on MFD_SYSCON
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -76,6 +76,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o
- obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o
+@@ -81,6 +81,7 @@ obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4x
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
+ obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o
+obj-$(CONFIG_GPIO_LATCH_MIKROTIK) += gpio-latch-mikrotik.o
+ obj-$(CONFIG_GPIO_LJCA) += gpio-ljca.o
obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o
obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
- obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
-@@ -124,6 +125,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio
+@@ -132,6 +133,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o
obj-$(CONFIG_GPIO_RDA) += gpio-rda.o
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
-@@ -572,4 +572,10 @@ config MTD_NAND_RB4XX
+@@ -558,4 +558,10 @@ config MTD_NAND_RB4XX
Enables support for the NAND flash chip on Mikrotik Routerboard
RB4xx series.
endif # MTD_RAW_NAND
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
-@@ -61,6 +61,7 @@ obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-n
+@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_PL35X) += pl35x-n
obj-$(CONFIG_MTD_NAND_RENESAS) += renesas-nand-controller.o
obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o
obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o
projects / openwrt / staging / stintel.git / commitdiff