drm/amd/powerplay: print clock levels for smu11 (v2)

Add function to print current levels for smu11.

v2: expose get_current_clk_freq for smu v11. (Kevin)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Kevin Wang <Kevin1.Wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index a7adb7b6bd98ab7b615a1d8c103551f2ffa46d1c..c124a90e147575b85e741a0653094c07b8ecb77d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -28,6 +28,7 @@
 #include "amdgpu_pm.h"
 #include "amdgpu_dpm.h"
 #include "amdgpu_display.h"
+#include "amdgpu_smu.h"
 #include "atom.h"
 #include <linux/power_supply.h>
 #include <linux/hwmon.h>
@@ -711,7 +712,9 @@ static ssize_t amdgpu_get_pp_dpm_sclk(struct device *dev,
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
 
-       if (adev->powerplay.pp_funcs->print_clock_levels)
+       if (adev->smu.ppt_funcs)
+               return smu_print_clk_levels(&adev->smu, PP_SCLK, buf);
+       else if (adev->powerplay.pp_funcs->print_clock_levels)
                return amdgpu_dpm_print_clock_levels(adev, PP_SCLK, buf);
        else
                return snprintf(buf, PAGE_SIZE, "\n");
@@ -783,7 +786,9 @@ static ssize_t amdgpu_get_pp_dpm_mclk(struct device *dev,
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
 
-       if (adev->powerplay.pp_funcs->print_clock_levels)
+       if (adev->smu.ppt_funcs)
+               return smu_print_clk_levels(&adev->smu, PP_MCLK, buf);
+       else if (adev->powerplay.pp_funcs->print_clock_levels)
                return amdgpu_dpm_print_clock_levels(adev, PP_MCLK, buf);
        else
                return snprintf(buf, PAGE_SIZE, "\n");

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index bdd930d03157883615153f5e3f35dfe680697607..a3c8b736af840e2cf8f0edd8e4f32792ff189760 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -216,6 +216,7 @@ struct pptable_funcs {
        int (*get_unallowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
        int (*set_default_dpm_table)(struct smu_context *smu);
        int (*populate_umd_state_clk)(struct smu_context *smu);
+       int (*print_clk_levels)(struct smu_context *smu, enum pp_clock_type type, char *buf);
 };
 
 struct smu_funcs
@@ -330,6 +331,8 @@ struct smu_funcs
        ((smu)->funcs->get_power_limit? (smu)->funcs->get_power_limit((smu)) : 0)
 #define smu_get_current_clk_freq(smu, clk_id, value) \
        ((smu)->funcs->get_current_clk_freq? (smu)->funcs->get_current_clk_freq((smu), (clk_id), (value)) : 0)
+#define smu_print_clk_levels(smu, type, buf) \
+       ((smu)->ppt_funcs->print_clk_levels ? (smu)->ppt_funcs->print_clk_levels((smu), (type), (buf)) : 0)
 
 #define smu_msg_get_index(smu, msg) \
        ((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_msg_index? (smu)->ppt_funcs->get_smu_msg_index((smu), (msg)) : -EINVAL) : -EINVAL)

diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
index d794290b2839ca792fba167397ca4cc3feedd47b..d34e1facd79cc671221227b341f576c81e4af72c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
@@ -552,6 +552,84 @@ static int vega20_populate_umd_state_clk(struct smu_context *smu)
        return 0;
 }
 
+static int vega20_get_clk_table(struct smu_context *smu,
+                       struct pp_clock_levels_with_latency *clocks,
+                       struct vega20_single_dpm_table *dpm_table)
+{
+       int i, count;
+
+       count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS : dpm_table->count;
+       clocks->num_levels = count;
+
+       for (i = 0; i < count; i++) {
+               clocks->data[i].clocks_in_khz =
+                       dpm_table->dpm_levels[i].value * 1000;
+               clocks->data[i].latency_in_us = 0;
+       }
+
+       return 0;
+}
+
+static int vega20_print_clk_levels(struct smu_context *smu,
+                       enum pp_clock_type type, char *buf)
+{
+       int i, now, size = 0;
+       int ret = 0;
+       struct pp_clock_levels_with_latency clocks;
+       struct vega20_single_dpm_table *single_dpm_table;
+       struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
+       struct vega20_dpm_table *dpm_table = NULL;
+
+       dpm_table = smu_dpm->dpm_context;
+
+       switch (type) {
+       case PP_SCLK:
+               ret = smu_get_current_clk_freq(smu, PPCLK_GFXCLK, &now);
+               if (ret) {
+                       pr_err("Attempt to get current gfx clk Failed!");
+                       return ret;
+               }
+
+               single_dpm_table = &(dpm_table->gfx_table);
+               ret = vega20_get_clk_table(smu, &clocks, single_dpm_table);
+               if (ret) {
+                       pr_err("Attempt to get gfx clk levels Failed!");
+                       return ret;
+               }
+
+               for (i = 0; i < clocks.num_levels; i++)
+                       size += sprintf(buf + size, "%d: %uMhz %s\n", i,
+                                       clocks.data[i].clocks_in_khz / 1000,
+                                       (clocks.data[i].clocks_in_khz == now * 10)
+                                       ? "*" : "");
+               break;
+
+       case PP_MCLK:
+               ret = smu_get_current_clk_freq(smu, PPCLK_UCLK, &now);
+               if (ret) {
+                       pr_err("Attempt to get current mclk Failed!");
+                       return ret;
+               }
+
+               single_dpm_table = &(dpm_table->mem_table);
+               ret = vega20_get_clk_table(smu, &clocks, single_dpm_table);
+               if (ret) {
+                       pr_err("Attempt to get memory clk levels Failed!");
+                       return ret;
+               }
+
+               for (i = 0; i < clocks.num_levels; i++)
+                       size += sprintf(buf + size, "%d: %uMhz %s\n",
+                               i, clocks.data[i].clocks_in_khz / 1000,
+                               (clocks.data[i].clocks_in_khz == now * 10)
+                               ? "*" : "");
+               break;
+       default:
+               break;
+       }
+       return size;
+}
+
 static const struct pptable_funcs vega20_ppt_funcs = {
        .alloc_dpm_context = vega20_allocate_dpm_context,
        .store_powerplay_table = vega20_store_powerplay_table,
@@ -562,6 +640,7 @@ static const struct pptable_funcs vega20_ppt_funcs = {
        .get_unallowed_feature_mask = vega20_get_unallowed_feature_mask,
        .set_default_dpm_table = vega20_set_default_dpm_table,
        .populate_umd_state_clk = vega20_populate_umd_state_clk,
+       .print_clk_levels = vega20_print_clk_levels,
 };
 
 void vega20_set_ppt_funcs(struct smu_context *smu)