kvm: x86: Move IA32_XSS to kvm_{get,set}_msr_common

Hoist support for RDMSR/WRMSR of IA32_XSS from vmx into common code so
that it can be used for svm as well.

Right now, kvm only allows the guest IA32_XSS to be zero,
so the guest's usage of XSAVES will be exactly the same as XSAVEC.

Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Aaron Lewis <aaronlewis@google.com>
Change-Id: Ie4b0f777d71e428fbee6e82071ac2d7618e9bb40
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index d06140bdb3adc58c3b65b82b43325431d9986ac9..31ce6bc2c3712d4b14e1021583ad9d55262696e4 100644 (file)
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1827,12 +1827,6 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
                        return 1;
                return vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index,
                                       &msr_info->data);
-       case MSR_IA32_XSS:
-               if (!msr_info->host_initiated &&
-                   !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
-                       return 1;
-               msr_info->data = vcpu->arch.ia32_xss;
-               break;
        case MSR_IA32_RTIT_CTL:
                if (pt_mode != PT_MODE_HOST_GUEST)
                        return 1;
@@ -2068,18 +2062,6 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
                if (!nested_vmx_allowed(vcpu))
                        return 1;
                return vmx_set_vmx_msr(vcpu, msr_index, data);
-       case MSR_IA32_XSS:
-               if (!msr_info->host_initiated &&
-                   !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
-                       return 1;
-               /*
-                * The only supported bit as of Skylake is bit 8, but
-                * it is not supported on KVM.
-                */
-               if (data != 0)
-                       return 1;
-               vcpu->arch.ia32_xss = data;
-               break;
        case MSR_IA32_RTIT_CTL:
                if ((pt_mode != PT_MODE_HOST_GUEST) ||
                        vmx_rtit_ctl_check(vcpu, data) ||

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 1ebe13493241a37c34ad0f0b362e30324663e422..19a0dc96beca86f9082474e7bd0067dc510dd13e 100644 (file)
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2694,6 +2694,20 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
        case MSR_IA32_TSC:
                kvm_write_tsc(vcpu, msr_info);
                break;
+       case MSR_IA32_XSS:
+               if (!msr_info->host_initiated &&
+                   !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
+                       return 1;
+               /*
+                * We do support PT if kvm_x86_ops->pt_supported(), but we do
+                * not support IA32_XSS[bit 8]. Guests will have to use
+                * RDMSR/WRMSR rather than XSAVES/XRSTORS to save/restore PT
+                * MSRs.
+                */
+               if (data != 0)
+                       return 1;
+               vcpu->arch.ia32_xss = data;
+               break;
        case MSR_SMI_COUNT:
                if (!msr_info->host_initiated)
                        return 1;
@@ -3021,6 +3035,12 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
        case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
                return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
                                   msr_info->host_initiated);
+       case MSR_IA32_XSS:
+               if (!msr_info->host_initiated &&
+                   !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
+                       return 1;
+               msr_info->data = vcpu->arch.ia32_xss;
+               break;
        case MSR_K7_CLK_CTL:
                /*
                 * Provide expected ramp-up count for K7. All other