drm/amdgpu: amdgpu_ctx_add_fence can't fail
authorChristian König <christian.koenig@amd.com>
Fri, 24 Aug 2018 12:23:33 +0000 (14:23 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 27 Aug 2018 20:12:10 +0000 (15:12 -0500)
No more waiting for a fence done here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h

index b62bbe71662ddf165eb9b0643180704748ebbf47..adc6a43e2333f57a60f235bc729971517123d15d 100644 (file)
@@ -1217,15 +1217,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
        job->owner = p->filp;
        p->fence = dma_fence_get(&job->base.s_fence->finished);
 
-       r = amdgpu_ctx_add_fence(p->ctx, entity, p->fence, &seq);
-       if (r) {
-               dma_fence_put(p->fence);
-               dma_fence_put(&job->base.s_fence->finished);
-               amdgpu_job_free(job);
-               amdgpu_mn_unlock(p->mn);
-               return r;
-       }
-
+       amdgpu_ctx_add_fence(p->ctx, entity, p->fence, &seq);
        amdgpu_cs_post_dependencies(p);
 
        if ((job->preamble_status & AMDGPU_PREAMBLE_IB_PRESENT) &&
index 987b7f2564634cce2ecec7ad2c5195e1d59dfb07..f9b54236102d58421d179f230d6968a3dbd39d04 100644 (file)
@@ -434,9 +434,9 @@ int amdgpu_ctx_put(struct amdgpu_ctx *ctx)
        return 0;
 }
 
-int amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx,
-                        struct drm_sched_entity *entity,
-                        struct dma_fence *fence, uint64_t* handle)
+void amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx,
+                         struct drm_sched_entity *entity,
+                         struct dma_fence *fence, uint64_t* handle)
 {
        struct amdgpu_ctx_entity *centity = to_amdgpu_ctx_entity(entity);
        uint64_t seq = centity->sequence;
@@ -458,8 +458,6 @@ int amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx,
        dma_fence_put(other);
        if (handle)
                *handle = seq;
-
-       return 0;
 }
 
 struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
index d67c1d285a4f3f15c6de180e8db80c476dea0d38..b3b012c0a7da91a7153b905aa7d25dab1c25b876 100644 (file)
@@ -65,9 +65,9 @@ int amdgpu_ctx_put(struct amdgpu_ctx *ctx);
 
 int amdgpu_ctx_get_entity(struct amdgpu_ctx *ctx, u32 hw_ip, u32 instance,
                          u32 ring, struct drm_sched_entity **entity);
-int amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx,
-                        struct drm_sched_entity *entity,
-                        struct dma_fence *fence, uint64_t *seq);
+void amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx,
+                         struct drm_sched_entity *entity,
+                         struct dma_fence *fence, uint64_t *seq);
 struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
                                       struct drm_sched_entity *entity,
                                       uint64_t seq);