imx: imx7d: remove CamelCase from ENET_xMHz macros
authorEric Nelson <eric@nelint.com>
Thu, 31 Aug 2017 15:34:23 +0000 (08:34 -0700)
committerStefano Babic <sbabic@denx.de>
Mon, 18 Sep 2017 15:15:28 +0000 (17:15 +0200)
Update these macros to use all upper-case to avoid checkpatch
warnings:

ENET_25MHz,
ENET_50MHz,
ENET_125MHz,

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
arch/arm/include/asm/arch-mx7/clock.h
arch/arm/mach-imx/mx7/clock.c
board/freescale/mx7dsabresd/mx7dsabresd.c
board/technexion/pico-imx7d/pico-imx7d.c
board/toradex/colibri_imx7/colibri_imx7.c

index 688d2361df43e267aa8ec529be6d3aa20f44f565..3b115ad57cbf8a8b26212281277e94c9c8ab2069 100644 (file)
@@ -318,9 +318,9 @@ struct clk_root_map {
 };
 
 enum enet_freq {
-       ENET_25MHz,
-       ENET_50MHz,
-       ENET_125MHz,
+       ENET_25MHZ,
+       ENET_50MHZ,
+       ENET_125MHZ,
 };
 
 u32 get_root_clk(enum clk_root_index clock_id);
index 2cfde46a5532d29dda738fd8bfa4d0740142b34c..8150faa1a31304cd9f52b5b8110b048b925b48ef 100644 (file)
@@ -966,15 +966,15 @@ int set_clk_enet(enum enet_freq type)
        clock_enable(CCGR_ENET2, 0);
 
        switch (type) {
-       case ENET_125MHz:
+       case ENET_125MHZ:
                enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK;
                enet2_ref = ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK;
                break;
-       case ENET_50MHz:
+       case ENET_50MHZ:
                enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK;
                enet2_ref = ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK;
                break;
-       case ENET_25MHz:
+       case ENET_25MHZ:
                enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK;
                enet2_ref = ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK;
                break;
index a681ecef3aa96d9bce12c92aa0ec2fe25dfa697e..5819b1825dcd9e9b5dfbbef305f4759048b827fc 100644 (file)
@@ -260,7 +260,7 @@ static int setup_fec(void)
                (IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK |
                 IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0);
 
-       return set_clk_enet(ENET_125MHz);
+       return set_clk_enet(ENET_125MHZ);
 }
 
 
index b4c9be73780607bb3feb55f2def2985d3bb10e61..67bab51dfd4d4bc471b4f231d97c9af7e8a7283d 100644 (file)
@@ -182,7 +182,7 @@ static int setup_fec(void)
                        (IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK |
                        IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0);
 
-       return set_clk_enet(ENET_125MHz);
+       return set_clk_enet(ENET_125MHZ);
 }
 
 int board_phy_config(struct phy_device *phydev)
index 5cb14b43de76ed38153c37ad8f8748ec1badfd26..13b2b5785b321c972388277fce11e2ba98fd300d 100644 (file)
@@ -280,7 +280,7 @@ static int setup_fec(void)
                        IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK);
 #endif
 
-       return set_clk_enet(ENET_50MHz);
+       return set_clk_enet(ENET_50MHZ);
 }
 
 int board_phy_config(struct phy_device *phydev)