drm/amd/powerplay: guard consistency between CPU copy and local VRAM
authorEvan Quan <evan.quan@amd.com>
Tue, 30 Jul 2019 08:39:45 +0000 (16:39 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 2 Aug 2019 15:30:39 +0000 (10:30 -0500)
This can prevent CPU to use the out-dated copy.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c
drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c

index 4b9d51231a46a99d31db39b8f8a4fa6f9e0de231..0a20279a5ff8153e0f38cf1f7eaec67a791b274b 100644 (file)
@@ -451,6 +451,7 @@ int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int
                     void *table_data, bool drv2smu)
 {
        struct smu_table_context *smu_table = &smu->smu_table;
+       struct amdgpu_device *adev = smu->adev;
        struct smu_table *table = NULL;
        int ret = 0;
        int table_id = smu_table_get_index(smu, table_index);
@@ -478,6 +479,9 @@ int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int
        if (ret)
                return ret;
 
+       /* flush hdp cache */
+       adev->nbio_funcs->hdp_flush(adev, NULL);
+
        if (!drv2smu)
                memcpy(table_data, table->cpu_addr, table->size);
 
index 7fb3e57cfc41954ced50ab754b40e31fc8e901ec..3f12cf341511e72f09c22e5d9a1c63aa425cf986 100644 (file)
@@ -118,6 +118,7 @@ static int smu10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
 {
        struct smu10_smumgr *priv =
                        (struct smu10_smumgr *)(hwmgr->smu_backend);
+       struct amdgpu_device *adev = hwmgr->adev;
 
        PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
                        "Invalid SMU Table ID!", return -EINVAL;);
@@ -135,6 +136,9 @@ static int smu10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
                        PPSMC_MSG_TransferTableSmu2Dram,
                        priv->smu_tables.entry[table_id].table_id);
 
+       /* flush hdp cache */
+       adev->nbio_funcs->hdp_flush(adev, NULL);
+
        memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table,
                        priv->smu_tables.entry[table_id].size);
 
index 967d34b1dc5149adeca734894590de6e3247007a..0dbdde69f2d90ce29fb7f772f712c02b6b52b19a 100644 (file)
@@ -39,6 +39,7 @@ static int vega10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
                uint8_t *table, int16_t table_id)
 {
        struct vega10_smumgr *priv = hwmgr->smu_backend;
+       struct amdgpu_device *adev = hwmgr->adev;
 
        PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
                        "Invalid SMU Table ID!", return -EINVAL);
@@ -56,6 +57,9 @@ static int vega10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
                        PPSMC_MSG_TransferTableSmu2Dram,
                        priv->smu_tables.entry[table_id].table_id);
 
+       /* flush hdp cache */
+       adev->nbio_funcs->hdp_flush(adev, NULL);
+
        memcpy(table, priv->smu_tables.entry[table_id].table,
                        priv->smu_tables.entry[table_id].size);
 
index bab3df85fdcd149a411e4f9ac5f30e04aaed5a16..f9589806bf8340acf464d48ff0a1f38e174ad896 100644 (file)
@@ -42,6 +42,7 @@ static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
 {
        struct vega12_smumgr *priv =
                        (struct vega12_smumgr *)(hwmgr->smu_backend);
+       struct amdgpu_device *adev = hwmgr->adev;
 
        PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT,
                        "Invalid SMU Table ID!", return -EINVAL);
@@ -64,6 +65,9 @@ static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
                        "[CopyTableFromSMC] Attempt to Transfer Table From SMU Failed!",
                        return -EINVAL);
 
+       /* flush hdp cache */
+       adev->nbio_funcs->hdp_flush(adev, NULL);
+
        memcpy(table, priv->smu_tables.entry[table_id].table,
                        priv->smu_tables.entry[table_id].size);
 
index 957446cf467e242e6f23c0eb989db4d9ccb12d72..3e97b83950dcfa8811716bd46aa872ab87bcd3f1 100644 (file)
@@ -163,6 +163,7 @@ static int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr,
 {
        struct vega20_smumgr *priv =
                        (struct vega20_smumgr *)(hwmgr->smu_backend);
+       struct amdgpu_device *adev = hwmgr->adev;
        int ret = 0;
 
        PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT,
@@ -187,6 +188,9 @@ static int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr,
                        "[CopyTableFromSMC] Attempt to Transfer Table From SMU Failed!",
                        return ret);
 
+       /* flush hdp cache */
+       adev->nbio_funcs->hdp_flush(adev, NULL);
+
        memcpy(table, priv->smu_tables.entry[table_id].table,
                        priv->smu_tables.entry[table_id].size);
 
@@ -266,6 +270,7 @@ int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
 {
        struct vega20_smumgr *priv =
                        (struct vega20_smumgr *)(hwmgr->smu_backend);
+       struct amdgpu_device *adev = hwmgr->adev;
        int ret = 0;
 
        PP_ASSERT_WITH_CODE((ret = vega20_send_msg_to_smc_with_parameter(hwmgr,
@@ -284,6 +289,9 @@ int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
                        "[GetActivityMonitor] Attempt to Transfer Table From SMU Failed!",
                        return ret);
 
+       /* flush hdp cache */
+       adev->nbio_funcs->hdp_flush(adev, NULL);
+
        memcpy(table, priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].table,
                        priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size);