ARM: dts: exynos: Move Mali400 GPU node to "/soc"

Mali400 GPU hardware module is a standard hardware module integrated to
Exynos3210/4210/4412 SoCs, so it should reside under the "/soc" node.
The only SoC components which are placed in the DT root, are those, which
are a part of CPUs: like ARM architected timers and ARM performance
measurement units.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index c17870a54acf1c4c2dbe5422361f7ff8d8a43060..5659c4a107296d3012a33a436097a7b1f7337788 100644 (file)
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -126,39 +126,6 @@
                };
        };
 
-       gpu: gpu@13000000 {
-               compatible = "samsung,exynos4210-mali", "arm,mali-400";
-               reg = <0x13000000 0x10000>;
-               interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "gp",
-                                 "gpmmu",
-                                 "pp0",
-                                 "ppmmu0",
-                                 "pp1",
-                                 "ppmmu1",
-                                 "pp2",
-                                 "ppmmu2",
-                                 "pp3",
-                                 "ppmmu3",
-                                 "pmu";
-               clocks = <&cmu CLK_G3D>,
-                        <&cmu CLK_SCLK_G3D>;
-               clock-names = "bus", "core";
-               power-domains = <&pd_g3d>;
-               status = "disabled";
-               /* TODO: operating points for DVFS, assigned clock as 134 MHz */
-       };
-
        pmu {
                compatible = "arm,cortex-a7-pmu";
                interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -495,6 +462,39 @@
                        status = "disabled";
                };
 
+               gpu: gpu@13000000 {
+                       compatible = "samsung,exynos4210-mali", "arm,mali-400";
+                       reg = <0x13000000 0x10000>;
+                       interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "gp",
+                                         "gpmmu",
+                                         "pp0",
+                                         "ppmmu0",
+                                         "pp1",
+                                         "ppmmu1",
+                                         "pp2",
+                                         "ppmmu2",
+                                         "pp3",
+                                         "ppmmu3",
+                                         "pmu";
+                       clocks = <&cmu CLK_G3D>,
+                                <&cmu CLK_SCLK_G3D>;
+                       clock-names = "bus", "core";
+                       power-domains = <&pd_g3d>;
+                       status = "disabled";
+                       /* TODO: operating points for DVFS, assigned clock as 134 MHz */
+               };
+
                mfc: codec@13400000 {
                        compatible = "samsung,mfc-v7";
                        reg = <0x13400000 0x10000>;

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 7863a21a7a641c37d208fdea77da99e50d31959b..1264cc431ff6f0654d1affc20ab81c945e44e7df 100644 (file)
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -51,20 +51,6 @@
                serial3 = &serial_3;
        };
 
-       gpu: gpu@13000000 {
-               compatible = "samsung,exynos4210-mali", "arm,mali-400";
-               reg = <0x13000000 0x10000>;
-               /*
-                * CLK_G3D is not actually bus clock but a IP-level clock.
-                * The bus clock is not described in hardware manual.
-                */
-               clocks = <&clock CLK_G3D>,
-                        <&clock CLK_SCLK_G3D>;
-               clock-names = "bus", "core";
-               power-domains = <&pd_g3d>;
-               status = "disabled";
-       };
-
        pmu: pmu {
                compatible = "arm,cortex-a9-pmu";
                interrupt-parent = <&combiner>;
@@ -429,6 +415,20 @@
                        };
                };
 
+               gpu: gpu@13000000 {
+                       compatible = "samsung,exynos4210-mali", "arm,mali-400";
+                       reg = <0x13000000 0x10000>;
+                       /*
+                        * CLK_G3D is not actually bus clock but a IP-level clock.
+                        * The bus clock is not described in hardware manual.
+                        */
+                       clocks = <&clock CLK_G3D>,
+                                <&clock CLK_SCLK_G3D>;
+                       clock-names = "bus", "core";
+                       power-domains = <&pd_g3d>;
+                       status = "disabled";
+               };
+
                i2s1: i2s@13960000 {
                        compatible = "samsung,s3c6410-i2s";
                        reg = <0x13960000 0x100>;