drm/amdgpu/powerplay/tonga: query supported pcie info from cgs (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 12 Nov 2015 01:58:55 +0000 (20:58 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 21 Dec 2015 21:42:33 +0000 (16:42 -0500)
Rather than hardcode it.

v2: integrate spc fix from Rex

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c

index 9442313d7557a4dd3706b2d8055b5f7201197f86..bed50e6ca82c0dbf97699e9d6a9414a41823d7da 100644 (file)
@@ -4559,14 +4559,30 @@ int tonga_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
        data->vddc_phase_shed_control = 0;
 
        if (0 == result) {
+               struct cgs_system_info sys_info = {0};
+
                data->is_tlu_enabled = 0;
                hwmgr->platform_descriptor.hardwareActivityPerformanceLevels =
                        TONGA_MAX_HARDWARE_POWERLEVELS;
                hwmgr->platform_descriptor.hardwarePerformanceLevels = 2;
                hwmgr->platform_descriptor.minimumClocksReductionPercentage  = 50;
 
-               data->pcie_gen_cap = 0x30007;
-               data->pcie_lane_cap = 0x2f0000;
+               sys_info.size = sizeof(struct cgs_system_info);
+               sys_info.info_id = CGS_SYSTEM_INFO_PCIE_GEN_INFO;
+               result = cgs_query_system_info(hwmgr->device, &sys_info);
+               if (result)
+                       data->pcie_gen_cap = 0x30007;
+               else
+                       data->pcie_gen_cap = (uint32_t)sys_info.value;
+               if (data->pcie_gen_cap & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)
+                       data->pcie_spc_cap = 20;
+               sys_info.size = sizeof(struct cgs_system_info);
+               sys_info.info_id = CGS_SYSTEM_INFO_PCIE_MLW;
+               result = cgs_query_system_info(hwmgr->device, &sys_info);
+               if (result)
+                       data->pcie_lane_cap = 0x2f0000;
+               else
+                       data->pcie_lane_cap = (uint32_t)sys_info.value;
        } else {
                /* Ignore return value in here, we are cleaning up a mess. */
                tonga_hwmgr_backend_fini(hwmgr);