drm/amd/amdgpu: Correct VRAM width for APUs with GMC9
authorTom St Denis <tom.stdenis@amd.com>
Mon, 26 Feb 2018 14:09:26 +0000 (09:09 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 28 Feb 2018 20:19:21 +0000 (15:19 -0500)
DDR4 has a 64-bit width not 128-bits.  It was reporting
twice the width.  Tested with my Ryzen 2400G.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index 2719937e09d6bf00a4f78c47cd970ce5f5a51000..fd6370982c9a5f4f39672c27be6d3cb739668d01 100644 (file)
@@ -682,7 +682,10 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
        adev->mc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
        if (!adev->mc.vram_width) {
                /* hbm memory channel size */
-               chansize = 128;
+               if (adev->flags & AMD_IS_APU)
+                       chansize = 64;
+               else
+                       chansize = 128;
 
                tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
                tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK;