drm/i915: Setting pch_id for HSW/BDW in virtual environment
authorXiong Zhang <xiong.y.zhang@intel.com>
Thu, 15 Jun 2017 03:11:45 +0000 (11:11 +0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 6 Jul 2017 09:30:27 +0000 (11:30 +0200)
In a IGD passthrough environment, the real ISA bridge may doesn't exist.
then pch_id couldn't be correctly gotten from ISA bridge, but pch_id is
used to identify LPT_H and LPT_LP. Currently i915 treat all LPT pch as
LPT_H,then errors occur when i915 runs on LPT_LP machines with igd
passthrough.

This patch set pch_id for HSW/BDW according to IGD type and isn't fully
correct. But it solves such issue on HSW/BDW ult/ulx machines.
QA CI system is blocked by this issue for a long time, it's better that
we could merge it to unblock QA CI system.

We know the root cause is in device model of virtual passthrough, and
will resolve it in the future with several parts cooperation in kernel,
qemu and xen.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99938

Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1497496305-5364-1-git-send-email-xiong.y.zhang@intel.com
drivers/gpu/drm/i915/i915_drv.c

index a6bef9ee870338e57fc5d6b73f807f659a4460ef..6f750efe9c3d048e50a0f015af1c8893c1be2694 100644 (file)
@@ -135,6 +135,10 @@ static enum intel_pch intel_virt_detect_pch(struct drm_i915_private *dev_priv)
                DRM_DEBUG_KMS("Assuming CougarPoint PCH\n");
        } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
                ret = PCH_LPT;
+               if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
+                       dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
+               else
+                       dev_priv->pch_id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
                DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
        } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
                ret = PCH_SPT;