drm/amd/amdgpu: Added a quirk for Stoney platform

Added DW_I2S_QUIRK_16BIT_IDX_OVERRIDE quirk for Stoney.

Supported format and bus width for I2S controller read
from I2S Component Parameter registers.
These are ready only registers.

For Stoney, I2S Component Parameter registers are programmed
to support 32 bit format and 4 bytes bus width only.

By setting this quirk,It will override 32 bit format with
16 bit format and 2 bytes as bus width for Stoney.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index 06879d1dcabd320045560a35edb8f606a35df46a..2d3fb005355d1df461992d229f9df5f72876897c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -319,14 +319,29 @@ static int acp_hw_init(void *handle)
                return -ENOMEM;
        }
 
-       i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;
+       switch (adev->asic_type) {
+       case CHIP_STONEY:
+               i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |
+                       DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;
+               break;
+       default:
+               i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;
+       }
        i2s_pdata[0].cap = DWC_I2S_PLAY;
        i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000;
        i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET;
        i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET;
+       switch (adev->asic_type) {
+       case CHIP_STONEY:
+               i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |
+                       DW_I2S_QUIRK_COMP_PARAM1 |
+                       DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;
+               break;
+       default:
+               i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |
+                       DW_I2S_QUIRK_COMP_PARAM1;
+       }
 
-       i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |
-                               DW_I2S_QUIRK_COMP_PARAM1;
        i2s_pdata[1].cap = DWC_I2S_RECORD;
        i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000;
        i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET;