net: mvpp2: simplify MVPP2_PRS_RI_* definitions
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tue, 21 Feb 2017 10:28:11 +0000 (11:28 +0100)
committerDavid S. Miller <davem@davemloft.net>
Tue, 21 Feb 2017 18:16:16 +0000 (13:16 -0500)
Some of the MVPP2_PRS_RI_* definitions use the ~(value) syntax, which
doesn't compile nicely on 64-bit. Moreover, those definitions are in
fact unneeded, since they are always used in combination with a bit
mask that ensures only the appropriate bits are modified.

Therefore, such definitions should just be set to 0x0. In addition, as
suggested by Russell King, we change the _MASK definitions to also use
the BIT() macro so that it is clear they are related to the values
defined afterwards.

For example:

 #define MVPP2_PRS_RI_L2_CAST_MASK              0x600
 #define MVPP2_PRS_RI_L2_UCAST                  ~(BIT(9) | BIT(10))
 #define MVPP2_PRS_RI_L2_MCAST                  BIT(9)
 #define MVPP2_PRS_RI_L2_BCAST                  BIT(10)

becomes

 #define MVPP2_PRS_RI_L2_CAST_MASK              (BIT(9) | BIT(10))
 #define MVPP2_PRS_RI_L2_UCAST                  0x0
 #define MVPP2_PRS_RI_L2_MCAST                  BIT(9)
 #define MVPP2_PRS_RI_L2_BCAST                  BIT(10)

Because the values (MVPP2_PRS_RI_L2_UCAST, MVPP2_PRS_RI_L2_MCAST and
MVPP2_PRS_RI_L2_BCAST) are always applied with
MVPP2_PRS_RI_L2_CAST_MASK, and therefore there is no need for
MVPP2_PRS_RI_L2_UCAST to be defined as ~(BIT(9) | BIT(10)).

It fixes the following warnings when building the driver on a 64-bit
platform (which is not possible as of this commit, but will be enabled
in a follow-up commit):

drivers/net/ethernet/marvell/mvpp2.c: In function ‘mvpp2_prs_mac_promisc_set’:
drivers/net/ethernet/marvell/mvpp2.c:524:33: warning: large integer implicitly truncated to unsigned type [-Woverflow]
 #define MVPP2_PRS_RI_L2_UCAST   ~(BIT(9) | BIT(10))
                                 ^
drivers/net/ethernet/marvell/mvpp2.c:1459:33: note: in expansion of macro ‘MVPP2_PRS_RI_L2_UCAST’
   mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L2_UCAST,

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/mvpp2.c

index 23f96e9c392f2dbbfc357eae5756bdf651941dce..ed4abb3d7e23ef9dfcd46310dc9a8af0b1c615ac 100644 (file)
@@ -510,28 +510,28 @@ enum mvpp2_tag_type {
 /* Sram result info bits assignment */
 #define MVPP2_PRS_RI_MAC_ME_MASK               0x1
 #define MVPP2_PRS_RI_DSA_MASK                  0x2
-#define MVPP2_PRS_RI_VLAN_MASK                 0xc
-#define MVPP2_PRS_RI_VLAN_NONE                 ~(BIT(2) | BIT(3))
+#define MVPP2_PRS_RI_VLAN_MASK                 (BIT(2) | BIT(3))
+#define MVPP2_PRS_RI_VLAN_NONE                 0x0
 #define MVPP2_PRS_RI_VLAN_SINGLE               BIT(2)
 #define MVPP2_PRS_RI_VLAN_DOUBLE               BIT(3)
 #define MVPP2_PRS_RI_VLAN_TRIPLE               (BIT(2) | BIT(3))
 #define MVPP2_PRS_RI_CPU_CODE_MASK             0x70
 #define MVPP2_PRS_RI_CPU_CODE_RX_SPEC          BIT(4)
-#define MVPP2_PRS_RI_L2_CAST_MASK              0x600
-#define MVPP2_PRS_RI_L2_UCAST                  ~(BIT(9) | BIT(10))
+#define MVPP2_PRS_RI_L2_CAST_MASK              (BIT(9) | BIT(10))
+#define MVPP2_PRS_RI_L2_UCAST                  0x0
 #define MVPP2_PRS_RI_L2_MCAST                  BIT(9)
 #define MVPP2_PRS_RI_L2_BCAST                  BIT(10)
 #define MVPP2_PRS_RI_PPPOE_MASK                        0x800
-#define MVPP2_PRS_RI_L3_PROTO_MASK             0x7000
-#define MVPP2_PRS_RI_L3_UN                     ~(BIT(12) | BIT(13) | BIT(14))
+#define MVPP2_PRS_RI_L3_PROTO_MASK             (BIT(12) | BIT(13) | BIT(14))
+#define MVPP2_PRS_RI_L3_UN                     0x0
 #define MVPP2_PRS_RI_L3_IP4                    BIT(12)
 #define MVPP2_PRS_RI_L3_IP4_OPT                        BIT(13)
 #define MVPP2_PRS_RI_L3_IP4_OTHER              (BIT(12) | BIT(13))
 #define MVPP2_PRS_RI_L3_IP6                    BIT(14)
 #define MVPP2_PRS_RI_L3_IP6_EXT                        (BIT(12) | BIT(14))
 #define MVPP2_PRS_RI_L3_ARP                    (BIT(13) | BIT(14))
-#define MVPP2_PRS_RI_L3_ADDR_MASK              0x18000
-#define MVPP2_PRS_RI_L3_UCAST                  ~(BIT(15) | BIT(16))
+#define MVPP2_PRS_RI_L3_ADDR_MASK              (BIT(15) | BIT(16))
+#define MVPP2_PRS_RI_L3_UCAST                  0x0
 #define MVPP2_PRS_RI_L3_MCAST                  BIT(15)
 #define MVPP2_PRS_RI_L3_BCAST                  (BIT(15) | BIT(16))
 #define MVPP2_PRS_RI_IP_FRAG_MASK              0x20000