drm/i915: Restore PDEs for all VMs
authorBen Widawsky <benjamin.widawsky@intel.com>
Fri, 6 Dec 2013 22:11:17 +0000 (14:11 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 18 Dec 2013 14:31:32 +0000 (15:31 +0100)
In following with the old restore code, we must now restore ever PPGTT's
PDEs, since they aren't proper GEM ojbects.

v2: Rebased on BDW. Only do restore pdes for gen6 & 7

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_gtt.c

index 2c0779580b1ecfc7e8a4211cf07135ba422e426a..5e2efcac76d0657e8dfa6a6ef63ac1449ee4d1e3 100644 (file)
@@ -1033,6 +1033,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct drm_i915_gem_object *obj;
+       struct i915_address_space *vm;
 
        i915_check_and_clear_faults(dev);
 
@@ -1057,8 +1058,20 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
                vma->bind_vma(vma, obj->cache_level, GLOBAL_BIND);
        }
 
-       if (dev_priv->mm.aliasing_ppgtt)
-               gen6_write_pdes(dev_priv->mm.aliasing_ppgtt);
+
+       if (INTEL_INFO(dev)->gen >= 8)
+               return;
+
+       list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
+               /* TODO: Perhaps it shouldn't be gen6 specific */
+               if (i915_is_ggtt(vm)) {
+                       if (dev_priv->mm.aliasing_ppgtt)
+                               gen6_write_pdes(dev_priv->mm.aliasing_ppgtt);
+                       continue;
+               }
+
+               gen6_write_pdes(container_of(vm, struct i915_hw_ppgtt, base));
+       }
 
        i915_gem_chipset_flush(dev);
 }