iwlwifi: pcie: move some cfg mangling from trans_pcie_alloc to probe
authorLuca Coelho <luciano.coelho@intel.com>
Thu, 2 Aug 2018 14:08:40 +0000 (17:08 +0300)
committerLuca Coelho <luciano.coelho@intel.com>
Fri, 6 Sep 2019 12:42:13 +0000 (15:42 +0300)
There were a couple of special handling to find the correct cfg inside
iwl_trans_pcie_alloc().  Move them to iwl_pci_probe() so they're
together with the rest of the decisions.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
drivers/net/wireless/intel/iwlwifi/pcie/drv.c
drivers/net/wireless/intel/iwlwifi/pcie/trans.c

index 08990694dd0ed4c4ce16f6ac70957217e901ce02..d62d1ef01855688e590fb7bc6caf41aa8f97dba1 100644 (file)
@@ -72,6 +72,7 @@
 
 #include "iwl-trans.h"
 #include "iwl-drv.h"
+#include "iwl-prph.h"
 #include "internal.h"
 
 #define IWL_PCI_DEVICE(dev, subdev, cfg) \
@@ -1017,29 +1018,70 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
        else if (cfg == &iwl7265_n_cfg)
                cfg_7265d = &iwl7265d_n_cfg;
        if (cfg_7265d &&
-           (iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D) {
+           (iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D)
                cfg = cfg_7265d;
-               iwl_trans->cfg = cfg_7265d;
-       }
 
-       if (iwl_trans->cfg->trans.rf_id && cfg == &iwl22000_2ac_cfg_hr_cdb &&
-           iwl_trans->hw_rev != CSR_HW_REV_TYPE_HR_CDB) {
-               u32 rf_id_chp = CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id);
-               u32 jf_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF);
-               u32 hr_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR);
-
-               if (rf_id_chp == jf_chp_id) {
-                       if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
-                               cfg = &iwl9560_2ac_cfg_qnj_jf_b0;
-                       else
-                               cfg = &iwl22000_2ac_cfg_jf;
-               } else if (rf_id_chp == hr_chp_id) {
-                       if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
-                               cfg = &iwl22000_2ax_cfg_qnj_hr_a0;
-                       else
-                               cfg = &iwl22000_2ac_cfg_hr;
+       iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
+
+       if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
+               if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_TY) {
+                       cfg = &iwlax210_2ax_cfg_ty_gf_a0;
+               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
+                       cfg = &iwlax210_2ax_cfg_so_jf_a0;
+               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF)) {
+                       cfg = &iwlax211_2ax_cfg_so_gf_a0;
+               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF4)) {
+                       cfg = &iwlax411_2ax_cfg_so_gf4_a0;
+               }
+       } else if (cfg == &iwl_ax101_cfg_qu_hr) {
+               if ((CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                    CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
+                    iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) ||
+                   (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                    CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR1))) {
+                       cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
+               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR)) {
+                       cfg = &iwl_ax101_cfg_qu_hr;
+               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
+                       cfg = &iwl22000_2ax_cfg_jf;
+               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HRCDB)) {
+                       IWL_ERR(iwl_trans, "RF ID HRCDB is not supported\n");
+                       return -EINVAL;
+               } else {
+                       IWL_ERR(iwl_trans, "Unrecognized RF ID 0x%08x\n",
+                               CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id));
+                       return -EINVAL;
+               }
+       } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
+                  CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
+                  ((cfg != &iwl_ax200_cfg_cc &&
+                    cfg != &killer1650x_2ax_cfg &&
+                    cfg != &killer1650w_2ax_cfg &&
+                    cfg != &iwl_ax201_cfg_quz_hr) ||
+                   iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0)) {
+               u32 hw_status;
+
+               hw_status = iwl_read_prph(iwl_trans, UMAG_GEN_HW_STATUS);
+               if (CSR_HW_RF_STEP(iwl_trans->hw_rf_id) == SILICON_B_STEP)
+                       /*
+                        * b step fw is the same for physical card and fpga
+                        */
+                       cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
+               else if ((hw_status & UMAG_GEN_HW_IS_FPGA) &&
+                        CSR_HW_RF_STEP(iwl_trans->hw_rf_id) == SILICON_A_STEP) {
+                       cfg = &iwl22000_2ax_cfg_qnj_hr_a0_f0;
+               } else {
+                       /*
+                        * a step no FPGA
+                        */
+                       cfg = &iwl22000_2ac_cfg_hr;
                }
-               iwl_trans->cfg = cfg;
        }
 
        /*
@@ -1049,22 +1091,18 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         * thing to do to support Qu C-step.
         */
        if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QU_C0) {
-               if (iwl_trans->cfg == &iwl_ax101_cfg_qu_hr)
-                       iwl_trans->cfg = &iwl_ax101_cfg_qu_c0_hr_b0;
-               else if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
-                       iwl_trans->cfg = &iwl_ax201_cfg_qu_c0_hr_b0;
-               else if (iwl_trans->cfg == &iwl9461_2ac_cfg_qu_b0_jf_b0)
-                       iwl_trans->cfg = &iwl9461_2ac_cfg_qu_c0_jf_b0;
-               else if (iwl_trans->cfg == &iwl9462_2ac_cfg_qu_b0_jf_b0)
-                       iwl_trans->cfg = &iwl9462_2ac_cfg_qu_c0_jf_b0;
-               else if (iwl_trans->cfg == &iwl9560_2ac_cfg_qu_b0_jf_b0)
-                       iwl_trans->cfg = &iwl9560_2ac_cfg_qu_c0_jf_b0;
-               else if (iwl_trans->cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
-                       iwl_trans->cfg = &iwl9560_2ac_160_cfg_qu_c0_jf_b0;
-               else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_b0_hr_b0)
-                       iwl_trans->cfg = &killer1650s_2ax_cfg_qu_c0_hr_b0;
-               else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_b0_hr_b0)
-                       iwl_trans->cfg = &killer1650i_2ax_cfg_qu_c0_hr_b0;
+               if (cfg == &iwl_ax101_cfg_qu_hr)
+                       cfg = &iwl_ax101_cfg_qu_c0_hr_b0;
+               else if (cfg == &iwl_ax201_cfg_qu_hr)
+                       cfg = &iwl_ax201_cfg_qu_c0_hr_b0;
+               else if (cfg == &iwl9461_2ac_cfg_qu_b0_jf_b0)
+                       cfg = &iwl9461_2ac_cfg_qu_c0_jf_b0;
+               else if (cfg == &iwl9462_2ac_cfg_qu_b0_jf_b0)
+                       cfg = &iwl9462_2ac_cfg_qu_c0_jf_b0;
+               else if (cfg == &iwl9560_2ac_cfg_qu_b0_jf_b0)
+                       cfg = &iwl9560_2ac_cfg_qu_c0_jf_b0;
+               else if (cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
+                       cfg = &iwl9560_2ac_160_cfg_qu_c0_jf_b0;
        }
 
        /* same thing for QuZ... */
@@ -1084,6 +1122,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
        }
 
 #endif
+       /* now set the real cfg we decided to use */
+       iwl_trans->cfg = cfg;
 
        pci_set_drvdata(pdev, iwl_trans);
        iwl_trans->drv = iwl_drv_start(iwl_trans);
index a1164a0a384fc2c02ea1f4a40363ea14e744b977..a1863b9bf1f6e8bce09859e6f241687ada492877 100644 (file)
@@ -3521,69 +3521,6 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
 
        IWL_DEBUG_INFO(trans, "HW REV: 0x%0x\n", trans->hw_rev);
 
-#if IS_ENABLED(CONFIG_IWLMVM)
-       trans->hw_rf_id = iwl_read32(trans, CSR_HW_RF_ID);
-
-       if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
-               if (trans->hw_rev == CSR_HW_REV_TYPE_TY) {
-                       trans->cfg = &iwlax210_2ax_cfg_ty_gf_a0;
-               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
-                       trans->cfg = &iwlax210_2ax_cfg_so_jf_a0;
-               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF)) {
-                       trans->cfg = &iwlax211_2ax_cfg_so_gf_a0;
-               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF4)) {
-                       trans->cfg = &iwlax411_2ax_cfg_so_gf4_a0;
-               }
-       } else if (cfg == &iwl_ax101_cfg_qu_hr) {
-               if ((CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                    CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
-                    trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) ||
-                   (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                    CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR1))) {
-                       trans->cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
-               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                   CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR)) {
-                       trans->cfg = &iwl_ax101_cfg_qu_hr;
-               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
-                       trans->cfg = &iwl22000_2ax_cfg_jf;
-               } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                          CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HRCDB)) {
-                       IWL_ERR(trans, "RF ID HRCDB is not supported\n");
-                       ret = -EINVAL;
-                       goto out_no_pci;
-               } else {
-                       IWL_ERR(trans, "Unrecognized RF ID 0x%08x\n",
-                               CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id));
-                       ret = -EINVAL;
-                       goto out_no_pci;
-               }
-       } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
-                  CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
-                  trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) {
-               u32 hw_status;
-
-               hw_status = iwl_read_prph(trans, UMAG_GEN_HW_STATUS);
-               if (CSR_HW_RF_STEP(trans->hw_rf_id) == SILICON_B_STEP)
-                       /*
-                       * b step fw is the same for physical card and fpga
-                       */
-                       trans->cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
-               else if ((hw_status & UMAG_GEN_HW_IS_FPGA) &&
-                        CSR_HW_RF_STEP(trans->hw_rf_id) == SILICON_A_STEP) {
-                       trans->cfg = &iwl22000_2ax_cfg_qnj_hr_a0_f0;
-               } else {
-                       /*
-                       * a step no FPGA
-                       */
-                       trans->cfg = &iwl22000_2ac_cfg_hr;
-               }
-       }
-#endif
-
        iwl_pcie_set_interrupt_capa(pdev, trans);
        trans->hw_id = (pdev->device << 16) + pdev->subsystem_device;
        snprintf(trans->hw_id_str, sizeof(trans->hw_id_str),