drm/amd/powerplay: add event task of disable dynamic state management
authorEric Huang <JinHuiEric.Huang@amd.com>
Tue, 31 May 2016 21:31:12 +0000 (17:31 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 7 Jul 2016 18:51:35 +0000 (14:51 -0400)
Add an interface to disable dpm so that we can disable dpm before
updating pptables at runtime.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c
drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

index 5cd123472db471bcf4d5b3cfe4f21fc5000d4b17..b6f45fd01fa61621d2f1e776f94e26a5dd938f82 100644 (file)
@@ -132,8 +132,7 @@ int pem_task_enable_dynamic_state_management(struct pp_eventmgr *eventmgr, struc
 
 int pem_task_disable_dynamic_state_management(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
 {
-       /* TODO */
-       return 0;
+       return phm_disable_dynamic_state_management(eventmgr->hwmgr);
 }
 
 int pem_task_enable_clock_power_gatings_tasks(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
index efb77eda7508426e71f9536cf0cb10593539db53..846497792f6f23f4691a04001cdf1433e643c379 100644 (file)
@@ -154,6 +154,30 @@ int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr)
        return ret;
 }
 
+int phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr)
+{
+       int ret = -1;
+       bool enabled;
+
+       PHM_FUNC_CHECK(hwmgr);
+
+       if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
+               PHM_PlatformCaps_TablelessHardwareInterface)) {
+               if (hwmgr->hwmgr_func->dynamic_state_management_disable)
+                       ret = hwmgr->hwmgr_func->dynamic_state_management_disable(hwmgr);
+       } else {
+               ret = phm_dispatch_table(hwmgr,
+                               &(hwmgr->disable_dynamic_state_management),
+                               NULL, NULL);
+       }
+
+       enabled = ret == 0 ? false : true;
+
+       cgs_notify_dpm_enabled(hwmgr->device, enabled);
+
+       return ret;
+}
+
 int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level)
 {
        PHM_FUNC_CHECK(hwmgr);
index 56f712c7d07aff6051b1c473ca6936b1c1f512a2..962cb538595117421c0b08d5a3fa4b94ceb1f2b1 100644 (file)
@@ -340,6 +340,7 @@ extern int phm_powergate_vce(struct pp_hwmgr *hwmgr, bool gate);
 extern int phm_powerdown_uvd(struct pp_hwmgr *hwmgr);
 extern int phm_setup_asic(struct pp_hwmgr *hwmgr);
 extern int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr);
+extern int phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr);
 extern void phm_init_dynamic_caps(struct pp_hwmgr *hwmgr);
 extern bool phm_is_hw_access_blocked(struct pp_hwmgr *hwmgr);
 extern int phm_block_hw_access(struct pp_hwmgr *hwmgr, bool block);
index bcb224b01584a8a9ee85deaa0cbc0a1a7386b07f..8ef011e16b62a7917e8f585d28b2af22064c2eea 100644 (file)
@@ -278,6 +278,8 @@ struct pp_hwmgr_func {
 
        int (*dynamic_state_management_enable)(
                                                struct pp_hwmgr *hw_mgr);
+       int (*dynamic_state_management_disable)(
+                                               struct pp_hwmgr *hw_mgr);
 
        int (*patch_boot_state)(struct pp_hwmgr *hwmgr,
                                     struct pp_hw_power_state *hw_ps);