fm93c56a_deselect(qdev);
}
-static void ql_swap_mac_addr(u8 * macAddress)
-{
-#ifdef __BIG_ENDIAN
- u8 temp;
- temp = macAddress[0];
- macAddress[0] = macAddress[1];
- macAddress[1] = temp;
- temp = macAddress[2];
- macAddress[2] = macAddress[3];
- macAddress[3] = temp;
- temp = macAddress[4];
- macAddress[4] = macAddress[5];
- macAddress[5] = temp;
-#endif
+static void ql_set_mac_addr(struct net_device *ndev, u16 *addr)
+{
+ __le16 *p = (__le16 *)ndev->dev_addr;
+ p[0] = cpu_to_le16(addr[0]);
+ p[1] = cpu_to_le16(addr[1]);
+ p[2] = cpu_to_le16(addr[2]);
}
static int ql_get_nvram_params(struct ql3_adapter *qdev)
return -1;
}
- /*
- * We have a problem with endianness for the MAC addresses
- * and the two 8-bit values version, and numPorts. We
- * have to swap them on big endian systems.
- */
- ql_swap_mac_addr(qdev->nvram_data.funcCfg_fn0.macAddress);
- ql_swap_mac_addr(qdev->nvram_data.funcCfg_fn1.macAddress);
- ql_swap_mac_addr(qdev->nvram_data.funcCfg_fn2.macAddress);
- ql_swap_mac_addr(qdev->nvram_data.funcCfg_fn3.macAddress);
- pEEPROMData = (u16 *) & qdev->nvram_data.version;
- *pEEPROMData = le16_to_cpu(*pEEPROMData);
-
spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
return checksum;
}
LS_64BITS(qdev->shadow_reg_phy_addr);
qdev->prsp_producer_index =
- (u32 *) (((u8 *) qdev->preq_consumer_index) + 8);
+ (__le32 *) (((u8 *) qdev->preq_consumer_index) + 8);
qdev->rsp_producer_index_phy_addr_high =
qdev->req_consumer_index_phy_addr_high;
qdev->rsp_producer_index_phy_addr_low =
ql_write_page1_reg(qdev, &hmem_regs->reqLength, NUM_REQ_Q_ENTRIES);
/* Response Queue Registers */
- *((u16 *) (qdev->prsp_producer_index)) = 0;
+ *((__le16 *) (qdev->prsp_producer_index)) = 0;
qdev->rsp_consumer_index = 0;
qdev->rsp_current = qdev->rsp_q_virt_addr;
qdev->ndev->name,value);
break;
}
- qdev->numPorts = qdev->nvram_data.numPorts;
+ qdev->numPorts = qdev->nvram_data.version_and_numPorts >> 8;
}
static void ql_display_dev_info(struct net_device *ndev)
/* Validate and set parameters */
if (qdev->mac_index) {
ndev->mtu = qdev->nvram_data.macCfg_port1.etherMtu_mac ;
- memcpy(ndev->dev_addr, &qdev->nvram_data.funcCfg_fn2.macAddress,
- ETH_ALEN);
+ ql_set_mac_addr(ndev, qdev->nvram_data.funcCfg_fn2.macAddress);
} else {
ndev->mtu = qdev->nvram_data.macCfg_port0.etherMtu_mac ;
- memcpy(ndev->dev_addr, &qdev->nvram_data.funcCfg_fn0.macAddress,
- ETH_ALEN);
+ ql_set_mac_addr(ndev, qdev->nvram_data.funcCfg_fn0.macAddress);
}
memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len);
#define OB_3032MAC_IOCB_REQ_UC 0x01
u8 reserved0;
- __le32 transaction_id;
+ u32 transaction_id; /* opaque for hardware */
__le16 data_len;
u8 ip_hdr_off;
u8 ip_hdr_len;
#define OB_MAC_IOCB_RSP_I 0x01
__le16 reserved0;
- __le32 transaction_id;
+ u32 transaction_id; /* opaque for hardware */
__le32 reserved1;
__le32 reserved2;
};
*/
struct eeprom_function_cfg {
u8 reserved[30];
- u8 macAddress[6];
- u8 macAddressSecondary[6];
+ u16 macAddress[3];
+ u16 macAddressSecondary[3];
u16 subsysVendorId;
u16 subsysDeviceId;
*/
struct eeprom_data {
u8 asicId[4];
- u8 version;
- u8 numPorts;
+ u16 version_and_numPorts; /* together to avoid endianness crap */
u16 boardId;
#define EEPROM_BOARDID_STR_SIZE 16
*/
struct lrg_buf_q_entry {
- u32 addr0_lower;
+ __le32 addr0_lower;
#define IAL_LAST_ENTRY 0x00000001
#define IAL_CONT_ENTRY 0x00000002
#define IAL_FLAG_MASK 0x00000003
- u32 addr0_upper;
- u32 addr1_lower;
- u32 addr1_upper;
- u32 addr2_lower;
- u32 addr2_upper;
- u32 addr3_lower;
- u32 addr3_upper;
- u32 addr4_lower;
- u32 addr4_upper;
- u32 addr5_lower;
- u32 addr5_upper;
- u32 addr6_lower;
- u32 addr6_upper;
- u32 addr7_lower;
- u32 addr7_upper;
+ __le32 addr0_upper;
+ __le32 addr1_lower;
+ __le32 addr1_upper;
+ __le32 addr2_lower;
+ __le32 addr2_upper;
+ __le32 addr3_lower;
+ __le32 addr3_upper;
+ __le32 addr4_lower;
+ __le32 addr4_upper;
+ __le32 addr5_lower;
+ __le32 addr5_upper;
+ __le32 addr6_lower;
+ __le32 addr6_upper;
+ __le32 addr7_lower;
+ __le32 addr7_upper;
};
struct bufq_addr_element {
- u32 addr_low;
- u32 addr_high;
+ __le32 addr_low;
+ __le32 addr_high;
};
#define QL_NO_RESET 0
#define MAX_OAL_CNT ((MAX_SKB_FRAGS-1)/4 + 1)
struct oal_entry {
- u32 dma_lo;
- u32 dma_hi;
- u32 len;
+ __le32 dma_lo;
+ __le32 dma_hi;
+ __le32 len;
#define OAL_LAST_ENTRY 0x80000000 /* Last valid buffer in list. */
#define OAL_CONT_ENTRY 0x40000000 /* points to an OAL. (continuation) */
};
struct net_rsp_iocb *rsp_current;
u16 rsp_consumer_index;
u16 reserved_06;
- volatile u32 *prsp_producer_index;
+ volatile __le32 *prsp_producer_index;
u32 rsp_producer_index_phy_addr_high;
u32 rsp_producer_index_phy_addr_low;