mpc85xx/T4240EMU: Remove T4240EMU board
authorYork Sun <yorksun@freescale.com>
Tue, 21 Apr 2015 17:09:52 +0000 (10:09 -0700)
committerYork Sun <yorksun@freescale.com>
Mon, 4 May 2015 16:23:46 +0000 (09:23 -0700)
T4240 SoC has been available for a long time. Emulator support
is no longer needed.

Signed-off-by: York Sun <yorksun@freescale.com>
arch/powerpc/cpu/mpc85xx/Kconfig
board/freescale/t4qds/Kconfig
board/freescale/t4qds/MAINTAINERS
board/freescale/t4qds/Makefile
board/freescale/t4qds/ddr.h
configs/T4240EMU_defconfig [deleted file]
include/configs/T4240EMU.h [deleted file]

index adb5bd378ce5a56eac394122263de1b3c5eba937..696f227c6c23887e94e3e0f2af5ad421dea36387 100644 (file)
@@ -122,9 +122,6 @@ config TARGET_T208XRDB
        bool "Support T208xRDB"
        select SUPPORT_SPL
 
-config TARGET_T4240EMU
-       bool "Support T4240EMU"
-
 config TARGET_T4240QDS
        bool "Support T4240QDS"
        select SUPPORT_SPL
index ab34b9ef4c9e520b58196253647109415a51e688..27a64b64b9f787901be96ae651a71307c880010e 100644 (file)
@@ -1,16 +1,3 @@
-if TARGET_T4240EMU
-
-config SYS_BOARD
-       default "t4qds"
-
-config SYS_VENDOR
-       default "freescale"
-
-config SYS_CONFIG_NAME
-       default "T4240EMU"
-
-endif
-
 if TARGET_T4240QDS
 
 config SYS_BOARD
index f88ee7df9e685d7d90ea5061b4352d869fea874f..fd340f332fcd38660085ff656bf317bd729c4b48 100644 (file)
@@ -18,9 +18,3 @@ M:    Aneesh Bansal <aneesh.bansal@freescale.com>
 S:     Maintained
 F:     configs/T4160QDS_SECURE_BOOT_defconfig
 F:     configs/T4240QDS_SECURE_BOOT_defconfig
-
-T4240EMU BOARD
-M:     York Sun <yorksun@freescale.com>
-S:     Maintained
-F:     include/configs/T4240EMU.h
-F:     configs/T4240EMU_defconfig
index 4e8e5cb8e9ae0168c58f05977d074b116eb65cc8..bd2c1f16222a1bd0a226cbed457b690936bfa4e8 100644 (file)
@@ -8,7 +8,6 @@ ifdef CONFIG_SPL_BUILD
 obj-y += spl.o
 else
 obj-$(CONFIG_T4240QDS) += t4240qds.o
-obj-$(CONFIG_T4240EMU) += t4240emu.o
 obj-$(CONFIG_T4240QDS)+= eth.o
 obj-$(CONFIG_PCI)      += pci.o
 endif
index 8183af78feb1f17c23d7e1b9b7b7c84394c30ea8..4d0e3c497db2a6cff4b5b6545e4509a33f3da185 100644 (file)
@@ -25,7 +25,6 @@ struct board_specific_parameters {
  * for each n_ranks group.
  */
 
-#ifdef CONFIG_T4240QDS
 static const struct board_specific_parameters udimm0[] = {
        /*
         * memory controller 0
@@ -63,31 +62,6 @@ static const struct board_specific_parameters rdimm0[] = {
        {}
 };
 
-#else  /* CONFIG_T4240EMU */
-static const struct board_specific_parameters udimm0[] = {
-       /*
-        * memory controller 0
-        *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
-        * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |      |delay |
-        */
-       {2,  2140, 0, 4,     8, 0x0, 0x0,   0xff,    2,  0},
-       {1,  2140, 0, 4,     8, 0x0, 0x0,   0xff,    2,  0},
-       {}
-};
-
-static const struct board_specific_parameters rdimm0[] = {
-       /*
-        * memory controller 0
-        *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
-        * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |      |delay |
-        */
-       {4,  2140, 0, 5,     8, 0x0, 0x0,   0xff,    2,  0},
-       {2,  2140, 0, 5,     8, 0x0, 0x0,   0xff,    2,  0},
-       {1,  2140, 0, 4,     8, 0x0, 0x0,   0xff,    2,  0},
-       {}
-};
-#endif /* CONFIG_T4240EMU */
-
 /*
  * The three slots have slightly different timing. The center values are good
  * for all slots. We use identical speed tables for them. In future use, if
diff --git a/configs/T4240EMU_defconfig b/configs/T4240EMU_defconfig
deleted file mode 100644 (file)
index e95151b..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240"
-CONFIG_PPC=y
-CONFIG_MPC85xx=y
-CONFIG_TARGET_T4240EMU=y
diff --git a/include/configs/T4240EMU.h b/include/configs/T4240EMU.h
deleted file mode 100644 (file)
index e8ba5d6..0000000
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * Copyright 2013 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/*
- * T4240 EMU board configuration file
- */
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_T4240EMU
-#define CONFIG_PHYS_64BIT
-
-#define CONFIG_SYS_NO_FLASH            1
-#define CONFIG_SYS_FSL_DDR_EMU         1
-#define CONFIG_SYS_FSL_NO_QIXIS                1
-#define CONFIG_SYS_FSL_NO_SERDES       1
-
-#include "t4qds.h"
-
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_CACHE_FLUSH
-
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_SIZE         0x2000
-
-#define CONFIG_SYS_CLK_FREQ    100000000
-#define CONFIG_DDR_CLK_FREQ    133333333
-#define CONFIG_FSL_TBCLK_EXTRA_DIV 100
-
-/*
- * DDR Setup
- */
-#define CONFIG_SYS_SPD_BUS_NUM 1
-#define SPD_EEPROM_ADDRESS1    0x51
-#define SPD_EEPROM_ADDRESS2    0x52
-#define SPD_EEPROM_ADDRESS3    0x53
-#define SPD_EEPROM_ADDRESS4    0x54
-#define SPD_EEPROM_ADDRESS5    0x55
-#define SPD_EEPROM_ADDRESS6    0x56
-#define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1     /* for p3041/p5010 */
-#define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
-
-/*
- * IFC Definitions
- */
-#define CONFIG_SYS_NOR0_CSPR_EXT       (0xf)
-#define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
-/* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR0_CSPR   (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \
-                               + 0x8000000) | \
-                               CSPR_PORT_SIZE_32 | \
-                               CSPR_MSEL_NOR | \
-                               CSPR_V)
-#define CONFIG_SYS_NOR_CSOR    CSOR_NOR_ADM_SHIFT(0)
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x1) | \
-                               FTIM0_NOR_TEADC(0x1) | \
-                               FTIM0_NOR_TEAHC(0x1))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x1) | \
-                               FTIM1_NOR_TRAD_NOR(0x1))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x0) | \
-                               FTIM2_NOR_TCH(0x0) | \
-                               FTIM2_NOR_TWP(0x1))
-#define CONFIG_SYS_NOR_FTIM3   0x04000000
-#define CONFIG_SYS_IFC_CCR     0x01000000
-
-#define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
-#define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
-
-/* I2C */
-#define CONFIG_SYS_FSL_I2C_SPEED       4000000 /* faster speed for emulator */
-#define CONFIG_SYS_FSL_I2C2_SPEED      4000000
-
-/* Qman/Bman */
-#define CONFIG_SYS_DPAA_QBMAN          /* Support Q/Bman */
-#define CONFIG_SYS_BMAN_NUM_PORTALS    50
-#define CONFIG_SYS_BMAN_MEM_BASE       0xf4000000
-#define CONFIG_SYS_BMAN_MEM_PHYS       0xff4000000ull
-#define CONFIG_SYS_BMAN_MEM_SIZE       0x02000000
-#define CONFIG_SYS_BMAN_SP_CENA_SIZE    0x4000
-#define CONFIG_SYS_BMAN_SP_CINH_SIZE    0x1000
-#define CONFIG_SYS_BMAN_CENA_BASE       CONFIG_SYS_BMAN_MEM_BASE
-#define CONFIG_SYS_BMAN_CENA_SIZE       (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
-#define CONFIG_SYS_BMAN_CINH_BASE       (CONFIG_SYS_BMAN_MEM_BASE + \
-                                       CONFIG_SYS_BMAN_CENA_SIZE)
-#define CONFIG_SYS_BMAN_CINH_SIZE       (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
-#define CONFIG_SYS_BMAN_SWP_ISDR_REG    0xE08
-#define CONFIG_SYS_QMAN_NUM_PORTALS    50
-#define CONFIG_SYS_QMAN_MEM_BASE       0xf6000000
-#define CONFIG_SYS_QMAN_MEM_PHYS       0xff6000000ull
-#define CONFIG_SYS_QMAN_MEM_SIZE       0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
-#define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
-#define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
-#define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
-                                       CONFIG_SYS_QMAN_CENA_SIZE)
-#define CONFIG_SYS_QMAN_CINH_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
-#define CONFIG_SYS_QMAN_SWP_ISDR_REG   0xE08
-
-#define CONFIG_SYS_DPAA_FMAN
-#define CONFIG_SYS_DPAA_PME
-#define CONFIG_SYS_PMAN
-#define CONFIG_SYS_DPAA_DCE
-#define CONFIG_SYS_DPAA_RMAN
-#define CONFIG_SYS_INTERLAKEN
-
-#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_FMAN_FW_ADDR                0xEFF00000
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
-
-#define CONFIG_BOOTDELAY       0
-
-/*
- * T4240 has 3 DDR controllers. Default to 3-way interleaving. It can be
- * 3way_1KB, 3way_4KB, 3way_8KB. T4160 has 2 DDR controllers. Default to 2-way
- * interleaving. It can be cacheline, page, bank, superbank.
- * See doc/README.fsl-ddr for details.
- */
-#ifdef CONFIG_PPC_T4240
-#define CTRL_INTLV_PREFERED 3way_4KB
-#else
-#define CTRL_INTLV_PREFERED cacheline
-#endif
-
-#define        CONFIG_EXTRA_ENV_SETTINGS                               \
-       "hwconfig=fsl_ddr:"                                     \
-       "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) ","      \
-       "bank_intlv=auto;"                                      \
-       "netdev=eth0\0"                                         \
-       "uboot=" __stringify(CONFIG_UBOOTPATH) "\0"                     \
-"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"            \
-       "consoledev=ttyS0\0"                                    \
-       "ramdiskaddr=2000000\0"                                 \
-       "ramdiskfile=t4240emu/ramdisk.uboot\0"                  \
-       "fdtaddr=c00000\0"                                      \
-       "fdtfile=t4240emu/t4240emu.dtb\0"                               \
-       "bdev=sda3\0"
-
-/*
- * For emulation this causes u-boot to jump to the start of the proof point
- * app code automatically
- */
-#define CONFIG_PROOF_POINTS                    \
-       "setenv bootargs root=/dev/$bdev rw "           \
-       "console=$consoledev,$baudrate $othbootargs;"   \
-       "cpu 1 release 0x29000000 - - -;"               \
-       "cpu 2 release 0x29000000 - - -;"               \
-       "cpu 3 release 0x29000000 - - -;"               \
-       "cpu 4 release 0x29000000 - - -;"               \
-       "cpu 5 release 0x29000000 - - -;"               \
-       "cpu 6 release 0x29000000 - - -;"               \
-       "cpu 7 release 0x29000000 - - -;"               \
-       "go 0x29000000"
-
-#define CONFIG_HVBOOT                          \
-       "setenv bootargs config-addr=0x60000000; "      \
-       "bootm 0x01000000 - 0x00f00000"
-
-#define CONFIG_LINUX                                   \
-       "errata;"                                       \
-       "setenv othbootargs ignore_loglevel;"           \
-       "setenv bootargs root=/dev/ram rw "             \
-       "console=$consoledev,$baudrate $othbootargs;"   \
-       "setenv ramdiskaddr 0x02000000;"                \
-       "setenv fdtaddr 0x00c00000;"                    \
-       "setenv loadaddr 0x1000000;"                    \
-       "bootm $loadaddr $ramdiskaddr $fdtaddr"
-
-#define CONFIG_BOOTCOMMAND             CONFIG_LINUX
-
-#endif /* __CONFIG_H */