-From 968c5e8220209eb2185654f01748c349515a3b8e Mon Sep 17 00:00:00 2001
From: Md Sadre Alam <quic_mdalam@quicinc.com>
-Date: Thu, 15 Feb 2024 12:26:40 +0530
-Subject: [PATCH v10 7/8] arm64: dts: qcom: ipq9574: Add SPI nand support
+To: <broonie@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
+ <conor+dt@kernel.org>, <andersson@kernel.org>,
+ <konradybcio@kernel.org>, <miquel.raynal@bootlin.com>,
+ <richard@nod.at>, <vigneshr@ti.com>,
+ <manivannan.sadhasivam@linaro.org>,
+ <linux-arm-msm@vger.kernel.org>, <linux-spi@vger.kernel.org>,
+ <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
+ <linux-mtd@lists.infradead.org>
+Cc: <quic_srichara@quicinc.com>, <quic_varada@quicinc.com>,
+ <quic_mdalam@quicinc.com>
+Subject: [PATCH v14 7/8] arm64: dts: qcom: ipq9574: Add SPI nand support
+Date: Wed, 20 Nov 2024 14:45:05 +0530 [thread overview]
+Message-ID: <20241120091507.1404368-8-quic_mdalam@quicinc.com> (raw)
+In-Reply-To: <20241120091507.1404368-1-quic_mdalam@quicinc.com>
Add SPI NAND support for ipq9574 SoC.
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
---
+Change in [v14]
+
+* No change
+
+Change in [v13]
+
+* No change
+
+Change in [v12]
+
+* No change
+
+Change in [v11]
+
+* No change
+
Change in [v10]
* No change
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 27 ++++++++++++
2 files changed, 70 insertions(+)
---- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
-+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
-@@ -172,4 +172,47 @@
- bias-pull-down;
- };
+--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+@@ -95,6 +95,49 @@
+ drive-strength = <8>;
+ bias-disable;
};
+
+ qpic_snand_default_state: qpic-snand-default-state {
+ nand-ecc-step-size = <512>;
+ };
};
+
+ &usb_0_dwc3 {
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -447,6 +447,33 @@
+ };
+
+ qpic_nand: spi@79b0000 {
-+ compatible = "qcom,spi-qpic-snand", "qcom,ipq9574-nand";
++ compatible = "qcom,ipq9574-snand";
+ reg = <0x79b0000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
-@@ -272,6 +272,7 @@
+@@ -229,6 +229,7 @@
reg = <1>;
phy-mode = "qsgmii";
managed = "in-band-status";
phy-handle = <&phy0>;
pcs-handle = <&pcsuniphy0_ch0>;
clocks = <&nsscc NSS_CC_PORT1_MAC_CLK>,
-@@ -292,6 +293,7 @@
+@@ -249,6 +250,7 @@
reg = <2>;
phy-mode = "qsgmii";
managed = "in-band-status";
phy-handle = <&phy1>;
pcs-handle = <&pcsuniphy0_ch1>;
clocks = <&nsscc NSS_CC_PORT2_MAC_CLK>,
-@@ -312,6 +314,7 @@
+@@ -269,6 +271,7 @@
reg = <3>;
phy-mode = "qsgmii";
managed = "in-band-status";
phy-handle = <&phy2>;
pcs-handle = <&pcsuniphy0_ch2>;
clocks = <&nsscc NSS_CC_PORT3_MAC_CLK>,
-@@ -332,6 +335,7 @@
+@@ -289,6 +292,7 @@
reg = <4>;
phy-mode = "qsgmii";
managed = "in-band-status";
phy-handle = <&phy3>;
pcs-handle = <&pcsuniphy0_ch3>;
clocks = <&nsscc NSS_CC_PORT4_MAC_CLK>,
-@@ -352,6 +356,7 @@
+@@ -309,6 +313,7 @@
reg = <5>;
phy-mode = "usxgmii";
managed = "in-band-status";
phy-handle = <&phy4>;
pcs-handle = <&pcsuniphy1_ch0>;
clocks = <&nsscc NSS_CC_PORT5_MAC_CLK>,
-@@ -372,6 +377,7 @@
+@@ -329,6 +334,7 @@
reg = <6>;
phy-mode = "usxgmii";
managed = "in-band-status";