[ARM] Orion: distinguish between physical and virtual addresses

Hack up the Orion port to distinguish between virtual and physical
addresses of register windows.  This will allow moving virtual
mappings higher up in the address space, to free up more kernel
virtual address space.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>

diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c
index 488da3811a68041a20bd546728fa6534f21e9272..2e2fd63643c39760ee02153fc62ccba89defba88 100644 (file)
--- a/arch/arm/mach-orion/addr-map.c
+++ b/arch/arm/mach-orion/addr-map.c
@@ -265,15 +265,15 @@ void __init orion_setup_cpu_wins(void)
        }
 
        /*
-        * Setup windows for PCI+PCIE IO+MAM space
+        * Setup windows for PCI+PCIe IO+MEM space.
         */
-       orion_setup_cpu_win(ORION_PCIE_IO, ORION_PCIE_IO_BASE,
-                               ORION_PCIE_IO_SIZE, ORION_PCIE_IO_REMAP);
-       orion_setup_cpu_win(ORION_PCI_IO, ORION_PCI_IO_BASE,
-                               ORION_PCI_IO_SIZE, ORION_PCI_IO_REMAP);
-       orion_setup_cpu_win(ORION_PCIE_MEM, ORION_PCIE_MEM_BASE,
+       orion_setup_cpu_win(ORION_PCIE_IO, ORION_PCIE_IO_PHYS_BASE,
+                               ORION_PCIE_IO_SIZE, ORION_PCIE_IO_BUS_BASE);
+       orion_setup_cpu_win(ORION_PCI_IO, ORION_PCI_IO_PHYS_BASE,
+                               ORION_PCI_IO_SIZE, ORION_PCI_IO_BUS_BASE);
+       orion_setup_cpu_win(ORION_PCIE_MEM, ORION_PCIE_MEM_PHYS_BASE,
                                ORION_PCIE_MEM_SIZE, -1);
-       orion_setup_cpu_win(ORION_PCI_MEM, ORION_PCI_MEM_BASE,
+       orion_setup_cpu_win(ORION_PCI_MEM, ORION_PCI_MEM_PHYS_BASE,
                                ORION_PCI_MEM_SIZE, -1);
 }
 

diff --git a/arch/arm/mach-orion/common.c b/arch/arm/mach-orion/common.c
index 5f41fc537fa5e0e6f23684719bb760915ff18f0a..5f0ee4b8a9b73a5a1cfced1a0e0a5efa91e1e993 100644 (file)
--- a/arch/arm/mach-orion/common.c
+++ b/arch/arm/mach-orion/common.c
@@ -27,26 +27,26 @@
  ****************************************************************************/
 static struct map_desc orion_io_desc[] __initdata = {
        {
-               .virtual        = ORION_REGS_BASE,
-               .pfn            = __phys_to_pfn(ORION_REGS_BASE),
+               .virtual        = ORION_REGS_VIRT_BASE,
+               .pfn            = __phys_to_pfn(ORION_REGS_PHYS_BASE),
                .length         = ORION_REGS_SIZE,
                .type           = MT_DEVICE
        },
        {
-               .virtual        = ORION_PCIE_IO_BASE,
-               .pfn            = __phys_to_pfn(ORION_PCIE_IO_BASE),
+               .virtual        = ORION_PCIE_IO_VIRT_BASE,
+               .pfn            = __phys_to_pfn(ORION_PCIE_IO_PHYS_BASE),
                .length         = ORION_PCIE_IO_SIZE,
                .type           = MT_DEVICE
        },
        {
-               .virtual        = ORION_PCI_IO_BASE,
-               .pfn            = __phys_to_pfn(ORION_PCI_IO_BASE),
+               .virtual        = ORION_PCI_IO_VIRT_BASE,
+               .pfn            = __phys_to_pfn(ORION_PCI_IO_PHYS_BASE),
                .length         = ORION_PCI_IO_SIZE,
                .type           = MT_DEVICE
        },
        {
-               .virtual        = ORION_PCIE_WA_BASE,
-               .pfn            = __phys_to_pfn(ORION_PCIE_WA_BASE),
+               .virtual        = ORION_PCIE_WA_VIRT_BASE,
+               .pfn            = __phys_to_pfn(ORION_PCIE_WA_PHYS_BASE),
                .length         = ORION_PCIE_WA_SIZE,
                .type           = MT_DEVICE
        },
@@ -63,8 +63,8 @@ void __init orion_map_io(void)
 
 static struct resource orion_uart_resources[] = {
        {
-               .start          = UART0_BASE,
-               .end            = UART0_BASE + 0xff,
+               .start          = UART0_PHYS_BASE,
+               .end            = UART0_PHYS_BASE + 0xff,
                .flags          = IORESOURCE_MEM,
        },
        {
@@ -73,8 +73,8 @@ static struct resource orion_uart_resources[] = {
                .flags          = IORESOURCE_IRQ,
        },
        {
-               .start          = UART1_BASE,
-               .end            = UART1_BASE + 0xff,
+               .start          = UART1_PHYS_BASE,
+               .end            = UART1_PHYS_BASE + 0xff,
                .flags          = IORESOURCE_MEM,
        },
        {
@@ -86,8 +86,8 @@ static struct resource orion_uart_resources[] = {
 
 static struct plat_serial8250_port orion_uart_data[] = {
        {
-               .mapbase        = UART0_BASE,
-               .membase        = (char *)UART0_BASE,
+               .mapbase        = UART0_PHYS_BASE,
+               .membase        = (char *)UART0_VIRT_BASE,
                .irq            = IRQ_ORION_UART0,
                .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
                .iotype         = UPIO_MEM,
@@ -95,8 +95,8 @@ static struct plat_serial8250_port orion_uart_data[] = {
                .uartclk        = ORION_TCLK,
        },
        {
-               .mapbase        = UART1_BASE,
-               .membase        = (char *)UART1_BASE,
+               .mapbase        = UART1_PHYS_BASE,
+               .membase        = (char *)UART1_VIRT_BASE,
                .irq            = IRQ_ORION_UART1,
                .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
                .iotype         = UPIO_MEM,
@@ -122,8 +122,8 @@ static struct platform_device orion_uart = {
 
 static struct resource orion_ehci0_resources[] = {
        {
-               .start  = ORION_USB0_REG_BASE,
-               .end    = ORION_USB0_REG_BASE + SZ_4K,
+               .start  = ORION_USB0_PHYS_BASE,
+               .end    = ORION_USB0_PHYS_BASE + SZ_4K,
                .flags  = IORESOURCE_MEM,
        },
        {
@@ -135,8 +135,8 @@ static struct resource orion_ehci0_resources[] = {
 
 static struct resource orion_ehci1_resources[] = {
        {
-               .start  = ORION_USB1_REG_BASE,
-               .end    = ORION_USB1_REG_BASE + SZ_4K,
+               .start  = ORION_USB1_PHYS_BASE,
+               .end    = ORION_USB1_PHYS_BASE + SZ_4K,
                .flags  = IORESOURCE_MEM,
        },
        {
@@ -177,8 +177,8 @@ static struct platform_device orion_ehci1 = {
 
 static struct resource orion_eth_shared_resources[] = {
        {
-               .start  = ORION_ETH_REG_BASE,
-               .end    = ORION_ETH_REG_BASE + 0xffff,
+               .start  = ORION_ETH_PHYS_BASE,
+               .end    = ORION_ETH_PHYS_BASE + 0xffff,
                .flags  = IORESOURCE_MEM,
        },
 };
@@ -227,8 +227,8 @@ static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
 static struct resource orion_i2c_resources[] = {
        {
                .name   = "i2c base",
-               .start  = I2C_BASE,
-               .end    = I2C_BASE + 0x20 -1,
+               .start  = I2C_PHYS_BASE,
+               .end    = I2C_PHYS_BASE + 0x20 -1,
                .flags  = IORESOURCE_MEM,
        },
        {
@@ -255,8 +255,8 @@ static struct platform_device orion_i2c = {
 static struct resource orion_sata_resources[] = {
         {
                 .name   = "sata base",
-                .start  = ORION_SATA_REG_BASE,
-                .end    = ORION_SATA_REG_BASE + 0x5000 - 1,
+                .start  = ORION_SATA_PHYS_BASE,
+                .end    = ORION_SATA_PHYS_BASE + 0x5000 - 1,
                 .flags  = IORESOURCE_MEM,
         },
        {

diff --git a/arch/arm/mach-orion/db88f5281-setup.c b/arch/arm/mach-orion/db88f5281-setup.c
index cb2a95ce5b5755ebefa1f761d756155d019551bc..5ef44e1a2d36cb1882b84c32def55b6f05deb940 100644 (file)
--- a/arch/arm/mach-orion/db88f5281-setup.c
+++ b/arch/arm/mach-orion/db88f5281-setup.c
@@ -354,8 +354,8 @@ static void __init db88f5281_init(void)
 
 MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
        /* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */
-       .phys_io        = ORION_REGS_BASE,
-       .io_pg_offst    = ((ORION_REGS_BASE) >> 18) & 0xfffc,
+       .phys_io        = ORION_REGS_PHYS_BASE,
+       .io_pg_offst    = ((ORION_REGS_VIRT_BASE) >> 18) & 0xfffc,
        .boot_params    = 0x00000100,
        .init_machine   = db88f5281_init,
        .map_io         = orion_map_io,

diff --git a/arch/arm/mach-orion/dns323-setup.c b/arch/arm/mach-orion/dns323-setup.c
index c8a806f249c6add1dcf7f43c21f038d2a6ffc166..02b280c2482064d465fd23a489e046a2d36b3aa3 100644 (file)
--- a/arch/arm/mach-orion/dns323-setup.c
+++ b/arch/arm/mach-orion/dns323-setup.c
@@ -259,8 +259,8 @@ static void __init dns323_init(void)
         *
         * Open a special address decode windows for the PCIE WA.
         */
-       orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
-       orion_write(ORION_REGS_BASE | 0x20070,
+       orion_write(ORION_REGS_VIRT_BASE | 0x20074, ORION_PCIE_WA_PHYS_BASE);
+       orion_write(ORION_REGS_VIRT_BASE | 0x20070,
                    (0x7941 | (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 
        /* set MPP to 0 as D-Link's 2.6.12.6 kernel did */
@@ -312,8 +312,8 @@ static void __init dns323_init(void)
 /* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */
 MACHINE_START(DNS323, "D-Link DNS-323")
        /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
-       .phys_io        = ORION_REGS_BASE,
-       .io_pg_offst    = ((ORION_REGS_BASE) >> 18) & 0xFFFC,
+       .phys_io        = ORION_REGS_PHYS_BASE,
+       .io_pg_offst    = ((ORION_REGS_VIRT_BASE) >> 18) & 0xFFFC,
        .boot_params    = 0x00000100,
        .init_machine   = dns323_init,
        .map_io         = orion_map_io,

diff --git a/arch/arm/mach-orion/kurobox_pro-setup.c b/arch/arm/mach-orion/kurobox_pro-setup.c
index 2d812ed6b5c788deb6f0ab823e5d2dd1ad8cbe46..9bdd987edbb67d5752a0d5763ceebdcce05a61f9 100644 (file)
--- a/arch/arm/mach-orion/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion/kurobox_pro-setup.c
@@ -192,8 +192,8 @@ static void __init kurobox_pro_init(void)
        /*
         * Open a special address decode windows for the PCIE WA.
         */
-       orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
-       orion_write(ORION_REGS_BASE | 0x20070, (0x7941 |
+       orion_write(ORION_REGS_VIRT_BASE | 0x20074, ORION_PCIE_WA_PHYS_BASE);
+       orion_write(ORION_REGS_VIRT_BASE | 0x20070, (0x7941 |
                (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 
        /*
@@ -224,8 +224,8 @@ static void __init kurobox_pro_init(void)
 
 MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro")
        /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
-       .phys_io        = ORION_REGS_BASE,
-       .io_pg_offst    = ((ORION_REGS_BASE) >> 18) & 0xFFFC,
+       .phys_io        = ORION_REGS_PHYS_BASE,
+       .io_pg_offst    = ((ORION_REGS_VIRT_BASE) >> 18) & 0xFFFC,
        .boot_params    = 0x00000100,
        .init_machine   = kurobox_pro_init,
        .map_io         = orion_map_io,

diff --git a/arch/arm/mach-orion/pci.c b/arch/arm/mach-orion/pci.c
index 0498d7c69b30896e423342fa3bf61804c2d2d6f2..b109bb46681e622fc9cff7973e7ba4f00a34d524 100644 (file)
--- a/arch/arm/mach-orion/pci.c
+++ b/arch/arm/mach-orion/pci.c
@@ -156,7 +156,7 @@ static int orion_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
        orion_pcie_id(&dev, &rev);
        if (dev == MV88F5181_DEV_ID || dev == MV88F5182_DEV_ID) {
                /* extended register space */
-               pcie_addr = ORION_PCIE_WA_BASE;
+               pcie_addr = ORION_PCIE_WA_VIRT_BASE;
                pcie_addr |= PCIE_CONF_BUS(bus->number) |
                        PCIE_CONF_DEV(PCI_SLOT(devfn)) |
                        PCIE_CONF_FUNC(PCI_FUNC(devfn)) |
@@ -241,7 +241,7 @@ static int orion_pcie_setup(struct pci_sys_data *sys)
         */
        res[0].name = "PCI-EX I/O Space";
        res[0].flags = IORESOURCE_IO;
-       res[0].start = ORION_PCIE_IO_REMAP;
+       res[0].start = ORION_PCIE_IO_BUS_BASE;
        res[0].end = res[0].start + ORION_PCIE_IO_SIZE - 1;
        if (request_resource(&ioport_resource, &res[0]))
                panic("Request PCIE IO resource failed\n");
@@ -252,7 +252,7 @@ static int orion_pcie_setup(struct pci_sys_data *sys)
         */
        res[1].name = "PCI-EX Memory Space";
        res[1].flags = IORESOURCE_MEM;
-       res[1].start = ORION_PCIE_MEM_BASE;
+       res[1].start = ORION_PCIE_MEM_PHYS_BASE;
        res[1].end = res[1].start + ORION_PCIE_MEM_SIZE - 1;
        if (request_resource(&iomem_resource, &res[1]))
                panic("Request PCIE Memory resource failed\n");
@@ -477,7 +477,7 @@ static int orion_pci_setup(struct pci_sys_data *sys)
         */
        res[0].name = "PCI I/O Space";
        res[0].flags = IORESOURCE_IO;
-       res[0].start = ORION_PCI_IO_REMAP;
+       res[0].start = ORION_PCI_IO_BUS_BASE;
        res[0].end = res[0].start + ORION_PCI_IO_SIZE - 1;
        if (request_resource(&ioport_resource, &res[0]))
                panic("Request PCI IO resource failed\n");
@@ -488,7 +488,7 @@ static int orion_pci_setup(struct pci_sys_data *sys)
         */
        res[1].name = "PCI Memory Space";
        res[1].flags = IORESOURCE_MEM;
-       res[1].start = ORION_PCI_MEM_BASE;
+       res[1].start = ORION_PCI_MEM_PHYS_BASE;
        res[1].end = res[1].start + ORION_PCI_MEM_SIZE - 1;
        if (request_resource(&iomem_resource, &res[1]))
                panic("Request PCI Memory resource failed\n");

diff --git a/arch/arm/mach-orion/rd88f5182-setup.c b/arch/arm/mach-orion/rd88f5182-setup.c
index 797c54c80c2b013749dc126ce0722a7d99ee18f7..e851b8ca5ac6fb48921d6237477274dde5c0bb49 100644 (file)
--- a/arch/arm/mach-orion/rd88f5182-setup.c
+++ b/arch/arm/mach-orion/rd88f5182-setup.c
@@ -263,8 +263,8 @@ static void __init rd88f5182_init(void)
        /*
         * Open a special address decode windows for the PCIE WA.
         */
-       orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
-       orion_write(ORION_REGS_BASE | 0x20070, (0x7941 |
+       orion_write(ORION_REGS_VIRT_BASE | 0x20074, ORION_PCIE_WA_PHYS_BASE);
+       orion_write(ORION_REGS_VIRT_BASE | 0x20070, (0x7941 |
                (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 
        /*
@@ -305,8 +305,8 @@ static void __init rd88f5182_init(void)
 
 MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
        /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
-       .phys_io        = ORION_REGS_BASE,
-       .io_pg_offst    = ((ORION_REGS_BASE) >> 18) & 0xFFFC,
+       .phys_io        = ORION_REGS_PHYS_BASE,
+       .io_pg_offst    = ((ORION_REGS_VIRT_BASE) >> 18) & 0xFFFC,
        .boot_params    = 0x00000100,
        .init_machine   = rd88f5182_init,
        .map_io         = orion_map_io,

diff --git a/arch/arm/mach-orion/ts209-setup.c b/arch/arm/mach-orion/ts209-setup.c
index e3e930efd155e0a3eb3fe83730c2999d317e90fd..8edb2ac09662016f4d1e71cac09cb757d75b1216 100644 (file)
--- a/arch/arm/mach-orion/ts209-setup.c
+++ b/arch/arm/mach-orion/ts209-setup.c
@@ -244,7 +244,7 @@ static struct platform_device *qnap_ts209_devices[] __initdata = {
  * QNAP TS-[12]09 specific power off method via UART1-attached PIC
  */
 
-#define UART1_REG(x)  (UART1_BASE + ((UART_##x) << 2))
+#define UART1_REG(x)  (UART1_VIRT_BASE + ((UART_##x) << 2))
 
 static void qnap_ts209_power_off(void)
 {
@@ -282,8 +282,8 @@ static void __init qnap_ts209_init(void)
        /*
         * Open a special address decode windows for the PCIE WA.
         */
-       orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
-       orion_write(ORION_REGS_BASE | 0x20070, (0x7941 |
+       orion_write(ORION_REGS_VIRT_BASE | 0x20074, ORION_PCIE_WA_PHYS_BASE);
+       orion_write(ORION_REGS_VIRT_BASE | 0x20070, (0x7941 |
                (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 
        /*
@@ -325,8 +325,8 @@ static void __init qnap_ts209_init(void)
 
 MACHINE_START(TS209, "QNAP TS-109/TS-209")
        /* Maintainer:  Byron Bradley <byron.bbradley@gmail.com> */
-       .phys_io        = ORION_REGS_BASE,
-       .io_pg_offst    = ((ORION_REGS_BASE) >> 18) & 0xFFFC,
+       .phys_io        = ORION_REGS_PHYS_BASE,
+       .io_pg_offst    = ((ORION_REGS_VIRT_BASE) >> 18) & 0xFFFC,
        .boot_params    = 0x00000100,
        .init_machine   = qnap_ts209_init,
        .map_io         = orion_map_io,

diff --git a/include/asm-arm/arch-orion/debug-macro.S b/include/asm-arm/arch-orion/debug-macro.S
index e2a80641f21462d6f630428a8cf818a16ae96512..2746220f5d858ccf532f02a8f200d476450be3f0 100644 (file)
--- a/include/asm-arm/arch-orion/debug-macro.S
+++ b/include/asm-arm/arch-orion/debug-macro.S
@@ -8,9 +8,14 @@
  * published by the Free Software Foundation.
 */
 
+#include <asm/arch/orion.h>
+
        .macro  addruart,rx
-       mov   \rx, #0xf1000000
-       orr   \rx, \rx, #0x00012000
+       mrc     p15, 0, \rx, c1, c0
+       tst     \rx, #1                                 @ MMU enabled?
+       ldreq   \rx, =ORION_REGS_PHYS_BASE
+       ldrne   \rx, =ORION_REGS_VIRT_BASE
+       orr     \rx, \rx, #0x00012000
        .endm
 
 #define UART_SHIFT     2

diff --git a/include/asm-arm/arch-orion/entry-macro.S b/include/asm-arm/arch-orion/entry-macro.S
index b76075a7e44bef9f0254965d1df52fe75e857bd9..cda096b2acfdda13221da932b82d610bb5973453 100644 (file)
--- a/include/asm-arm/arch-orion/entry-macro.S
+++ b/include/asm-arm/arch-orion/entry-macro.S
@@ -3,8 +3,8 @@
  *
  * Low-level IRQ helper macros for Orion platforms
  *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
 

diff --git a/include/asm-arm/arch-orion/hardware.h b/include/asm-arm/arch-orion/hardware.h
index 8a12d213fbdc987b98866031931bdaa9c9f20d27..65da374de73555e65da10f50e241198a4a973ba7 100644 (file)
--- a/include/asm-arm/arch-orion/hardware.h
+++ b/include/asm-arm/arch-orion/hardware.h
@@ -4,7 +4,6 @@
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
- *
  */
 
 #ifndef __ASM_ARCH_HARDWARE_H__
@@ -12,13 +11,11 @@
 
 #include "orion.h"
 
-#define PCI_MEMORY_VADDR        ORION_PCI_SYS_MEM_BASE
-#define PCI_IO_VADDR            ORION_PCI_SYS_IO_BASE
+#define pcibios_assign_all_busses()    1
 
-#define pcibios_assign_all_busses()  1
+#define PCIBIOS_MIN_IO         0x00001000
+#define PCIBIOS_MIN_MEM                0x01000000
+#define PCIMEM_BASE            ORION_PCIE_MEM_PHYS_BASE
 
-#define PCIBIOS_MIN_IO  0x1000
-#define PCIBIOS_MIN_MEM 0x01000000
-#define PCIMEM_BASE     PCI_MEMORY_VADDR /* mem base for VGA */
 
-#endif  /* _ASM_ARCH_HARDWARE_H */
+#endif

diff --git a/include/asm-arm/arch-orion/orion.h b/include/asm-arm/arch-orion/orion.h
index f787f752e58c62d9d7c790a12b8f7cfc654dec0a..4a8025466a33ee142df56e6c81ce6087a703a0d7 100644 (file)
--- a/include/asm-arm/arch-orion/orion.h
+++ b/include/asm-arm/arch-orion/orion.h
@@ -14,32 +14,40 @@
 #ifndef __ASM_ARCH_ORION_H__
 #define __ASM_ARCH_ORION_H__
 
-/*******************************************************************************
+/*****************************************************************************
  * Orion Address Map
- * Use the same mapping (1:1 virtual:physical) of internal registers and
- * PCI system (PCI+PCIE) for all machines.
- * Each machine defines the rest of its mapping (e.g. device bus flashes)
- ******************************************************************************/
-#define ORION_REGS_BASE                0xf1000000
+ *
+ * virt                phys            size
+ * f0000000    f0000000        16M     PCIe WA space (Orion-NAS only)
+ * f1000000    f1000000        1M      on-chip peripheral registers
+ * f2000000    f2000000        1M      PCIe I/O space
+ * f2100000    f2100000        1M      PCI I/O space
+ ****************************************************************************/
+#define ORION_REGS_PHYS_BASE   0xf1000000
+#define ORION_REGS_VIRT_BASE   0xf1000000
 #define ORION_REGS_SIZE                SZ_1M
 
-#define ORION_PCI_SYS_MEM_BASE 0xe0000000
-#define ORION_PCIE_MEM_BASE    ORION_PCI_SYS_MEM_BASE
-#define ORION_PCIE_MEM_SIZE    SZ_128M
-#define ORION_PCI_MEM_BASE     (ORION_PCIE_MEM_BASE + ORION_PCIE_MEM_SIZE)
-#define ORION_PCI_MEM_SIZE     SZ_128M
-
-#define ORION_PCI_SYS_IO_BASE  0xf2000000
-#define ORION_PCIE_IO_BASE     ORION_PCI_SYS_IO_BASE
+#define ORION_PCIE_IO_PHYS_BASE        0xf2000000
+#define ORION_PCIE_IO_VIRT_BASE        0xf2000000
+#define ORION_PCIE_IO_BUS_BASE 0x00000000
 #define ORION_PCIE_IO_SIZE     SZ_1M
-#define ORION_PCIE_IO_REMAP    (ORION_PCIE_IO_BASE - ORION_PCI_SYS_IO_BASE)
-#define ORION_PCI_IO_BASE      (ORION_PCIE_IO_BASE + ORION_PCIE_IO_SIZE)
+
+#define ORION_PCI_IO_PHYS_BASE 0xf2100000
+#define ORION_PCI_IO_VIRT_BASE 0xf2100000
+#define ORION_PCI_IO_BUS_BASE  0x00100000
 #define ORION_PCI_IO_SIZE      SZ_1M
-#define ORION_PCI_IO_REMAP     (ORION_PCI_IO_BASE - ORION_PCI_SYS_IO_BASE)
+
 /* Relevant only for Orion-NAS */
-#define ORION_PCIE_WA_BASE     0xf0000000
+#define ORION_PCIE_WA_PHYS_BASE        0xf0000000
+#define ORION_PCIE_WA_VIRT_BASE        0xf0000000
 #define ORION_PCIE_WA_SIZE     SZ_16M
 
+#define ORION_PCIE_MEM_PHYS_BASE       0xe0000000
+#define ORION_PCIE_MEM_SIZE            SZ_128M
+
+#define ORION_PCI_MEM_PHYS_BASE                0xe8000000
+#define ORION_PCI_MEM_SIZE             SZ_128M
+
 /*******************************************************************************
  * Supported Devices & Revisions
  ******************************************************************************/
@@ -57,25 +65,42 @@
 /*******************************************************************************
  * Orion Registers Map
  ******************************************************************************/
-#define ORION_DDR_REG_BASE     (ORION_REGS_BASE | 0x00000)
-#define ORION_DEV_BUS_REG_BASE (ORION_REGS_BASE | 0x10000)
-#define ORION_BRIDGE_REG_BASE  (ORION_REGS_BASE | 0x20000)
-#define ORION_PCI_REG_BASE     (ORION_REGS_BASE | 0x30000)
-#define ORION_PCIE_REG_BASE    (ORION_REGS_BASE | 0x40000)
-#define ORION_USB0_REG_BASE    (ORION_REGS_BASE | 0x50000)
-#define ORION_ETH_REG_BASE     (ORION_REGS_BASE | 0x70000)
-#define ORION_SATA_REG_BASE    (ORION_REGS_BASE | 0x80000)
-#define ORION_USB1_REG_BASE    (ORION_REGS_BASE | 0xa0000)
-
-#define ORION_DDR_REG(x)       (ORION_DDR_REG_BASE | (x))
-#define ORION_DEV_BUS_REG(x)   (ORION_DEV_BUS_REG_BASE | (x))
-#define ORION_BRIDGE_REG(x)    (ORION_BRIDGE_REG_BASE | (x))
-#define ORION_PCI_REG(x)       (ORION_PCI_REG_BASE | (x))
-#define ORION_PCIE_REG(x)      (ORION_PCIE_REG_BASE | (x))
-#define ORION_USB0_REG(x)      (ORION_USB0_REG_BASE | (x))
-#define ORION_USB1_REG(x)      (ORION_USB1_REG_BASE | (x))
-#define ORION_ETH_REG(x)       (ORION_ETH_REG_BASE | (x))
-#define ORION_SATA_REG(x)      (ORION_SATA_REG_BASE | (x))
+#define ORION_DDR_VIRT_BASE            (ORION_REGS_VIRT_BASE | 0x00000)
+#define ORION_DDR_REG(x)               (ORION_DDR_VIRT_BASE | (x))
+
+#define ORION_DEV_BUS_PHYS_BASE                (ORION_REGS_PHYS_BASE | 0x10000)
+#define ORION_DEV_BUS_VIRT_BASE                (ORION_REGS_VIRT_BASE | 0x10000)
+#define ORION_DEV_BUS_REG(x)           (ORION_DEV_BUS_VIRT_BASE | (x))
+#define  I2C_PHYS_BASE                 (ORION_DEV_BUS_PHYS_BASE | 0x1000)
+#define  UART0_PHYS_BASE               (ORION_DEV_BUS_PHYS_BASE | 0x2000)
+#define  UART0_VIRT_BASE               (ORION_DEV_BUS_VIRT_BASE | 0x2000)
+#define  UART1_PHYS_BASE               (ORION_DEV_BUS_PHYS_BASE | 0x2100)
+#define  UART1_VIRT_BASE               (ORION_DEV_BUS_VIRT_BASE | 0x2100)
+
+#define ORION_BRIDGE_VIRT_BASE         (ORION_REGS_VIRT_BASE | 0x20000)
+#define ORION_BRIDGE_REG(x)            (ORION_BRIDGE_VIRT_BASE | (x))
+
+#define ORION_PCI_VIRT_BASE            (ORION_REGS_VIRT_BASE | 0x30000)
+#define ORION_PCI_REG(x)               (ORION_PCI_VIRT_BASE | (x))
+
+#define ORION_PCIE_VIRT_BASE           (ORION_REGS_VIRT_BASE | 0x40000)
+#define ORION_PCIE_REG(x)              (ORION_PCIE_VIRT_BASE | (x))
+
+#define ORION_USB0_PHYS_BASE           (ORION_REGS_PHYS_BASE | 0x50000)
+#define ORION_USB0_VIRT_BASE           (ORION_REGS_VIRT_BASE | 0x50000)
+#define ORION_USB0_REG(x)              (ORION_USB0_VIRT_BASE | (x))
+
+#define ORION_ETH_PHYS_BASE            (ORION_REGS_PHYS_BASE | 0x70000)
+#define ORION_ETH_VIRT_BASE            (ORION_REGS_VIRT_BASE | 0x70000)
+#define ORION_ETH_REG(x)               (ORION_ETH_VIRT_BASE | (x))
+
+#define ORION_SATA_PHYS_BASE           (ORION_REGS_PHYS_BASE | 0x80000)
+#define ORION_SATA_VIRT_BASE           (ORION_REGS_VIRT_BASE | 0x80000)
+#define ORION_SATA_REG(x)              (ORION_SATA_VIRT_BASE | (x))
+
+#define ORION_USB1_PHYS_BASE           (ORION_REGS_PHYS_BASE | 0xa0000)
+#define ORION_USB1_VIRT_BASE           (ORION_REGS_VIRT_BASE | 0xa0000)
+#define ORION_USB1_REG(x)              (ORION_USB1_VIRT_BASE | (x))
 
 /*******************************************************************************
  * Device Bus Registers
@@ -100,9 +125,6 @@
 #define DEV_BUS_CTRL           ORION_DEV_BUS_REG(0x4c0)
 #define DEV_BUS_INT_CAUSE      ORION_DEV_BUS_REG(0x4d0)
 #define DEV_BUS_INT_MASK       ORION_DEV_BUS_REG(0x4d4)
-#define I2C_BASE               ORION_DEV_BUS_REG(0x1000)
-#define UART0_BASE             ORION_DEV_BUS_REG(0x2000)
-#define UART1_BASE             ORION_DEV_BUS_REG(0x2100)
 #define GPIO_MAX               32
 
 /***************************************************************************

diff --git a/include/asm-arm/arch-orion/uncompress.h b/include/asm-arm/arch-orion/uncompress.h
index 0cab78ad63321303eb3e5666977ba57aa91e56e7..59f44039909a9b40e113d7fc55bba23c8eb997be 100644 (file)
--- a/include/asm-arm/arch-orion/uncompress.h
+++ b/include/asm-arm/arch-orion/uncompress.h
@@ -10,8 +10,8 @@
 
 #include <asm/arch/orion.h>
 
-#define MV_UART_LSR    ((volatile unsigned char *)(UART0_BASE + 0x14))
-#define MV_UART_THR    ((volatile unsigned char *)(UART0_BASE + 0x0))
+#define MV_UART_THR    ((volatile unsigned char *)(UART0_PHYS_BASE + 0x0))
+#define MV_UART_LSR    ((volatile unsigned char *)(UART0_PHYS_BASE + 0x14))
 
 #define LSR_THRE       0x20