source "drivers/usb/chipidea/Kconfig"
+source "drivers/usb/isp1760/Kconfig"
+
comment "USB port drivers"
if USB
obj-$(CONFIG_USB_DWC3) += dwc3/
obj-$(CONFIG_USB_DWC2) += dwc2/
+obj-$(CONFIG_USB_ISP1760) += isp1760/
obj-$(CONFIG_USB_MON) += mon/
obj-$(CONFIG_USB_U132_HCD) += host/
obj-$(CONFIG_USB_R8A66597_HCD) += host/
obj-$(CONFIG_USB_HWA_HCD) += host/
-obj-$(CONFIG_USB_ISP1760_HCD) += host/
obj-$(CONFIG_USB_IMX21_HCD) += host/
obj-$(CONFIG_USB_FSL_MPH_DR_OF) += host/
obj-$(CONFIG_USB_FUSBH200_HCD) += host/
Select this to support Aeroflex Gaisler GRUSBDC cores from the GRLIB
VHDL IP core library.
-config USB_ISP1761_UDC
- boolean "NXP ISP1761 USB Device Controller"
- depends on USB_ISP1760_HCD
- help
- The NXP ISP1761 is a dual-role high-speed USB host and device
- controller.
-
config USB_OMAP
tristate "OMAP USB Device Controller"
depends on ARCH_OMAP1
To compile this driver as a module, choose M here: the
module will be called isp116x-hcd.
-config USB_ISP1760_HCD
- tristate "ISP 1760 HCD support"
- ---help---
- The ISP1760 chip is a USB 2.0 host controller.
-
- This driver does not support isochronous transfers or OTG.
- This USB controller is usually attached to a non-DMA-Master
- capable bus. NXP's eval kit brings this chip on PCI card
- where the chip itself is behind a PLB to simulate such
- a bus.
-
- To compile this driver as a module, choose M here: the
- module will be called isp1760.
-
config USB_ISP1362_HCD
tristate "ISP1362 HCD support"
---help---
# tell define_trace.h where to find the xhci trace header
CFLAGS_xhci-trace.o := -I$(src)
-isp1760-y := isp1760-core.o isp1760-hcd.o isp1760-if.o
-isp1760-$(CONFIG_USB_ISP1761_UDC) += isp1760-udc.o
-
fhci-y := fhci-hcd.o fhci-hub.o fhci-q.o
fhci-y += fhci-mem.o fhci-tds.o fhci-sched.o
obj-$(CONFIG_USB_SL811_CS) += sl811_cs.o
obj-$(CONFIG_USB_U132_HCD) += u132-hcd.o
obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
-obj-$(CONFIG_USB_ISP1760_HCD) += isp1760.o
obj-$(CONFIG_USB_HWA_HCD) += hwa-hc.o
obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd.o
obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-mph-dr-of.o
+++ /dev/null
-/*
- * Driver for the NXP ISP1760 chip
- *
- * Copyright 2014 Laurent Pinchart
- * Copyright 2007 Sebastian Siewior
- *
- * Contacts:
- * Sebastian Siewior <bigeasy@linutronix.de>
- * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- */
-
-#include <linux/delay.h>
-#include <linux/gpio/consumer.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/usb.h>
-
-#include "isp1760-core.h"
-#include "isp1760-hcd.h"
-#include "isp1760-regs.h"
-#include "isp1760-udc.h"
-
-static void isp1760_init_core(struct isp1760_device *isp)
-{
- u32 otgctrl;
- u32 hwmode;
-
- /* Low-level chip reset */
- if (isp->rst_gpio) {
- gpiod_set_value_cansleep(isp->rst_gpio, 1);
- mdelay(50);
- gpiod_set_value_cansleep(isp->rst_gpio, 0);
- }
-
- /*
- * Reset the host controller, including the CPU interface
- * configuration.
- */
- isp1760_write32(isp->regs, HC_RESET_REG, SW_RESET_RESET_ALL);
- msleep(100);
-
- /* Setup HW Mode Control: This assumes a level active-low interrupt */
- hwmode = HW_DATA_BUS_32BIT;
-
- if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_16)
- hwmode &= ~HW_DATA_BUS_32BIT;
- if (isp->devflags & ISP1760_FLAG_ANALOG_OC)
- hwmode |= HW_ANA_DIGI_OC;
- if (isp->devflags & ISP1760_FLAG_DACK_POL_HIGH)
- hwmode |= HW_DACK_POL_HIGH;
- if (isp->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
- hwmode |= HW_DREQ_POL_HIGH;
- if (isp->devflags & ISP1760_FLAG_INTR_POL_HIGH)
- hwmode |= HW_INTR_HIGH_ACT;
- if (isp->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
- hwmode |= HW_INTR_EDGE_TRIG;
-
- /*
- * The ISP1761 has a dedicated DC IRQ line but supports sharing the HC
- * IRQ line for both the host and device controllers. Hardcode IRQ
- * sharing for now and disable the DC interrupts globally to avoid
- * spurious interrupts during HCD registration.
- */
- if (isp->devflags & ISP1760_FLAG_ISP1761) {
- isp1760_write32(isp->regs, DC_MODE, 0);
- hwmode |= HW_COMN_IRQ;
- }
-
- /*
- * We have to set this first in case we're in 16-bit mode.
- * Write it twice to ensure correct upper bits if switching
- * to 16-bit mode.
- */
- isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode);
- isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode);
-
- /*
- * PORT 1 Control register of the ISP1760 is the OTG control register
- * on ISP1761.
- *
- * TODO: Really support OTG. For now we configure port 1 in device mode
- * when OTG is requested.
- */
- if ((isp->devflags & ISP1760_FLAG_ISP1761) &&
- (isp->devflags & ISP1760_FLAG_OTG_EN))
- otgctrl = ((HW_DM_PULLDOWN | HW_DP_PULLDOWN) << 16)
- | HW_OTG_DISABLE;
- else
- otgctrl = (HW_SW_SEL_HC_DC << 16)
- | (HW_VBUS_DRV | HW_SEL_CP_EXT);
-
- isp1760_write32(isp->regs, HC_PORT1_CTRL, otgctrl);
-
- dev_info(isp->dev, "bus width: %u, oc: %s\n",
- isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32,
- isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital");
-}
-
-void isp1760_set_pullup(struct isp1760_device *isp, bool enable)
-{
- isp1760_write32(isp->regs, HW_OTG_CTRL_SET,
- enable ? HW_DP_PULLUP : HW_DP_PULLUP << 16);
-}
-
-int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
- struct device *dev, unsigned int devflags)
-{
- struct isp1760_device *isp;
- int ret;
-
- if (usb_disabled())
- return -ENODEV;
-
- /* prevent usb-core allocating DMA pages */
- dev->dma_mask = NULL;
-
- isp = devm_kzalloc(dev, sizeof(*isp), GFP_KERNEL);
- if (!isp)
- return -ENOMEM;
-
- isp->dev = dev;
- isp->devflags = devflags;
-
- isp->rst_gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);
- if (IS_ERR(isp->rst_gpio))
- return PTR_ERR(isp->rst_gpio);
-
- isp->regs = devm_ioremap_resource(dev, mem);
- if (IS_ERR(isp->regs))
- return PTR_ERR(isp->regs);
-
- isp1760_init_core(isp);
-
- ret = isp1760_hcd_register(&isp->hcd, isp->regs, mem, irq,
- irqflags | IRQF_SHARED, dev);
- if (ret < 0)
- return ret;
-
- if (devflags & ISP1760_FLAG_ISP1761) {
- ret = isp1760_udc_register(isp, irq, irqflags | IRQF_SHARED |
- IRQF_DISABLED);
- if (ret < 0) {
- isp1760_hcd_unregister(&isp->hcd);
- return ret;
- }
- }
-
- dev_set_drvdata(dev, isp);
-
- return 0;
-}
-
-void isp1760_unregister(struct device *dev)
-{
- struct isp1760_device *isp = dev_get_drvdata(dev);
-
- if (isp->devflags & ISP1760_FLAG_ISP1761)
- isp1760_udc_unregister(isp);
-
- isp1760_hcd_unregister(&isp->hcd);
-}
-
-MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
-MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
-MODULE_LICENSE("GPL v2");
+++ /dev/null
-/*
- * Driver for the NXP ISP1760 chip
- *
- * Copyright 2014 Laurent Pinchart
- * Copyright 2007 Sebastian Siewior
- *
- * Contacts:
- * Sebastian Siewior <bigeasy@linutronix.de>
- * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- */
-
-#ifndef _ISP1760_CORE_H_
-#define _ISP1760_CORE_H_
-
-#include <linux/ioport.h>
-
-#include "isp1760-hcd.h"
-#include "isp1760-udc.h"
-
-struct device;
-struct gpio_desc;
-
-/*
- * Device flags that can vary from board to board. All of these
- * indicate the most "atypical" case, so that a devflags of 0 is
- * a sane default configuration.
- */
-#define ISP1760_FLAG_BUS_WIDTH_16 0x00000002 /* 16-bit data bus width */
-#define ISP1760_FLAG_OTG_EN 0x00000004 /* Port 1 supports OTG */
-#define ISP1760_FLAG_ANALOG_OC 0x00000008 /* Analog overcurrent */
-#define ISP1760_FLAG_DACK_POL_HIGH 0x00000010 /* DACK active high */
-#define ISP1760_FLAG_DREQ_POL_HIGH 0x00000020 /* DREQ active high */
-#define ISP1760_FLAG_ISP1761 0x00000040 /* Chip is ISP1761 */
-#define ISP1760_FLAG_INTR_POL_HIGH 0x00000080 /* Interrupt polarity active high */
-#define ISP1760_FLAG_INTR_EDGE_TRIG 0x00000100 /* Interrupt edge triggered */
-
-struct isp1760_device {
- struct device *dev;
-
- void __iomem *regs;
- unsigned int devflags;
- struct gpio_desc *rst_gpio;
-
- struct isp1760_hcd hcd;
- struct isp1760_udc udc;
-};
-
-int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
- struct device *dev, unsigned int devflags);
-void isp1760_unregister(struct device *dev);
-
-void isp1760_set_pullup(struct isp1760_device *isp, bool enable);
-
-static inline u32 isp1760_read32(void __iomem *base, u32 reg)
-{
- return readl(base + reg);
-}
-
-static inline void isp1760_write32(void __iomem *base, u32 reg, u32 val)
-{
- writel(val, base + reg);
-}
-
-#endif
+++ /dev/null
-/*
- * Driver for the NXP ISP1760 chip
- *
- * However, the code might contain some bugs. What doesn't work for sure is:
- * - ISO
- * - OTG
- e The interrupt line is configured as active low, level.
- *
- * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
- *
- * (c) 2011 Arvid Brodin <arvid.brodin@enea.com>
- *
- */
-#include <linux/gpio/consumer.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/list.h>
-#include <linux/usb.h>
-#include <linux/usb/hcd.h>
-#include <linux/debugfs.h>
-#include <linux/uaccess.h>
-#include <linux/io.h>
-#include <linux/mm.h>
-#include <linux/timer.h>
-#include <asm/unaligned.h>
-#include <asm/cacheflush.h>
-
-#include "isp1760-core.h"
-#include "isp1760-hcd.h"
-#include "isp1760-regs.h"
-
-static struct kmem_cache *qtd_cachep;
-static struct kmem_cache *qh_cachep;
-static struct kmem_cache *urb_listitem_cachep;
-
-typedef void (packet_enqueue)(struct usb_hcd *hcd, struct isp1760_qh *qh,
- struct isp1760_qtd *qtd);
-
-static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
-{
- return *(struct isp1760_hcd **)hcd->hcd_priv;
-}
-
-/* urb state*/
-#define DELETE_URB (0x0008)
-#define NO_TRANSFER_ACTIVE (0xffffffff)
-
-/* Philips Proprietary Transfer Descriptor (PTD) */
-typedef __u32 __bitwise __dw;
-struct ptd {
- __dw dw0;
- __dw dw1;
- __dw dw2;
- __dw dw3;
- __dw dw4;
- __dw dw5;
- __dw dw6;
- __dw dw7;
-};
-#define PTD_OFFSET 0x0400
-#define ISO_PTD_OFFSET 0x0400
-#define INT_PTD_OFFSET 0x0800
-#define ATL_PTD_OFFSET 0x0c00
-#define PAYLOAD_OFFSET 0x1000
-
-
-/* ATL */
-/* DW0 */
-#define DW0_VALID_BIT 1
-#define FROM_DW0_VALID(x) ((x) & 0x01)
-#define TO_DW0_LENGTH(x) (((u32) x) << 3)
-#define TO_DW0_MAXPACKET(x) (((u32) x) << 18)
-#define TO_DW0_MULTI(x) (((u32) x) << 29)
-#define TO_DW0_ENDPOINT(x) (((u32) x) << 31)
-/* DW1 */
-#define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3)
-#define TO_DW1_PID_TOKEN(x) (((u32) x) << 10)
-#define DW1_TRANS_BULK ((u32) 2 << 12)
-#define DW1_TRANS_INT ((u32) 3 << 12)
-#define DW1_TRANS_SPLIT ((u32) 1 << 14)
-#define DW1_SE_USB_LOSPEED ((u32) 2 << 16)
-#define TO_DW1_PORT_NUM(x) (((u32) x) << 18)
-#define TO_DW1_HUB_NUM(x) (((u32) x) << 25)
-/* DW2 */
-#define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8)
-#define TO_DW2_RL(x) ((x) << 25)
-#define FROM_DW2_RL(x) (((x) >> 25) & 0xf)
-/* DW3 */
-#define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff)
-#define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff)
-#define TO_DW3_NAKCOUNT(x) ((x) << 19)
-#define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf)
-#define TO_DW3_CERR(x) ((x) << 23)
-#define FROM_DW3_CERR(x) (((x) >> 23) & 0x3)
-#define TO_DW3_DATA_TOGGLE(x) ((x) << 25)
-#define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1)
-#define TO_DW3_PING(x) ((x) << 26)
-#define FROM_DW3_PING(x) (((x) >> 26) & 0x1)
-#define DW3_ERROR_BIT (1 << 28)
-#define DW3_BABBLE_BIT (1 << 29)
-#define DW3_HALT_BIT (1 << 30)
-#define DW3_ACTIVE_BIT (1 << 31)
-#define FROM_DW3_ACTIVE(x) (((x) >> 31) & 0x01)
-
-#define INT_UNDERRUN (1 << 2)
-#define INT_BABBLE (1 << 1)
-#define INT_EXACT (1 << 0)
-
-#define SETUP_PID (2)
-#define IN_PID (1)
-#define OUT_PID (0)
-
-/* Errata 1 */
-#define RL_COUNTER (0)
-#define NAK_COUNTER (0)
-#define ERR_COUNTER (2)
-
-struct isp1760_qtd {
- u8 packet_type;
- void *data_buffer;
- u32 payload_addr;
-
- /* the rest is HCD-private */
- struct list_head qtd_list;
- struct urb *urb;
- size_t length;
- size_t actual_length;
-
- /* QTD_ENQUEUED: waiting for transfer (inactive) */
- /* QTD_PAYLOAD_ALLOC: chip mem has been allocated for payload */
- /* QTD_XFER_STARTED: valid ptd has been written to isp176x - only
- interrupt handler may touch this qtd! */
- /* QTD_XFER_COMPLETE: payload has been transferred successfully */
- /* QTD_RETIRE: transfer error/abort qtd */
-#define QTD_ENQUEUED 0
-#define QTD_PAYLOAD_ALLOC 1
-#define QTD_XFER_STARTED 2
-#define QTD_XFER_COMPLETE 3
-#define QTD_RETIRE 4
- u32 status;
-};
-
-/* Queue head, one for each active endpoint */
-struct isp1760_qh {
- struct list_head qh_list;
- struct list_head qtd_list;
- u32 toggle;
- u32 ping;
- int slot;
- int tt_buffer_dirty; /* See USB2.0 spec section 11.17.5 */
-};
-
-struct urb_listitem {
- struct list_head urb_list;
- struct urb *urb;
-};
-
-/*
- * Access functions for isp176x registers (addresses 0..0x03FF).
- */
-static u32 reg_read32(void __iomem *base, u32 reg)
-{
- return isp1760_read32(base, reg);
-}
-
-static void reg_write32(void __iomem *base, u32 reg, u32 val)
-{
- isp1760_write32(base, reg, val);
-}
-
-/*
- * Access functions for isp176x memory (offset >= 0x0400).
- *
- * bank_reads8() reads memory locations prefetched by an earlier write to
- * HC_MEMORY_REG (see isp176x datasheet). Unless you want to do fancy multi-
- * bank optimizations, you should use the more generic mem_reads8() below.
- *
- * For access to ptd memory, use the specialized ptd_read() and ptd_write()
- * below.
- *
- * These functions copy via MMIO data to/from the device. memcpy_{to|from}io()
- * doesn't quite work because some people have to enforce 32-bit access
- */
-static void bank_reads8(void __iomem *src_base, u32 src_offset, u32 bank_addr,
- __u32 *dst, u32 bytes)
-{
- __u32 __iomem *src;
- u32 val;
- __u8 *src_byteptr;
- __u8 *dst_byteptr;
-
- src = src_base + (bank_addr | src_offset);
-
- if (src_offset < PAYLOAD_OFFSET) {
- while (bytes >= 4) {
- *dst = le32_to_cpu(__raw_readl(src));
- bytes -= 4;
- src++;
- dst++;
- }
- } else {
- while (bytes >= 4) {
- *dst = __raw_readl(src);
- bytes -= 4;
- src++;
- dst++;
- }
- }
-
- if (!bytes)
- return;
-
- /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
- * allocated.
- */
- if (src_offset < PAYLOAD_OFFSET)
- val = le32_to_cpu(__raw_readl(src));
- else
- val = __raw_readl(src);
-
- dst_byteptr = (void *) dst;
- src_byteptr = (void *) &val;
- while (bytes > 0) {
- *dst_byteptr = *src_byteptr;
- dst_byteptr++;
- src_byteptr++;
- bytes--;
- }
-}
-
-static void mem_reads8(void __iomem *src_base, u32 src_offset, void *dst,
- u32 bytes)
-{
- reg_write32(src_base, HC_MEMORY_REG, src_offset + ISP_BANK(0));
- ndelay(90);
- bank_reads8(src_base, src_offset, ISP_BANK(0), dst, bytes);
-}
-
-static void mem_writes8(void __iomem *dst_base, u32 dst_offset,
- __u32 const *src, u32 bytes)
-{
- __u32 __iomem *dst;
-
- dst = dst_base + dst_offset;
-
- if (dst_offset < PAYLOAD_OFFSET) {
- while (bytes >= 4) {
- __raw_writel(cpu_to_le32(*src), dst);
- bytes -= 4;
- src++;
- dst++;
- }
- } else {
- while (bytes >= 4) {
- __raw_writel(*src, dst);
- bytes -= 4;
- src++;
- dst++;
- }
- }
-
- if (!bytes)
- return;
- /* in case we have 3, 2 or 1 bytes left. The buffer is allocated and the
- * extra bytes should not be read by the HW.
- */
-
- if (dst_offset < PAYLOAD_OFFSET)
- __raw_writel(cpu_to_le32(*src), dst);
- else
- __raw_writel(*src, dst);
-}
-
-/*
- * Read and write ptds. 'ptd_offset' should be one of ISO_PTD_OFFSET,
- * INT_PTD_OFFSET, and ATL_PTD_OFFSET. 'slot' should be less than 32.
- */
-static void ptd_read(void __iomem *base, u32 ptd_offset, u32 slot,
- struct ptd *ptd)
-{
- reg_write32(base, HC_MEMORY_REG,
- ISP_BANK(0) + ptd_offset + slot*sizeof(*ptd));
- ndelay(90);
- bank_reads8(base, ptd_offset + slot*sizeof(*ptd), ISP_BANK(0),
- (void *) ptd, sizeof(*ptd));
-}
-
-static void ptd_write(void __iomem *base, u32 ptd_offset, u32 slot,
- struct ptd *ptd)
-{
- mem_writes8(base, ptd_offset + slot*sizeof(*ptd) + sizeof(ptd->dw0),
- &ptd->dw1, 7*sizeof(ptd->dw1));
- /* Make sure dw0 gets written last (after other dw's and after payload)
- since it contains the enable bit */
- wmb();
- mem_writes8(base, ptd_offset + slot*sizeof(*ptd), &ptd->dw0,
- sizeof(ptd->dw0));
-}
-
-
-/* memory management of the 60kb on the chip from 0x1000 to 0xffff */
-static void init_memory(struct isp1760_hcd *priv)
-{
- int i, curr;
- u32 payload_addr;
-
- payload_addr = PAYLOAD_OFFSET;
- for (i = 0; i < BLOCK_1_NUM; i++) {
- priv->memory_pool[i].start = payload_addr;
- priv->memory_pool[i].size = BLOCK_1_SIZE;
- priv->memory_pool[i].free = 1;
- payload_addr += priv->memory_pool[i].size;
- }
-
- curr = i;
- for (i = 0; i < BLOCK_2_NUM; i++) {
- priv->memory_pool[curr + i].start = payload_addr;
- priv->memory_pool[curr + i].size = BLOCK_2_SIZE;
- priv->memory_pool[curr + i].free = 1;
- payload_addr += priv->memory_pool[curr + i].size;
- }
-
- curr = i;
- for (i = 0; i < BLOCK_3_NUM; i++) {
- priv->memory_pool[curr + i].start = payload_addr;
- priv->memory_pool[curr + i].size = BLOCK_3_SIZE;
- priv->memory_pool[curr + i].free = 1;
- payload_addr += priv->memory_pool[curr + i].size;
- }
-
- WARN_ON(payload_addr - priv->memory_pool[0].start > PAYLOAD_AREA_SIZE);
-}
-
-static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- int i;
-
- WARN_ON(qtd->payload_addr);
-
- if (!qtd->length)
- return;
-
- for (i = 0; i < BLOCKS; i++) {
- if (priv->memory_pool[i].size >= qtd->length &&
- priv->memory_pool[i].free) {
- priv->memory_pool[i].free = 0;
- qtd->payload_addr = priv->memory_pool[i].start;
- return;
- }
- }
-}
-
-static void free_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- int i;
-
- if (!qtd->payload_addr)
- return;
-
- for (i = 0; i < BLOCKS; i++) {
- if (priv->memory_pool[i].start == qtd->payload_addr) {
- WARN_ON(priv->memory_pool[i].free);
- priv->memory_pool[i].free = 1;
- qtd->payload_addr = 0;
- return;
- }
- }
-
- dev_err(hcd->self.controller, "%s: Invalid pointer: %08x\n",
- __func__, qtd->payload_addr);
- WARN_ON(1);
- qtd->payload_addr = 0;
-}
-
-static int handshake(struct usb_hcd *hcd, u32 reg,
- u32 mask, u32 done, int usec)
-{
- u32 result;
-
- do {
- result = reg_read32(hcd->regs, reg);
- if (result == ~0)
- return -ENODEV;
- result &= mask;
- if (result == done)
- return 0;
- udelay(1);
- usec--;
- } while (usec > 0);
- return -ETIMEDOUT;
-}
-
-/* reset a non-running (STS_HALT == 1) controller */
-static int ehci_reset(struct usb_hcd *hcd)
-{
- int retval;
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
-
- u32 command = reg_read32(hcd->regs, HC_USBCMD);
-
- command |= CMD_RESET;
- reg_write32(hcd->regs, HC_USBCMD, command);
- hcd->state = HC_STATE_HALT;
- priv->next_statechange = jiffies;
- retval = handshake(hcd, HC_USBCMD,
- CMD_RESET, 0, 250 * 1000);
- return retval;
-}
-
-static struct isp1760_qh *qh_alloc(gfp_t flags)
-{
- struct isp1760_qh *qh;
-
- qh = kmem_cache_zalloc(qh_cachep, flags);
- if (!qh)
- return NULL;
-
- INIT_LIST_HEAD(&qh->qh_list);
- INIT_LIST_HEAD(&qh->qtd_list);
- qh->slot = -1;
-
- return qh;
-}
-
-static void qh_free(struct isp1760_qh *qh)
-{
- WARN_ON(!list_empty(&qh->qtd_list));
- WARN_ON(qh->slot > -1);
- kmem_cache_free(qh_cachep, qh);
-}
-
-/* one-time init, only for memory state */
-static int priv_init(struct usb_hcd *hcd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- u32 hcc_params;
- int i;
-
- spin_lock_init(&priv->lock);
-
- for (i = 0; i < QH_END; i++)
- INIT_LIST_HEAD(&priv->qh_list[i]);
-
- /*
- * hw default: 1K periodic list heads, one per frame.
- * periodic_size can shrink by USBCMD update if hcc_params allows.
- */
- priv->periodic_size = DEFAULT_I_TDPS;
-
- /* controllers may cache some of the periodic schedule ... */
- hcc_params = reg_read32(hcd->regs, HC_HCCPARAMS);
- /* full frame cache */
- if (HCC_ISOC_CACHE(hcc_params))
- priv->i_thresh = 8;
- else /* N microframes cached */
- priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
-
- return 0;
-}
-
-static int isp1760_hc_setup(struct usb_hcd *hcd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- int result;
- u32 scratch, hwmode;
-
- reg_write32(hcd->regs, HC_SCRATCH_REG, 0xdeadbabe);
- /* Change bus pattern */
- scratch = reg_read32(hcd->regs, HC_CHIP_ID_REG);
- scratch = reg_read32(hcd->regs, HC_SCRATCH_REG);
- if (scratch != 0xdeadbabe) {
- dev_err(hcd->self.controller, "Scratch test failed.\n");
- return -ENODEV;
- }
-
- /*
- * The RESET_HC bit in the SW_RESET register is supposed to reset the
- * host controller without touching the CPU interface registers, but at
- * least on the ISP1761 it seems to behave as the RESET_ALL bit and
- * reset the whole device. We thus can't use it here, so let's reset
- * the host controller through the EHCI USB Command register. The device
- * has been reset in core code anyway, so this shouldn't matter.
- */
- reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, 0);
- reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
- reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
- reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
-
- result = ehci_reset(hcd);
- if (result)
- return result;
-
- /* Step 11 passed */
-
- /* ATL reset */
- hwmode = reg_read32(hcd->regs, HC_HW_MODE_CTRL) & ~ALL_ATX_RESET;
- reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode | ALL_ATX_RESET);
- mdelay(10);
- reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
-
- reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK);
-
- priv->hcs_params = reg_read32(hcd->regs, HC_HCSPARAMS);
-
- return priv_init(hcd);
-}
-
-static u32 base_to_chip(u32 base)
-{
- return ((base - 0x400) >> 3);
-}
-
-static int last_qtd_of_urb(struct isp1760_qtd *qtd, struct isp1760_qh *qh)
-{
- struct urb *urb;
-
- if (list_is_last(&qtd->qtd_list, &qh->qtd_list))
- return 1;
-
- urb = qtd->urb;
- qtd = list_entry(qtd->qtd_list.next, typeof(*qtd), qtd_list);
- return (qtd->urb != urb);
-}
-
-/* magic numbers that can affect system performance */
-#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
-#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
-#define EHCI_TUNE_RL_TT 0
-#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
-#define EHCI_TUNE_MULT_TT 1
-#define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
-
-static void create_ptd_atl(struct isp1760_qh *qh,
- struct isp1760_qtd *qtd, struct ptd *ptd)
-{
- u32 maxpacket;
- u32 multi;
- u32 rl = RL_COUNTER;
- u32 nak = NAK_COUNTER;
-
- memset(ptd, 0, sizeof(*ptd));
-
- /* according to 3.6.2, max packet len can not be > 0x400 */
- maxpacket = usb_maxpacket(qtd->urb->dev, qtd->urb->pipe,
- usb_pipeout(qtd->urb->pipe));
- multi = 1 + ((maxpacket >> 11) & 0x3);
- maxpacket &= 0x7ff;
-
- /* DW0 */
- ptd->dw0 = DW0_VALID_BIT;
- ptd->dw0 |= TO_DW0_LENGTH(qtd->length);
- ptd->dw0 |= TO_DW0_MAXPACKET(maxpacket);
- ptd->dw0 |= TO_DW0_ENDPOINT(usb_pipeendpoint(qtd->urb->pipe));
-
- /* DW1 */
- ptd->dw1 = usb_pipeendpoint(qtd->urb->pipe) >> 1;
- ptd->dw1 |= TO_DW1_DEVICE_ADDR(usb_pipedevice(qtd->urb->pipe));
- ptd->dw1 |= TO_DW1_PID_TOKEN(qtd->packet_type);
-
- if (usb_pipebulk(qtd->urb->pipe))
- ptd->dw1 |= DW1_TRANS_BULK;
- else if (usb_pipeint(qtd->urb->pipe))
- ptd->dw1 |= DW1_TRANS_INT;
-
- if (qtd->urb->dev->speed != USB_SPEED_HIGH) {
- /* split transaction */
-
- ptd->dw1 |= DW1_TRANS_SPLIT;
- if (qtd->urb->dev->speed == USB_SPEED_LOW)
- ptd->dw1 |= DW1_SE_USB_LOSPEED;
-
- ptd->dw1 |= TO_DW1_PORT_NUM(qtd->urb->dev->ttport);
- ptd->dw1 |= TO_DW1_HUB_NUM(qtd->urb->dev->tt->hub->devnum);
-
- /* SE bit for Split INT transfers */
- if (usb_pipeint(qtd->urb->pipe) &&
- (qtd->urb->dev->speed == USB_SPEED_LOW))
- ptd->dw1 |= 2 << 16;
-
- rl = 0;
- nak = 0;
- } else {
- ptd->dw0 |= TO_DW0_MULTI(multi);
- if (usb_pipecontrol(qtd->urb->pipe) ||
- usb_pipebulk(qtd->urb->pipe))
- ptd->dw3 |= TO_DW3_PING(qh->ping);
- }
- /* DW2 */
- ptd->dw2 = 0;
- ptd->dw2 |= TO_DW2_DATA_START_ADDR(base_to_chip(qtd->payload_addr));
- ptd->dw2 |= TO_DW2_RL(rl);
-
- /* DW3 */
- ptd->dw3 |= TO_DW3_NAKCOUNT(nak);
- ptd->dw3 |= TO_DW3_DATA_TOGGLE(qh->toggle);
- if (usb_pipecontrol(qtd->urb->pipe)) {
- if (qtd->data_buffer == qtd->urb->setup_packet)
- ptd->dw3 &= ~TO_DW3_DATA_TOGGLE(1);
- else if (last_qtd_of_urb(qtd, qh))
- ptd->dw3 |= TO_DW3_DATA_TOGGLE(1);
- }
-
- ptd->dw3 |= DW3_ACTIVE_BIT;
- /* Cerr */
- ptd->dw3 |= TO_DW3_CERR(ERR_COUNTER);
-}
-
-static void transform_add_int(struct isp1760_qh *qh,
- struct isp1760_qtd *qtd, struct ptd *ptd)
-{
- u32 usof;
- u32 period;
-
- /*
- * Most of this is guessing. ISP1761 datasheet is quite unclear, and
- * the algorithm from the original Philips driver code, which was
- * pretty much used in this driver before as well, is quite horrendous
- * and, i believe, incorrect. The code below follows the datasheet and
- * USB2.0 spec as far as I can tell, and plug/unplug seems to be much
- * more reliable this way (fingers crossed...).
- */
-
- if (qtd->urb->dev->speed == USB_SPEED_HIGH) {
- /* urb->interval is in units of microframes (1/8 ms) */
- period = qtd->urb->interval >> 3;
-
- if (qtd->urb->interval > 4)
- usof = 0x01; /* One bit set =>
- interval 1 ms * uFrame-match */
- else if (qtd->urb->interval > 2)
- usof = 0x22; /* Two bits set => interval 1/2 ms */
- else if (qtd->urb->interval > 1)
- usof = 0x55; /* Four bits set => interval 1/4 ms */
- else
- usof = 0xff; /* All bits set => interval 1/8 ms */
- } else {
- /* urb->interval is in units of frames (1 ms) */
- period = qtd->urb->interval;
- usof = 0x0f; /* Execute Start Split on any of the
- four first uFrames */
-
- /*
- * First 8 bits in dw5 is uSCS and "specifies which uSOF the
- * complete split needs to be sent. Valid only for IN." Also,
- * "All bits can be set to one for every transfer." (p 82,
- * ISP1761 data sheet.) 0x1c is from Philips driver. Where did
- * that number come from? 0xff seems to work fine...
- */
- /* ptd->dw5 = 0x1c; */
- ptd->dw5 = 0xff; /* Execute Complete Split on any uFrame */
- }
-
- period = period >> 1;/* Ensure equal or shorter period than requested */
- period &= 0xf8; /* Mask off too large values and lowest unused 3 bits */
-
- ptd->dw2 |= period;
- ptd->dw4 = usof;
-}
-
-static void create_ptd_int(struct isp1760_qh *qh,
- struct isp1760_qtd *qtd, struct ptd *ptd)
-{
- create_ptd_atl(qh, qtd, ptd);
- transform_add_int(qh, qtd, ptd);
-}
-
-static void isp1760_urb_done(struct usb_hcd *hcd, struct urb *urb)
-__releases(priv->lock)
-__acquires(priv->lock)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
-
- if (!urb->unlinked) {
- if (urb->status == -EINPROGRESS)
- urb->status = 0;
- }
-
- if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {
- void *ptr;
- for (ptr = urb->transfer_buffer;
- ptr < urb->transfer_buffer + urb->transfer_buffer_length;
- ptr += PAGE_SIZE)
- flush_dcache_page(virt_to_page(ptr));
- }
-
- /* complete() can reenter this HCD */
- usb_hcd_unlink_urb_from_ep(hcd, urb);
- spin_unlock(&priv->lock);
- usb_hcd_giveback_urb(hcd, urb, urb->status);
- spin_lock(&priv->lock);
-}
-
-static struct isp1760_qtd *qtd_alloc(gfp_t flags, struct urb *urb,
- u8 packet_type)
-{
- struct isp1760_qtd *qtd;
-
- qtd = kmem_cache_zalloc(qtd_cachep, flags);
- if (!qtd)
- return NULL;
-
- INIT_LIST_HEAD(&qtd->qtd_list);
- qtd->urb = urb;
- qtd->packet_type = packet_type;
- qtd->status = QTD_ENQUEUED;
- qtd->actual_length = 0;
-
- return qtd;
-}
-
-static void qtd_free(struct isp1760_qtd *qtd)
-{
- WARN_ON(qtd->payload_addr);
- kmem_cache_free(qtd_cachep, qtd);
-}
-
-static void start_bus_transfer(struct usb_hcd *hcd, u32 ptd_offset, int slot,
- struct isp1760_slotinfo *slots,
- struct isp1760_qtd *qtd, struct isp1760_qh *qh,
- struct ptd *ptd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- int skip_map;
-
- WARN_ON((slot < 0) || (slot > 31));
- WARN_ON(qtd->length && !qtd->payload_addr);
- WARN_ON(slots[slot].qtd);
- WARN_ON(slots[slot].qh);
- WARN_ON(qtd->status != QTD_PAYLOAD_ALLOC);
-
- /* Make sure done map has not triggered from some unlinked transfer */
- if (ptd_offset == ATL_PTD_OFFSET) {
- priv->atl_done_map |= reg_read32(hcd->regs,
- HC_ATL_PTD_DONEMAP_REG);
- priv->atl_done_map &= ~(1 << slot);
- } else {
- priv->int_done_map |= reg_read32(hcd->regs,
- HC_INT_PTD_DONEMAP_REG);
- priv->int_done_map &= ~(1 << slot);
- }
-
- qh->slot = slot;
- qtd->status = QTD_XFER_STARTED;
- slots[slot].timestamp = jiffies;
- slots[slot].qtd = qtd;
- slots[slot].qh = qh;
- ptd_write(hcd->regs, ptd_offset, slot, ptd);
-
- if (ptd_offset == ATL_PTD_OFFSET) {
- skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
- skip_map &= ~(1 << qh->slot);
- reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
- } else {
- skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
- skip_map &= ~(1 << qh->slot);
- reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
- }
-}
-
-static int is_short_bulk(struct isp1760_qtd *qtd)
-{
- return (usb_pipebulk(qtd->urb->pipe) &&
- (qtd->actual_length < qtd->length));
-}
-
-static void collect_qtds(struct usb_hcd *hcd, struct isp1760_qh *qh,
- struct list_head *urb_list)
-{
- int last_qtd;
- struct isp1760_qtd *qtd, *qtd_next;
- struct urb_listitem *urb_listitem;
-
- list_for_each_entry_safe(qtd, qtd_next, &qh->qtd_list, qtd_list) {
- if (qtd->status < QTD_XFER_COMPLETE)
- break;
-
- last_qtd = last_qtd_of_urb(qtd, qh);
-
- if ((!last_qtd) && (qtd->status == QTD_RETIRE))
- qtd_next->status = QTD_RETIRE;
-
- if (qtd->status == QTD_XFER_COMPLETE) {
- if (qtd->actual_length) {
- switch (qtd->packet_type) {
- case IN_PID:
- mem_reads8(hcd->regs, qtd->payload_addr,
- qtd->data_buffer,
- qtd->actual_length);
- /* Fall through (?) */
- case OUT_PID:
- qtd->urb->actual_length +=
- qtd->actual_length;
- /* Fall through ... */
- case SETUP_PID:
- break;
- }
- }
-
- if (is_short_bulk(qtd)) {
- if (qtd->urb->transfer_flags & URB_SHORT_NOT_OK)
- qtd->urb->status = -EREMOTEIO;
- if (!last_qtd)
- qtd_next->status = QTD_RETIRE;
- }
- }
-
- if (qtd->payload_addr)
- free_mem(hcd, qtd);
-
- if (last_qtd) {
- if ((qtd->status == QTD_RETIRE) &&
- (qtd->urb->status == -EINPROGRESS))
- qtd->urb->status = -EPIPE;
- /* Defer calling of urb_done() since it releases lock */
- urb_listitem = kmem_cache_zalloc(urb_listitem_cachep,
- GFP_ATOMIC);
- if (unlikely(!urb_listitem))
- break; /* Try again on next call */
- urb_listitem->urb = qtd->urb;
- list_add_tail(&urb_listitem->urb_list, urb_list);
- }
-
- list_del(&qtd->qtd_list);
- qtd_free(qtd);
- }
-}
-
-#define ENQUEUE_DEPTH 2
-static void enqueue_qtds(struct usb_hcd *hcd, struct isp1760_qh *qh)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- int ptd_offset;
- struct isp1760_slotinfo *slots;
- int curr_slot, free_slot;
- int n;
- struct ptd ptd;
- struct isp1760_qtd *qtd;
-
- if (unlikely(list_empty(&qh->qtd_list))) {
- WARN_ON(1);
- return;
- }
-
- /* Make sure this endpoint's TT buffer is clean before queueing ptds */
- if (qh->tt_buffer_dirty)
- return;
-
- if (usb_pipeint(list_entry(qh->qtd_list.next, struct isp1760_qtd,
- qtd_list)->urb->pipe)) {
- ptd_offset = INT_PTD_OFFSET;
- slots = priv->int_slots;
- } else {
- ptd_offset = ATL_PTD_OFFSET;
- slots = priv->atl_slots;
- }
-
- free_slot = -1;
- for (curr_slot = 0; curr_slot < 32; curr_slot++) {
- if ((free_slot == -1) && (slots[curr_slot].qtd == NULL))
- free_slot = curr_slot;
- if (slots[curr_slot].qh == qh)
- break;
- }
-
- n = 0;
- list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
- if (qtd->status == QTD_ENQUEUED) {
- WARN_ON(qtd->payload_addr);
- alloc_mem(hcd, qtd);
- if ((qtd->length) && (!qtd->payload_addr))
- break;
-
- if ((qtd->length) &&
- ((qtd->packet_type == SETUP_PID) ||
- (qtd->packet_type == OUT_PID))) {
- mem_writes8(hcd->regs, qtd->payload_addr,
- qtd->data_buffer, qtd->length);
- }
-
- qtd->status = QTD_PAYLOAD_ALLOC;
- }
-
- if (qtd->status == QTD_PAYLOAD_ALLOC) {
-/*
- if ((curr_slot > 31) && (free_slot == -1))
- dev_dbg(hcd->self.controller, "%s: No slot "
- "available for transfer\n", __func__);
-*/
- /* Start xfer for this endpoint if not already done */
- if ((curr_slot > 31) && (free_slot > -1)) {
- if (usb_pipeint(qtd->urb->pipe))
- create_ptd_int(qh, qtd, &ptd);
- else
- create_ptd_atl(qh, qtd, &ptd);
-
- start_bus_transfer(hcd, ptd_offset, free_slot,
- slots, qtd, qh, &ptd);
- curr_slot = free_slot;
- }
-
- n++;
- if (n >= ENQUEUE_DEPTH)
- break;
- }
- }
-}
-
-static void schedule_ptds(struct usb_hcd *hcd)
-{
- struct isp1760_hcd *priv;
- struct isp1760_qh *qh, *qh_next;
- struct list_head *ep_queue;
- LIST_HEAD(urb_list);
- struct urb_listitem *urb_listitem, *urb_listitem_next;
- int i;
-
- if (!hcd) {
- WARN_ON(1);
- return;
- }
-
- priv = hcd_to_priv(hcd);
-
- /*
- * check finished/retired xfers, transfer payloads, call urb_done()
- */
- for (i = 0; i < QH_END; i++) {
- ep_queue = &priv->qh_list[i];
- list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list) {
- collect_qtds(hcd, qh, &urb_list);
- if (list_empty(&qh->qtd_list))
- list_del(&qh->qh_list);
- }
- }
-
- list_for_each_entry_safe(urb_listitem, urb_listitem_next, &urb_list,
- urb_list) {
- isp1760_urb_done(hcd, urb_listitem->urb);
- kmem_cache_free(urb_listitem_cachep, urb_listitem);
- }
-
- /*
- * Schedule packets for transfer.
- *
- * According to USB2.0 specification:
- *
- * 1st prio: interrupt xfers, up to 80 % of bandwidth
- * 2nd prio: control xfers
- * 3rd prio: bulk xfers
- *
- * ... but let's use a simpler scheme here (mostly because ISP1761 doc
- * is very unclear on how to prioritize traffic):
- *
- * 1) Enqueue any queued control transfers, as long as payload chip mem
- * and PTD ATL slots are available.
- * 2) Enqueue any queued INT transfers, as long as payload chip mem
- * and PTD INT slots are available.
- * 3) Enqueue any queued bulk transfers, as long as payload chip mem
- * and PTD ATL slots are available.
- *
- * Use double buffering (ENQUEUE_DEPTH==2) as a compromise between
- * conservation of chip mem and performance.
- *
- * I'm sure this scheme could be improved upon!
- */
- for (i = 0; i < QH_END; i++) {
- ep_queue = &priv->qh_list[i];
- list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list)
- enqueue_qtds(hcd, qh);
- }
-}
-
-#define PTD_STATE_QTD_DONE 1
-#define PTD_STATE_QTD_RELOAD 2
-#define PTD_STATE_URB_RETIRE 3
-
-static int check_int_transfer(struct usb_hcd *hcd, struct ptd *ptd,
- struct urb *urb)
-{
- __dw dw4;
- int i;
-
- dw4 = ptd->dw4;
- dw4 >>= 8;
-
- /* FIXME: ISP1761 datasheet does not say what to do with these. Do we
- need to handle these errors? Is it done in hardware? */
-
- if (ptd->dw3 & DW3_HALT_BIT) {
-
- urb->status = -EPROTO; /* Default unknown error */
-
- for (i = 0; i < 8; i++) {
- switch (dw4 & 0x7) {
- case INT_UNDERRUN:
- dev_dbg(hcd->self.controller, "%s: underrun "
- "during uFrame %d\n",
- __func__, i);
- urb->status = -ECOMM; /* Could not write data */
- break;
- case INT_EXACT:
- dev_dbg(hcd->self.controller, "%s: transaction "
- "error during uFrame %d\n",
- __func__, i);
- urb->status = -EPROTO; /* timeout, bad CRC, PID
- error etc. */
- break;
- case INT_BABBLE:
- dev_dbg(hcd->self.controller, "%s: babble "
- "error during uFrame %d\n",
- __func__, i);
- urb->status = -EOVERFLOW;
- break;
- }
- dw4 >>= 3;
- }
-
- return PTD_STATE_URB_RETIRE;
- }
-
- return PTD_STATE_QTD_DONE;
-}
-
-static int check_atl_transfer(struct usb_hcd *hcd, struct ptd *ptd,
- struct urb *urb)
-{
- WARN_ON(!ptd);
- if (ptd->dw3 & DW3_HALT_BIT) {
- if (ptd->dw3 & DW3_BABBLE_BIT)
- urb->status = -EOVERFLOW;
- else if (FROM_DW3_CERR(ptd->dw3))
- urb->status = -EPIPE; /* Stall */
- else if (ptd->dw3 & DW3_ERROR_BIT)
- urb->status = -EPROTO; /* XactErr */
- else
- urb->status = -EPROTO; /* Unknown */
-/*
- dev_dbg(hcd->self.controller, "%s: ptd error:\n"
- " dw0: %08x dw1: %08x dw2: %08x dw3: %08x\n"
- " dw4: %08x dw5: %08x dw6: %08x dw7: %08x\n",
- __func__,
- ptd->dw0, ptd->dw1, ptd->dw2, ptd->dw3,
- ptd->dw4, ptd->dw5, ptd->dw6, ptd->dw7);
-*/
- return PTD_STATE_URB_RETIRE;
- }
-
- if ((ptd->dw3 & DW3_ERROR_BIT) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
- /* Transfer Error, *but* active and no HALT -> reload */
- dev_dbg(hcd->self.controller, "PID error; reloading ptd\n");
- return PTD_STATE_QTD_RELOAD;
- }
-
- if (!FROM_DW3_NAKCOUNT(ptd->dw3) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
- /*
- * NAKs are handled in HW by the chip. Usually if the
- * device is not able to send data fast enough.
- * This happens mostly on slower hardware.
- */
- return PTD_STATE_QTD_RELOAD;
- }
-
- return PTD_STATE_QTD_DONE;
-}
-
-static void handle_done_ptds(struct usb_hcd *hcd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- struct ptd ptd;
- struct isp1760_qh *qh;
- int slot;
- int state;
- struct isp1760_slotinfo *slots;
- u32 ptd_offset;
- struct isp1760_qtd *qtd;
- int modified;
- int skip_map;
-
- skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
- priv->int_done_map &= ~skip_map;
- skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
- priv->atl_done_map &= ~skip_map;
-
- modified = priv->int_done_map || priv->atl_done_map;
-
- while (priv->int_done_map || priv->atl_done_map) {
- if (priv->int_done_map) {
- /* INT ptd */
- slot = __ffs(priv->int_done_map);
- priv->int_done_map &= ~(1 << slot);
- slots = priv->int_slots;
- /* This should not trigger, and could be removed if
- noone have any problems with it triggering: */
- if (!slots[slot].qh) {
- WARN_ON(1);
- continue;
- }
- ptd_offset = INT_PTD_OFFSET;
- ptd_read(hcd->regs, INT_PTD_OFFSET, slot, &ptd);
- state = check_int_transfer(hcd, &ptd,
- slots[slot].qtd->urb);
- } else {
- /* ATL ptd */
- slot = __ffs(priv->atl_done_map);
- priv->atl_done_map &= ~(1 << slot);
- slots = priv->atl_slots;
- /* This should not trigger, and could be removed if
- noone have any problems with it triggering: */
- if (!slots[slot].qh) {
- WARN_ON(1);
- continue;
- }
- ptd_offset = ATL_PTD_OFFSET;
- ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
- state = check_atl_transfer(hcd, &ptd,
- slots[slot].qtd->urb);
- }
-
- qtd = slots[slot].qtd;
- slots[slot].qtd = NULL;
- qh = slots[slot].qh;
- slots[slot].qh = NULL;
- qh->slot = -1;
-
- WARN_ON(qtd->status != QTD_XFER_STARTED);
-
- switch (state) {
- case PTD_STATE_QTD_DONE:
- if ((usb_pipeint(qtd->urb->pipe)) &&
- (qtd->urb->dev->speed != USB_SPEED_HIGH))
- qtd->actual_length =
- FROM_DW3_SCS_NRBYTESTRANSFERRED(ptd.dw3);
- else
- qtd->actual_length =
- FROM_DW3_NRBYTESTRANSFERRED(ptd.dw3);
-
- qtd->status = QTD_XFER_COMPLETE;
- if (list_is_last(&qtd->qtd_list, &qh->qtd_list) ||
- is_short_bulk(qtd))
- qtd = NULL;
- else
- qtd = list_entry(qtd->qtd_list.next,
- typeof(*qtd), qtd_list);
-
- qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
- qh->ping = FROM_DW3_PING(ptd.dw3);
- break;
-
- case PTD_STATE_QTD_RELOAD: /* QTD_RETRY, for atls only */
- qtd->status = QTD_PAYLOAD_ALLOC;
- ptd.dw0 |= DW0_VALID_BIT;
- /* RL counter = ERR counter */
- ptd.dw3 &= ~TO_DW3_NAKCOUNT(0xf);
- ptd.dw3 |= TO_DW3_NAKCOUNT(FROM_DW2_RL(ptd.dw2));
- ptd.dw3 &= ~TO_DW3_CERR(3);
- ptd.dw3 |= TO_DW3_CERR(ERR_COUNTER);
- qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
- qh->ping = FROM_DW3_PING(ptd.dw3);
- break;
-
- case PTD_STATE_URB_RETIRE:
- qtd->status = QTD_RETIRE;
- if ((qtd->urb->dev->speed != USB_SPEED_HIGH) &&
- (qtd->urb->status != -EPIPE) &&
- (qtd->urb->status != -EREMOTEIO)) {
- qh->tt_buffer_dirty = 1;
- if (usb_hub_clear_tt_buffer(qtd->urb))
- /* Clear failed; let's hope things work
- anyway */
- qh->tt_buffer_dirty = 0;
- }
- qtd = NULL;
- qh->toggle = 0;
- qh->ping = 0;
- break;
-
- default:
- WARN_ON(1);
- continue;
- }
-
- if (qtd && (qtd->status == QTD_PAYLOAD_ALLOC)) {
- if (slots == priv->int_slots) {
- if (state == PTD_STATE_QTD_RELOAD)
- dev_err(hcd->self.controller,
- "%s: PTD_STATE_QTD_RELOAD on "
- "interrupt packet\n", __func__);
- if (state != PTD_STATE_QTD_RELOAD)
- create_ptd_int(qh, qtd, &ptd);
- } else {
- if (state != PTD_STATE_QTD_RELOAD)
- create_ptd_atl(qh, qtd, &ptd);
- }
-
- start_bus_transfer(hcd, ptd_offset, slot, slots, qtd,
- qh, &ptd);
- }
- }
-
- if (modified)
- schedule_ptds(hcd);
-}
-
-static irqreturn_t isp1760_irq(struct usb_hcd *hcd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- u32 imask;
- irqreturn_t irqret = IRQ_NONE;
-
- spin_lock(&priv->lock);
-
- if (!(hcd->state & HC_STATE_RUNNING))
- goto leave;
-
- imask = reg_read32(hcd->regs, HC_INTERRUPT_REG);
- if (unlikely(!imask))
- goto leave;
- reg_write32(hcd->regs, HC_INTERRUPT_REG, imask); /* Clear */
-
- priv->int_done_map |= reg_read32(hcd->regs, HC_INT_PTD_DONEMAP_REG);
- priv->atl_done_map |= reg_read32(hcd->regs, HC_ATL_PTD_DONEMAP_REG);
-
- handle_done_ptds(hcd);
-
- irqret = IRQ_HANDLED;
-leave:
- spin_unlock(&priv->lock);
-
- return irqret;
-}
-
-/*
- * Workaround for problem described in chip errata 2:
- *
- * Sometimes interrupts are not generated when ATL (not INT?) completion occurs.
- * One solution suggested in the errata is to use SOF interrupts _instead_of_
- * ATL done interrupts (the "instead of" might be important since it seems
- * enabling ATL interrupts also causes the chip to sometimes - rarely - "forget"
- * to set the PTD's done bit in addition to not generating an interrupt!).
- *
- * So if we use SOF + ATL interrupts, we sometimes get stale PTDs since their
- * done bit is not being set. This is bad - it blocks the endpoint until reboot.
- *
- * If we use SOF interrupts only, we get latency between ptd completion and the
- * actual handling. This is very noticeable in testusb runs which takes several
- * minutes longer without ATL interrupts.
- *
- * A better solution is to run the code below every SLOT_CHECK_PERIOD ms. If it
- * finds active ATL slots which are older than SLOT_TIMEOUT ms, it checks the
- * slot's ACTIVE and VALID bits. If these are not set, the ptd is considered
- * completed and its done map bit is set.
- *
- * The values of SLOT_TIMEOUT and SLOT_CHECK_PERIOD have been arbitrarily chosen
- * not to cause too much lag when this HW bug occurs, while still hopefully
- * ensuring that the check does not falsely trigger.
- */
-#define SLOT_TIMEOUT 300
-#define SLOT_CHECK_PERIOD 200
-static struct timer_list errata2_timer;
-
-static void errata2_function(unsigned long data)
-{
- struct usb_hcd *hcd = (struct usb_hcd *) data;
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- int slot;
- struct ptd ptd;
- unsigned long spinflags;
-
- spin_lock_irqsave(&priv->lock, spinflags);
-
- for (slot = 0; slot < 32; slot++)
- if (priv->atl_slots[slot].qh && time_after(jiffies,
- priv->atl_slots[slot].timestamp +
- SLOT_TIMEOUT * HZ / 1000)) {
- ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
- if (!FROM_DW0_VALID(ptd.dw0) &&
- !FROM_DW3_ACTIVE(ptd.dw3))
- priv->atl_done_map |= 1 << slot;
- }
-
- if (priv->atl_done_map)
- handle_done_ptds(hcd);
-
- spin_unlock_irqrestore(&priv->lock, spinflags);
-
- errata2_timer.expires = jiffies + SLOT_CHECK_PERIOD * HZ / 1000;
- add_timer(&errata2_timer);
-}
-
-static int isp1760_run(struct usb_hcd *hcd)
-{
- int retval;
- u32 temp;
- u32 command;
- u32 chipid;
-
- hcd->uses_new_polling = 1;
-
- hcd->state = HC_STATE_RUNNING;
-
- /* Set PTD interrupt AND & OR maps */
- reg_write32(hcd->regs, HC_ATL_IRQ_MASK_AND_REG, 0);
- reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, 0xffffffff);
- reg_write32(hcd->regs, HC_INT_IRQ_MASK_AND_REG, 0);
- reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, 0xffffffff);
- reg_write32(hcd->regs, HC_ISO_IRQ_MASK_AND_REG, 0);
- reg_write32(hcd->regs, HC_ISO_IRQ_MASK_OR_REG, 0xffffffff);
- /* step 23 passed */
-
- temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
- reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp | HW_GLOBAL_INTR_EN);
-
- command = reg_read32(hcd->regs, HC_USBCMD);
- command &= ~(CMD_LRESET|CMD_RESET);
- command |= CMD_RUN;
- reg_write32(hcd->regs, HC_USBCMD, command);
-
- retval = handshake(hcd, HC_USBCMD, CMD_RUN, CMD_RUN, 250 * 1000);
- if (retval)
- return retval;
-
- /*
- * XXX
- * Spec says to write FLAG_CF as last config action, priv code grabs
- * the semaphore while doing so.
- */
- down_write(&ehci_cf_port_reset_rwsem);
- reg_write32(hcd->regs, HC_CONFIGFLAG, FLAG_CF);
-
- retval = handshake(hcd, HC_CONFIGFLAG, FLAG_CF, FLAG_CF, 250 * 1000);
- up_write(&ehci_cf_port_reset_rwsem);
- if (retval)
- return retval;
-
- init_timer(&errata2_timer);
- errata2_timer.function = errata2_function;
- errata2_timer.data = (unsigned long) hcd;
- errata2_timer.expires = jiffies + SLOT_CHECK_PERIOD * HZ / 1000;
- add_timer(&errata2_timer);
-
- chipid = reg_read32(hcd->regs, HC_CHIP_ID_REG);
- dev_info(hcd->self.controller, "USB ISP %04x HW rev. %d started\n",
- chipid & 0xffff, chipid >> 16);
-
- /* PTD Register Init Part 2, Step 28 */
-
- /* Setup registers controlling PTD checking */
- reg_write32(hcd->regs, HC_ATL_PTD_LASTPTD_REG, 0x80000000);
- reg_write32(hcd->regs, HC_INT_PTD_LASTPTD_REG, 0x80000000);
- reg_write32(hcd->regs, HC_ISO_PTD_LASTPTD_REG, 0x00000001);
- reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, 0xffffffff);
- reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, 0xffffffff);
- reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, 0xffffffff);
- reg_write32(hcd->regs, HC_BUFFER_STATUS_REG,
- ATL_BUF_FILL | INT_BUF_FILL);
-
- /* GRR this is run-once init(), being done every time the HC starts.
- * So long as they're part of class devices, we can't do it init()
- * since the class device isn't created that early.
- */
- return 0;
-}
-
-static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len)
-{
- qtd->data_buffer = databuffer;
-
- if (len > MAX_PAYLOAD_SIZE)
- len = MAX_PAYLOAD_SIZE;
- qtd->length = len;
-
- return qtd->length;
-}
-
-static void qtd_list_free(struct list_head *qtd_list)
-{
- struct isp1760_qtd *qtd, *qtd_next;
-
- list_for_each_entry_safe(qtd, qtd_next, qtd_list, qtd_list) {
- list_del(&qtd->qtd_list);
- qtd_free(qtd);
- }
-}
-
-/*
- * Packetize urb->transfer_buffer into list of packets of size wMaxPacketSize.
- * Also calculate the PID type (SETUP/IN/OUT) for each packet.
- */
-#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
-static void packetize_urb(struct usb_hcd *hcd,
- struct urb *urb, struct list_head *head, gfp_t flags)
-{
- struct isp1760_qtd *qtd;
- void *buf;
- int len, maxpacketsize;
- u8 packet_type;
-
- /*
- * URBs map to sequences of QTDs: one logical transaction
- */
-
- if (!urb->transfer_buffer && urb->transfer_buffer_length) {
- /* XXX This looks like usb storage / SCSI bug */
- dev_err(hcd->self.controller,
- "buf is null, dma is %08lx len is %d\n",
- (long unsigned)urb->transfer_dma,
- urb->transfer_buffer_length);
- WARN_ON(1);
- }
-
- if (usb_pipein(urb->pipe))
- packet_type = IN_PID;
- else
- packet_type = OUT_PID;
-
- if (usb_pipecontrol(urb->pipe)) {
- qtd = qtd_alloc(flags, urb, SETUP_PID);
- if (!qtd)
- goto cleanup;
- qtd_fill(qtd, urb->setup_packet, sizeof(struct usb_ctrlrequest));
- list_add_tail(&qtd->qtd_list, head);
-
- /* for zero length DATA stages, STATUS is always IN */
- if (urb->transfer_buffer_length == 0)
- packet_type = IN_PID;
- }
-
- maxpacketsize = max_packet(usb_maxpacket(urb->dev, urb->pipe,
- usb_pipeout(urb->pipe)));
-
- /*
- * buffer gets wrapped in one or more qtds;
- * last one may be "short" (including zero len)
- * and may serve as a control status ack
- */
- buf = urb->transfer_buffer;
- len = urb->transfer_buffer_length;
-
- for (;;) {
- int this_qtd_len;
-
- qtd = qtd_alloc(flags, urb, packet_type);
- if (!qtd)
- goto cleanup;
- this_qtd_len = qtd_fill(qtd, buf, len);
- list_add_tail(&qtd->qtd_list, head);
-
- len -= this_qtd_len;
- buf += this_qtd_len;
-
- if (len <= 0)
- break;
- }
-
- /*
- * control requests may need a terminating data "status" ack;
- * bulk ones may need a terminating short packet (zero length).
- */
- if (urb->transfer_buffer_length != 0) {
- int one_more = 0;
-
- if (usb_pipecontrol(urb->pipe)) {
- one_more = 1;
- if (packet_type == IN_PID)
- packet_type = OUT_PID;
- else
- packet_type = IN_PID;
- } else if (usb_pipebulk(urb->pipe)
- && (urb->transfer_flags & URB_ZERO_PACKET)
- && !(urb->transfer_buffer_length %
- maxpacketsize)) {
- one_more = 1;
- }
- if (one_more) {
- qtd = qtd_alloc(flags, urb, packet_type);
- if (!qtd)
- goto cleanup;
-
- /* never any data in such packets */
- qtd_fill(qtd, NULL, 0);
- list_add_tail(&qtd->qtd_list, head);
- }
- }
-
- return;
-
-cleanup:
- qtd_list_free(head);
-}
-
-static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
- gfp_t mem_flags)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- struct list_head *ep_queue;
- struct isp1760_qh *qh, *qhit;
- unsigned long spinflags;
- LIST_HEAD(new_qtds);
- int retval;
- int qh_in_queue;
-
- switch (usb_pipetype(urb->pipe)) {
- case PIPE_CONTROL:
- ep_queue = &priv->qh_list[QH_CONTROL];
- break;
- case PIPE_BULK:
- ep_queue = &priv->qh_list[QH_BULK];
- break;
- case PIPE_INTERRUPT:
- if (urb->interval < 0)
- return -EINVAL;
- /* FIXME: Check bandwidth */
- ep_queue = &priv->qh_list[QH_INTERRUPT];
- break;
- case PIPE_ISOCHRONOUS:
- dev_err(hcd->self.controller, "%s: isochronous USB packets "
- "not yet supported\n",
- __func__);
- return -EPIPE;
- default:
- dev_err(hcd->self.controller, "%s: unknown pipe type\n",
- __func__);
- return -EPIPE;
- }
-
- if (usb_pipein(urb->pipe))
- urb->actual_length = 0;
-
- packetize_urb(hcd, urb, &new_qtds, mem_flags);
- if (list_empty(&new_qtds))
- return -ENOMEM;
-
- retval = 0;
- spin_lock_irqsave(&priv->lock, spinflags);
-
- if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
- retval = -ESHUTDOWN;
- qtd_list_free(&new_qtds);
- goto out;
- }
- retval = usb_hcd_link_urb_to_ep(hcd, urb);
- if (retval) {
- qtd_list_free(&new_qtds);
- goto out;
- }
-
- qh = urb->ep->hcpriv;
- if (qh) {
- qh_in_queue = 0;
- list_for_each_entry(qhit, ep_queue, qh_list) {
- if (qhit == qh) {
- qh_in_queue = 1;
- break;
- }
- }
- if (!qh_in_queue)
- list_add_tail(&qh->qh_list, ep_queue);
- } else {
- qh = qh_alloc(GFP_ATOMIC);
- if (!qh) {
- retval = -ENOMEM;
- usb_hcd_unlink_urb_from_ep(hcd, urb);
- qtd_list_free(&new_qtds);
- goto out;
- }
- list_add_tail(&qh->qh_list, ep_queue);
- urb->ep->hcpriv = qh;
- }
-
- list_splice_tail(&new_qtds, &qh->qtd_list);
- schedule_ptds(hcd);
-
-out:
- spin_unlock_irqrestore(&priv->lock, spinflags);
- return retval;
-}
-
-static void kill_transfer(struct usb_hcd *hcd, struct urb *urb,
- struct isp1760_qh *qh)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- int skip_map;
-
- WARN_ON(qh->slot == -1);
-
- /* We need to forcefully reclaim the slot since some transfers never
- return, e.g. interrupt transfers and NAKed bulk transfers. */
- if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe)) {
- skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
- skip_map |= (1 << qh->slot);
- reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
- priv->atl_slots[qh->slot].qh = NULL;
- priv->atl_slots[qh->slot].qtd = NULL;
- } else {
- skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
- skip_map |= (1 << qh->slot);
- reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
- priv->int_slots[qh->slot].qh = NULL;
- priv->int_slots[qh->slot].qtd = NULL;
- }
-
- qh->slot = -1;
-}
-
-/*
- * Retire the qtds beginning at 'qtd' and belonging all to the same urb, killing
- * any active transfer belonging to the urb in the process.
- */
-static void dequeue_urb_from_qtd(struct usb_hcd *hcd, struct isp1760_qh *qh,
- struct isp1760_qtd *qtd)
-{
- struct urb *urb;
- int urb_was_running;
-
- urb = qtd->urb;
- urb_was_running = 0;
- list_for_each_entry_from(qtd, &qh->qtd_list, qtd_list) {
- if (qtd->urb != urb)
- break;
-
- if (qtd->status >= QTD_XFER_STARTED)
- urb_was_running = 1;
- if (last_qtd_of_urb(qtd, qh) &&
- (qtd->status >= QTD_XFER_COMPLETE))
- urb_was_running = 0;
-
- if (qtd->status == QTD_XFER_STARTED)
- kill_transfer(hcd, urb, qh);
- qtd->status = QTD_RETIRE;
- }
-
- if ((urb->dev->speed != USB_SPEED_HIGH) && urb_was_running) {
- qh->tt_buffer_dirty = 1;
- if (usb_hub_clear_tt_buffer(urb))
- /* Clear failed; let's hope things work anyway */
- qh->tt_buffer_dirty = 0;
- }
-}
-
-static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
- int status)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- unsigned long spinflags;
- struct isp1760_qh *qh;
- struct isp1760_qtd *qtd;
- int retval = 0;
-
- spin_lock_irqsave(&priv->lock, spinflags);
- retval = usb_hcd_check_unlink_urb(hcd, urb, status);
- if (retval)
- goto out;
-
- qh = urb->ep->hcpriv;
- if (!qh) {
- retval = -EINVAL;
- goto out;
- }
-
- list_for_each_entry(qtd, &qh->qtd_list, qtd_list)
- if (qtd->urb == urb) {
- dequeue_urb_from_qtd(hcd, qh, qtd);
- list_move(&qtd->qtd_list, &qh->qtd_list);
- break;
- }
-
- urb->status = status;
- schedule_ptds(hcd);
-
-out:
- spin_unlock_irqrestore(&priv->lock, spinflags);
- return retval;
-}
-
-static void isp1760_endpoint_disable(struct usb_hcd *hcd,
- struct usb_host_endpoint *ep)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- unsigned long spinflags;
- struct isp1760_qh *qh, *qh_iter;
- int i;
-
- spin_lock_irqsave(&priv->lock, spinflags);
-
- qh = ep->hcpriv;
- if (!qh)
- goto out;
-
- WARN_ON(!list_empty(&qh->qtd_list));
-
- for (i = 0; i < QH_END; i++)
- list_for_each_entry(qh_iter, &priv->qh_list[i], qh_list)
- if (qh_iter == qh) {
- list_del(&qh_iter->qh_list);
- i = QH_END;
- break;
- }
- qh_free(qh);
- ep->hcpriv = NULL;
-
- schedule_ptds(hcd);
-
-out:
- spin_unlock_irqrestore(&priv->lock, spinflags);
-}
-
-static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- u32 temp, status = 0;
- u32 mask;
- int retval = 1;
- unsigned long flags;
-
- /* if !PM, root hub timers won't get shut down ... */
- if (!HC_IS_RUNNING(hcd->state))
- return 0;
-
- /* init status to no-changes */
- buf[0] = 0;
- mask = PORT_CSC;
-
- spin_lock_irqsave(&priv->lock, flags);
- temp = reg_read32(hcd->regs, HC_PORTSC1);
-
- if (temp & PORT_OWNER) {
- if (temp & PORT_CSC) {
- temp &= ~PORT_CSC;
- reg_write32(hcd->regs, HC_PORTSC1, temp);
- goto done;
- }
- }
-
- /*
- * Return status information even for ports with OWNER set.
- * Otherwise hub_wq wouldn't see the disconnect event when a
- * high-speed device is switched over to the companion
- * controller by the user.
- */
-
- if ((temp & mask) != 0
- || ((temp & PORT_RESUME) != 0
- && time_after_eq(jiffies,
- priv->reset_done))) {
- buf [0] |= 1 << (0 + 1);
- status = STS_PCD;
- }
- /* FIXME autosuspend idle root hubs */
-done:
- spin_unlock_irqrestore(&priv->lock, flags);
- return status ? retval : 0;
-}
-
-static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
- struct usb_hub_descriptor *desc)
-{
- int ports = HCS_N_PORTS(priv->hcs_params);
- u16 temp;
-
- desc->bDescriptorType = 0x29;
- /* priv 1.0, 2.3.9 says 20ms max */
- desc->bPwrOn2PwrGood = 10;
- desc->bHubContrCurrent = 0;
-
- desc->bNbrPorts = ports;
- temp = 1 + (ports / 8);
- desc->bDescLength = 7 + 2 * temp;
-
- /* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
- memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
- memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
-
- /* per-port overcurrent reporting */
- temp = 0x0008;
- if (HCS_PPC(priv->hcs_params))
- /* per-port power control */
- temp |= 0x0001;
- else
- /* no power switching */
- temp |= 0x0002;
- desc->wHubCharacteristics = cpu_to_le16(temp);
-}
-
-#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
-
-static int check_reset_complete(struct usb_hcd *hcd, int index,
- int port_status)
-{
- if (!(port_status & PORT_CONNECT))
- return port_status;
-
- /* if reset finished and it's still not enabled -- handoff */
- if (!(port_status & PORT_PE)) {
-
- dev_info(hcd->self.controller,
- "port %d full speed --> companion\n",
- index + 1);
-
- port_status |= PORT_OWNER;
- port_status &= ~PORT_RWC_BITS;
- reg_write32(hcd->regs, HC_PORTSC1, port_status);
-
- } else
- dev_info(hcd->self.controller, "port %d high speed\n",
- index + 1);
-
- return port_status;
-}
-
-static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
- u16 wValue, u16 wIndex, char *buf, u16 wLength)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- int ports = HCS_N_PORTS(priv->hcs_params);
- u32 temp, status;
- unsigned long flags;
- int retval = 0;
- unsigned selector;
-
- /*
- * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
- * HCS_INDICATOR may say we can change LEDs to off/amber/green.
- * (track current state ourselves) ... blink for diagnostics,
- * power, "this is the one", etc. EHCI spec supports this.
- */
-
- spin_lock_irqsave(&priv->lock, flags);
- switch (typeReq) {
- case ClearHubFeature:
- switch (wValue) {
- case C_HUB_LOCAL_POWER:
- case C_HUB_OVER_CURRENT:
- /* no hub-wide feature/status flags */
- break;
- default:
- goto error;
- }
- break;
- case ClearPortFeature:
- if (!wIndex || wIndex > ports)
- goto error;
- wIndex--;
- temp = reg_read32(hcd->regs, HC_PORTSC1);
-
- /*
- * Even if OWNER is set, so the port is owned by the
- * companion controller, hub_wq needs to be able to clear
- * the port-change status bits (especially
- * USB_PORT_STAT_C_CONNECTION).
- */
-
- switch (wValue) {
- case USB_PORT_FEAT_ENABLE:
- reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_PE);
- break;
- case USB_PORT_FEAT_C_ENABLE:
- /* XXX error? */
- break;
- case USB_PORT_FEAT_SUSPEND:
- if (temp & PORT_RESET)
- goto error;
-
- if (temp & PORT_SUSPEND) {
- if ((temp & PORT_PE) == 0)
- goto error;
- /* resume signaling for 20 msec */
- temp &= ~(PORT_RWC_BITS);
- reg_write32(hcd->regs, HC_PORTSC1,
- temp | PORT_RESUME);
- priv->reset_done = jiffies +
- msecs_to_jiffies(20);
- }
- break;
- case USB_PORT_FEAT_C_SUSPEND:
- /* we auto-clear this feature */
- break;
- case USB_PORT_FEAT_POWER:
- if (HCS_PPC(priv->hcs_params))
- reg_write32(hcd->regs, HC_PORTSC1,
- temp & ~PORT_POWER);
- break;
- case USB_PORT_FEAT_C_CONNECTION:
- reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_CSC);
- break;
- case USB_PORT_FEAT_C_OVER_CURRENT:
- /* XXX error ?*/
- break;
- case USB_PORT_FEAT_C_RESET:
- /* GetPortStatus clears reset */
- break;
- default:
- goto error;
- }
- reg_read32(hcd->regs, HC_USBCMD);
- break;
- case GetHubDescriptor:
- isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
- buf);
- break;
- case GetHubStatus:
- /* no hub-wide feature/status flags */
- memset(buf, 0, 4);
- break;
- case GetPortStatus:
- if (!wIndex || wIndex > ports)
- goto error;
- wIndex--;
- status = 0;
- temp = reg_read32(hcd->regs, HC_PORTSC1);
-
- /* wPortChange bits */
- if (temp & PORT_CSC)
- status |= USB_PORT_STAT_C_CONNECTION << 16;
-
-
- /* whoever resumes must GetPortStatus to complete it!! */
- if (temp & PORT_RESUME) {
- dev_err(hcd->self.controller, "Port resume should be skipped.\n");
-
- /* Remote Wakeup received? */
- if (!priv->reset_done) {
- /* resume signaling for 20 msec */
- priv->reset_done = jiffies
- + msecs_to_jiffies(20);
- /* check the port again */
- mod_timer(&hcd->rh_timer, priv->reset_done);
- }
-
- /* resume completed? */
- else if (time_after_eq(jiffies,
- priv->reset_done)) {
- status |= USB_PORT_STAT_C_SUSPEND << 16;
- priv->reset_done = 0;
-
- /* stop resume signaling */
- temp = reg_read32(hcd->regs, HC_PORTSC1);
- reg_write32(hcd->regs, HC_PORTSC1,
- temp & ~(PORT_RWC_BITS | PORT_RESUME));
- retval = handshake(hcd, HC_PORTSC1,
- PORT_RESUME, 0, 2000 /* 2msec */);
- if (retval != 0) {
- dev_err(hcd->self.controller,
- "port %d resume error %d\n",
- wIndex + 1, retval);
- goto error;
- }
- temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
- }
- }
-
- /* whoever resets must GetPortStatus to complete it!! */
- if ((temp & PORT_RESET)
- && time_after_eq(jiffies,
- priv->reset_done)) {
- status |= USB_PORT_STAT_C_RESET << 16;
- priv->reset_done = 0;
-
- /* force reset to complete */
- reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_RESET);
- /* REVISIT: some hardware needs 550+ usec to clear
- * this bit; seems too long to spin routinely...
- */
- retval = handshake(hcd, HC_PORTSC1,
- PORT_RESET, 0, 750);
- if (retval != 0) {
- dev_err(hcd->self.controller, "port %d reset error %d\n",
- wIndex + 1, retval);
- goto error;
- }
-
- /* see what we found out */
- temp = check_reset_complete(hcd, wIndex,
- reg_read32(hcd->regs, HC_PORTSC1));
- }
- /*
- * Even if OWNER is set, there's no harm letting hub_wq
- * see the wPortStatus values (they should all be 0 except
- * for PORT_POWER anyway).
- */
-
- if (temp & PORT_OWNER)
- dev_err(hcd->self.controller, "PORT_OWNER is set\n");
-
- if (temp & PORT_CONNECT) {
- status |= USB_PORT_STAT_CONNECTION;
- /* status may be from integrated TT */
- status |= USB_PORT_STAT_HIGH_SPEED;
- }
- if (temp & PORT_PE)
- status |= USB_PORT_STAT_ENABLE;
- if (temp & (PORT_SUSPEND|PORT_RESUME))
- status |= USB_PORT_STAT_SUSPEND;
- if (temp & PORT_RESET)
- status |= USB_PORT_STAT_RESET;
- if (temp & PORT_POWER)
- status |= USB_PORT_STAT_POWER;
-
- put_unaligned(cpu_to_le32(status), (__le32 *) buf);
- break;
- case SetHubFeature:
- switch (wValue) {
- case C_HUB_LOCAL_POWER:
- case C_HUB_OVER_CURRENT:
- /* no hub-wide feature/status flags */
- break;
- default:
- goto error;
- }
- break;
- case SetPortFeature:
- selector = wIndex >> 8;
- wIndex &= 0xff;
- if (!wIndex || wIndex > ports)
- goto error;
- wIndex--;
- temp = reg_read32(hcd->regs, HC_PORTSC1);
- if (temp & PORT_OWNER)
- break;
-
-/* temp &= ~PORT_RWC_BITS; */
- switch (wValue) {
- case USB_PORT_FEAT_ENABLE:
- reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_PE);
- break;
-
- case USB_PORT_FEAT_SUSPEND:
- if ((temp & PORT_PE) == 0
- || (temp & PORT_RESET) != 0)
- goto error;
-
- reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_SUSPEND);
- break;
- case USB_PORT_FEAT_POWER:
- if (HCS_PPC(priv->hcs_params))
- reg_write32(hcd->regs, HC_PORTSC1,
- temp | PORT_POWER);
- break;
- case USB_PORT_FEAT_RESET:
- if (temp & PORT_RESUME)
- goto error;
- /* line status bits may report this as low speed,
- * which can be fine if this root hub has a
- * transaction translator built in.
- */
- if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
- && PORT_USB11(temp)) {
- temp |= PORT_OWNER;
- } else {
- temp |= PORT_RESET;
- temp &= ~PORT_PE;
-
- /*
- * caller must wait, then call GetPortStatus
- * usb 2.0 spec says 50 ms resets on root
- */
- priv->reset_done = jiffies +
- msecs_to_jiffies(50);
- }
- reg_write32(hcd->regs, HC_PORTSC1, temp);
- break;
- default:
- goto error;
- }
- reg_read32(hcd->regs, HC_USBCMD);
- break;
-
- default:
-error:
- /* "stall" on error */
- retval = -EPIPE;
- }
- spin_unlock_irqrestore(&priv->lock, flags);
- return retval;
-}
-
-static int isp1760_get_frame(struct usb_hcd *hcd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- u32 fr;
-
- fr = reg_read32(hcd->regs, HC_FRINDEX);
- return (fr >> 3) % priv->periodic_size;
-}
-
-static void isp1760_stop(struct usb_hcd *hcd)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- u32 temp;
-
- del_timer(&errata2_timer);
-
- isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
- NULL, 0);
- mdelay(20);
-
- spin_lock_irq(&priv->lock);
- ehci_reset(hcd);
- /* Disable IRQ */
- temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
- reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
- spin_unlock_irq(&priv->lock);
-
- reg_write32(hcd->regs, HC_CONFIGFLAG, 0);
-}
-
-static void isp1760_shutdown(struct usb_hcd *hcd)
-{
- u32 command, temp;
-
- isp1760_stop(hcd);
- temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
- reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
-
- command = reg_read32(hcd->regs, HC_USBCMD);
- command &= ~CMD_RUN;
- reg_write32(hcd->regs, HC_USBCMD, command);
-}
-
-static void isp1760_clear_tt_buffer_complete(struct usb_hcd *hcd,
- struct usb_host_endpoint *ep)
-{
- struct isp1760_hcd *priv = hcd_to_priv(hcd);
- struct isp1760_qh *qh = ep->hcpriv;
- unsigned long spinflags;
-
- if (!qh)
- return;
-
- spin_lock_irqsave(&priv->lock, spinflags);
- qh->tt_buffer_dirty = 0;
- schedule_ptds(hcd);
- spin_unlock_irqrestore(&priv->lock, spinflags);
-}
-
-
-static const struct hc_driver isp1760_hc_driver = {
- .description = "isp1760-hcd",
- .product_desc = "NXP ISP1760 USB Host Controller",
- .hcd_priv_size = sizeof(struct isp1760_hcd *),
- .irq = isp1760_irq,
- .flags = HCD_MEMORY | HCD_USB2,
- .reset = isp1760_hc_setup,
- .start = isp1760_run,
- .stop = isp1760_stop,
- .shutdown = isp1760_shutdown,
- .urb_enqueue = isp1760_urb_enqueue,
- .urb_dequeue = isp1760_urb_dequeue,
- .endpoint_disable = isp1760_endpoint_disable,
- .get_frame_number = isp1760_get_frame,
- .hub_status_data = isp1760_hub_status_data,
- .hub_control = isp1760_hub_control,
- .clear_tt_buffer_complete = isp1760_clear_tt_buffer_complete,
-};
-
-int __init isp1760_init_kmem_once(void)
-{
- urb_listitem_cachep = kmem_cache_create("isp1760_urb_listitem",
- sizeof(struct urb_listitem), 0, SLAB_TEMPORARY |
- SLAB_MEM_SPREAD, NULL);
-
- if (!urb_listitem_cachep)
- return -ENOMEM;
-
- qtd_cachep = kmem_cache_create("isp1760_qtd",
- sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
- SLAB_MEM_SPREAD, NULL);
-
- if (!qtd_cachep)
- return -ENOMEM;
-
- qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
- 0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
-
- if (!qh_cachep) {
- kmem_cache_destroy(qtd_cachep);
- return -ENOMEM;
- }
-
- return 0;
-}
-
-void isp1760_deinit_kmem_cache(void)
-{
- kmem_cache_destroy(qtd_cachep);
- kmem_cache_destroy(qh_cachep);
- kmem_cache_destroy(urb_listitem_cachep);
-}
-
-int isp1760_hcd_register(struct isp1760_hcd *priv, void __iomem *regs,
- struct resource *mem, int irq, unsigned long irqflags,
- struct device *dev)
-{
- struct usb_hcd *hcd;
- int ret;
-
- hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev_name(dev));
- if (!hcd)
- return -ENOMEM;
-
- *(struct isp1760_hcd **)hcd->hcd_priv = priv;
-
- priv->hcd = hcd;
-
- init_memory(priv);
-
- hcd->irq = irq;
- hcd->regs = regs;
- hcd->rsrc_start = mem->start;
- hcd->rsrc_len = resource_size(mem);
-
- ret = usb_add_hcd(hcd, irq, irqflags);
- if (ret)
- goto error;
-
- device_wakeup_enable(hcd->self.controller);
-
- return 0;
-
-error:
- usb_put_hcd(hcd);
- return ret;
-}
-
-void isp1760_hcd_unregister(struct isp1760_hcd *priv)
-{
- usb_remove_hcd(priv->hcd);
- usb_put_hcd(priv->hcd);
-}
+++ /dev/null
-#ifndef _ISP1760_HCD_H_
-#define _ISP1760_HCD_H_
-
-#include <linux/spinlock.h>
-
-struct isp1760_qh;
-struct isp1760_qtd;
-struct resource;
-struct usb_hcd;
-
-/*
- * 60kb divided in:
- * - 32 blocks @ 256 bytes
- * - 20 blocks @ 1024 bytes
- * - 4 blocks @ 8192 bytes
- */
-
-#define BLOCK_1_NUM 32
-#define BLOCK_2_NUM 20
-#define BLOCK_3_NUM 4
-
-#define BLOCK_1_SIZE 256
-#define BLOCK_2_SIZE 1024
-#define BLOCK_3_SIZE 8192
-#define BLOCKS (BLOCK_1_NUM + BLOCK_2_NUM + BLOCK_3_NUM)
-#define MAX_PAYLOAD_SIZE BLOCK_3_SIZE
-#define PAYLOAD_AREA_SIZE 0xf000
-
-struct isp1760_slotinfo {
- struct isp1760_qh *qh;
- struct isp1760_qtd *qtd;
- unsigned long timestamp;
-};
-
-/* chip memory management */
-struct isp1760_memory_chunk {
- unsigned int start;
- unsigned int size;
- unsigned int free;
-};
-
-enum isp1760_queue_head_types {
- QH_CONTROL,
- QH_BULK,
- QH_INTERRUPT,
- QH_END
-};
-
-struct isp1760_hcd {
- struct usb_hcd *hcd;
-
- u32 hcs_params;
- spinlock_t lock;
- struct isp1760_slotinfo atl_slots[32];
- int atl_done_map;
- struct isp1760_slotinfo int_slots[32];
- int int_done_map;
- struct isp1760_memory_chunk memory_pool[BLOCKS];
- struct list_head qh_list[QH_END];
-
- /* periodic schedule support */
-#define DEFAULT_I_TDPS 1024
- unsigned periodic_size;
- unsigned i_thresh;
- unsigned long reset_done;
- unsigned long next_statechange;
-};
-
-int isp1760_hcd_register(struct isp1760_hcd *priv, void __iomem *regs,
- struct resource *mem, int irq, unsigned long irqflags,
- struct device *dev);
-void isp1760_hcd_unregister(struct isp1760_hcd *priv);
-
-int isp1760_init_kmem_once(void);
-void isp1760_deinit_kmem_cache(void);
-
-#endif /* _ISP1760_HCD_H_ */
+++ /dev/null
-/*
- * Glue code for the ISP1760 driver and bus
- * Currently there is support for
- * - OpenFirmware
- * - PCI
- * - PDEV (generic platform device centralized driver model)
- *
- * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
- *
- */
-
-#include <linux/usb.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/usb/isp1760.h>
-#include <linux/usb/hcd.h>
-
-#include "isp1760-core.h"
-#include "isp1760-regs.h"
-
-#ifdef CONFIG_PCI
-#include <linux/pci.h>
-#endif
-
-#ifdef CONFIG_PCI
-static int isp1761_pci_init(struct pci_dev *dev)
-{
- resource_size_t mem_start;
- resource_size_t mem_length;
- u8 __iomem *iobase;
- u8 latency, limit;
- int retry_count;
- u32 reg_data;
-
- /* Grab the PLX PCI shared memory of the ISP 1761 we need */
- mem_start = pci_resource_start(dev, 3);
- mem_length = pci_resource_len(dev, 3);
- if (mem_length < 0xffff) {
- printk(KERN_ERR "memory length for this resource is wrong\n");
- return -ENOMEM;
- }
-
- if (!request_mem_region(mem_start, mem_length, "ISP-PCI")) {
- printk(KERN_ERR "host controller already in use\n");
- return -EBUSY;
- }
-
- /* map available memory */
- iobase = ioremap_nocache(mem_start, mem_length);
- if (!iobase) {
- printk(KERN_ERR "Error ioremap failed\n");
- release_mem_region(mem_start, mem_length);
- return -ENOMEM;
- }
-
- /* bad pci latencies can contribute to overruns */
- pci_read_config_byte(dev, PCI_LATENCY_TIMER, &latency);
- if (latency) {
- pci_read_config_byte(dev, PCI_MAX_LAT, &limit);
- if (limit && limit < latency)
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, limit);
- }
-
- /* Try to check whether we can access Scratch Register of
- * Host Controller or not. The initial PCI access is retried until
- * local init for the PCI bridge is completed
- */
- retry_count = 20;
- reg_data = 0;
- while ((reg_data != 0xFACE) && retry_count) {
- /*by default host is in 16bit mode, so
- * io operations at this stage must be 16 bit
- * */
- writel(0xface, iobase + HC_SCRATCH_REG);
- udelay(100);
- reg_data = readl(iobase + HC_SCRATCH_REG) & 0x0000ffff;
- retry_count--;
- }
-
- iounmap(iobase);
- release_mem_region(mem_start, mem_length);
-
- /* Host Controller presence is detected by writing to scratch register
- * and reading back and checking the contents are same or not
- */
- if (reg_data != 0xFACE) {
- dev_err(&dev->dev, "scratch register mismatch %x\n", reg_data);
- return -ENOMEM;
- }
-
- /* Grab the PLX PCI mem maped port start address we need */
- mem_start = pci_resource_start(dev, 0);
- mem_length = pci_resource_len(dev, 0);
-
- if (!request_mem_region(mem_start, mem_length, "ISP1761 IO MEM")) {
- printk(KERN_ERR "request region #1\n");
- return -EBUSY;
- }
-
- iobase = ioremap_nocache(mem_start, mem_length);
- if (!iobase) {
- printk(KERN_ERR "ioremap #1\n");
- release_mem_region(mem_start, mem_length);
- return -ENOMEM;
- }
-
- /* configure PLX PCI chip to pass interrupts */
-#define PLX_INT_CSR_REG 0x68
- reg_data = readl(iobase + PLX_INT_CSR_REG);
- reg_data |= 0x900;
- writel(reg_data, iobase + PLX_INT_CSR_REG);
-
- /* done with PLX IO access */
- iounmap(iobase);
- release_mem_region(mem_start, mem_length);
-
- return 0;
-}
-
-static int isp1761_pci_probe(struct pci_dev *dev,
- const struct pci_device_id *id)
-{
- unsigned int devflags = 0;
- int ret;
-
- if (usb_disabled())
- return -ENODEV;
-
- if (!dev->irq)
- return -ENODEV;
-
- if (pci_enable_device(dev) < 0)
- return -ENODEV;
-
- ret = isp1761_pci_init(dev);
- if (ret < 0)
- goto error;
-
- pci_set_master(dev);
-
- dev->dev.dma_mask = NULL;
- ret = isp1760_register(&dev->resource[3], dev->irq, 0, &dev->dev,
- devflags);
- if (ret < 0)
- goto error;
-
- return 0;
-
-error:
- pci_disable_device(dev);
- return ret;
-}
-
-static void isp1761_pci_remove(struct pci_dev *dev)
-{
- isp1760_unregister(&dev->dev);
-
- pci_disable_device(dev);
-}
-
-static void isp1761_pci_shutdown(struct pci_dev *dev)
-{
- printk(KERN_ERR "ips1761_pci_shutdown\n");
-}
-
-static const struct pci_device_id isp1760_plx [] = {
- {
- .class = PCI_CLASS_BRIDGE_OTHER << 8,
- .class_mask = ~0,
- .vendor = PCI_VENDOR_ID_PLX,
- .device = 0x5406,
- .subvendor = PCI_VENDOR_ID_PLX,
- .subdevice = 0x9054,
- },
- { }
-};
-MODULE_DEVICE_TABLE(pci, isp1760_plx);
-
-static struct pci_driver isp1761_pci_driver = {
- .name = "isp1760",
- .id_table = isp1760_plx,
- .probe = isp1761_pci_probe,
- .remove = isp1761_pci_remove,
- .shutdown = isp1761_pci_shutdown,
-};
-#endif
-
-static int isp1760_plat_probe(struct platform_device *pdev)
-{
- unsigned long irqflags;
- unsigned int devflags = 0;
- struct resource *mem_res;
- struct resource *irq_res;
- int ret;
-
- mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-
- irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- if (!irq_res) {
- pr_warning("isp1760: IRQ resource not available\n");
- return -ENODEV;
- }
- irqflags = irq_res->flags & IRQF_TRIGGER_MASK;
-
- if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
- struct device_node *dp = pdev->dev.of_node;
- u32 bus_width = 0;
-
- if (of_device_is_compatible(dp, "nxp,usb-isp1761"))
- devflags |= ISP1760_FLAG_ISP1761;
-
- /* Some systems wire up only 16 of the 32 data lines */
- of_property_read_u32(dp, "bus-width", &bus_width);
- if (bus_width == 16)
- devflags |= ISP1760_FLAG_BUS_WIDTH_16;
-
- if (of_property_read_bool(dp, "port1-otg"))
- devflags |= ISP1760_FLAG_OTG_EN;
-
- if (of_property_read_bool(dp, "analog-oc"))
- devflags |= ISP1760_FLAG_ANALOG_OC;
-
- if (of_property_read_bool(dp, "dack-polarity"))
- devflags |= ISP1760_FLAG_DACK_POL_HIGH;
-
- if (of_property_read_bool(dp, "dreq-polarity"))
- devflags |= ISP1760_FLAG_DREQ_POL_HIGH;
- } else if (dev_get_platdata(&pdev->dev)) {
- struct isp1760_platform_data *pdata =
- dev_get_platdata(&pdev->dev);
-
- if (pdata->is_isp1761)
- devflags |= ISP1760_FLAG_ISP1761;
- if (pdata->bus_width_16)
- devflags |= ISP1760_FLAG_BUS_WIDTH_16;
- if (pdata->port1_otg)
- devflags |= ISP1760_FLAG_OTG_EN;
- if (pdata->analog_oc)
- devflags |= ISP1760_FLAG_ANALOG_OC;
- if (pdata->dack_polarity_high)
- devflags |= ISP1760_FLAG_DACK_POL_HIGH;
- if (pdata->dreq_polarity_high)
- devflags |= ISP1760_FLAG_DREQ_POL_HIGH;
- }
-
- ret = isp1760_register(mem_res, irq_res->start, irqflags, &pdev->dev,
- devflags);
- if (ret < 0)
- return ret;
-
- pr_info("ISP1760 USB device initialised\n");
- return 0;
-}
-
-static int isp1760_plat_remove(struct platform_device *pdev)
-{
- isp1760_unregister(&pdev->dev);
-
- return 0;
-}
-
-#ifdef CONFIG_OF
-static const struct of_device_id isp1760_of_match[] = {
- { .compatible = "nxp,usb-isp1760", },
- { .compatible = "nxp,usb-isp1761", },
- { },
-};
-MODULE_DEVICE_TABLE(of, isp1760_of_match);
-#endif
-
-static struct platform_driver isp1760_plat_driver = {
- .probe = isp1760_plat_probe,
- .remove = isp1760_plat_remove,
- .driver = {
- .name = "isp1760",
- .of_match_table = of_match_ptr(isp1760_of_match),
- },
-};
-
-static int __init isp1760_init(void)
-{
- int ret, any_ret = -ENODEV;
-
- isp1760_init_kmem_once();
-
- ret = platform_driver_register(&isp1760_plat_driver);
- if (!ret)
- any_ret = 0;
-#ifdef CONFIG_PCI
- ret = pci_register_driver(&isp1761_pci_driver);
- if (!ret)
- any_ret = 0;
-#endif
-
- if (any_ret)
- isp1760_deinit_kmem_cache();
- return any_ret;
-}
-module_init(isp1760_init);
-
-static void __exit isp1760_exit(void)
-{
- platform_driver_unregister(&isp1760_plat_driver);
-#ifdef CONFIG_PCI
- pci_unregister_driver(&isp1761_pci_driver);
-#endif
- isp1760_deinit_kmem_cache();
-}
-module_exit(isp1760_exit);
+++ /dev/null
-/*
- * Driver for the NXP ISP1760 chip
- *
- * Copyright 2014 Laurent Pinchart
- * Copyright 2007 Sebastian Siewior
- *
- * Contacts:
- * Sebastian Siewior <bigeasy@linutronix.de>
- * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- */
-
-#ifndef _ISP1760_REGS_H_
-#define _ISP1760_REGS_H_
-
-/* -----------------------------------------------------------------------------
- * Host Controller
- */
-
-/* EHCI capability registers */
-#define HC_CAPLENGTH 0x000
-#define HC_LENGTH(p) (((p) >> 00) & 0x00ff) /* bits 7:0 */
-#define HC_VERSION(p) (((p) >> 16) & 0xffff) /* bits 31:16 */
-
-#define HC_HCSPARAMS 0x004
-#define HCS_INDICATOR(p) ((p) & (1 << 16)) /* true: has port indicators */
-#define HCS_PPC(p) ((p) & (1 << 4)) /* true: port power control */
-#define HCS_N_PORTS(p) (((p) >> 0) & 0xf) /* bits 3:0, ports on HC */
-
-#define HC_HCCPARAMS 0x008
-#define HCC_ISOC_CACHE(p) ((p) & (1 << 7)) /* true: can cache isoc frame */
-#define HCC_ISOC_THRES(p) (((p) >> 4) & 0x7) /* bits 6:4, uframes cached */
-
-/* EHCI operational registers */
-#define HC_USBCMD 0x020
-#define CMD_LRESET (1 << 7) /* partial reset (no ports, etc) */
-#define CMD_RESET (1 << 1) /* reset HC not bus */
-#define CMD_RUN (1 << 0) /* start/stop HC */
-
-#define HC_USBSTS 0x024
-#define STS_PCD (1 << 2) /* port change detect */
-
-#define HC_FRINDEX 0x02c
-
-#define HC_CONFIGFLAG 0x060
-#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */
-
-#define HC_PORTSC1 0x064
-#define PORT_OWNER (1 << 13) /* true: companion hc owns this port */
-#define PORT_POWER (1 << 12) /* true: has power (see PPC) */
-#define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */
-#define PORT_RESET (1 << 8) /* reset port */
-#define PORT_SUSPEND (1 << 7) /* suspend port */
-#define PORT_RESUME (1 << 6) /* resume it */
-#define PORT_PE (1 << 2) /* port enable */
-#define PORT_CSC (1 << 1) /* connect status change */
-#define PORT_CONNECT (1 << 0) /* device connected */
-#define PORT_RWC_BITS (PORT_CSC)
-
-#define HC_ISO_PTD_DONEMAP_REG 0x130
-#define HC_ISO_PTD_SKIPMAP_REG 0x134
-#define HC_ISO_PTD_LASTPTD_REG 0x138
-#define HC_INT_PTD_DONEMAP_REG 0x140
-#define HC_INT_PTD_SKIPMAP_REG 0x144
-#define HC_INT_PTD_LASTPTD_REG 0x148
-#define HC_ATL_PTD_DONEMAP_REG 0x150
-#define HC_ATL_PTD_SKIPMAP_REG 0x154
-#define HC_ATL_PTD_LASTPTD_REG 0x158
-
-/* Configuration Register */
-#define HC_HW_MODE_CTRL 0x300
-#define ALL_ATX_RESET (1 << 31)
-#define HW_ANA_DIGI_OC (1 << 15)
-#define HW_DEV_DMA (1 << 11)
-#define HW_COMN_IRQ (1 << 10)
-#define HW_COMN_DMA (1 << 9)
-#define HW_DATA_BUS_32BIT (1 << 8)
-#define HW_DACK_POL_HIGH (1 << 6)
-#define HW_DREQ_POL_HIGH (1 << 5)
-#define HW_INTR_HIGH_ACT (1 << 2)
-#define HW_INTR_EDGE_TRIG (1 << 1)
-#define HW_GLOBAL_INTR_EN (1 << 0)
-
-#define HC_CHIP_ID_REG 0x304
-#define HC_SCRATCH_REG 0x308
-
-#define HC_RESET_REG 0x30c
-#define SW_RESET_RESET_HC (1 << 1)
-#define SW_RESET_RESET_ALL (1 << 0)
-
-#define HC_BUFFER_STATUS_REG 0x334
-#define ISO_BUF_FILL (1 << 2)
-#define INT_BUF_FILL (1 << 1)
-#define ATL_BUF_FILL (1 << 0)
-
-#define HC_MEMORY_REG 0x33c
-#define ISP_BANK(x) ((x) << 16)
-
-#define HC_PORT1_CTRL 0x374
-#define PORT1_POWER (3 << 3)
-#define PORT1_INIT1 (1 << 7)
-#define PORT1_INIT2 (1 << 23)
-#define HW_OTG_CTRL_SET 0x374
-#define HW_OTG_CTRL_CLR 0x376
-#define HW_OTG_DISABLE (1 << 10)
-#define HW_OTG_SE0_EN (1 << 9)
-#define HW_BDIS_ACON_EN (1 << 8)
-#define HW_SW_SEL_HC_DC (1 << 7)
-#define HW_VBUS_CHRG (1 << 6)
-#define HW_VBUS_DISCHRG (1 << 5)
-#define HW_VBUS_DRV (1 << 4)
-#define HW_SEL_CP_EXT (1 << 3)
-#define HW_DM_PULLDOWN (1 << 2)
-#define HW_DP_PULLDOWN (1 << 1)
-#define HW_DP_PULLUP (1 << 0)
-
-/* Interrupt Register */
-#define HC_INTERRUPT_REG 0x310
-
-#define HC_INTERRUPT_ENABLE 0x314
-#define HC_ISO_INT (1 << 9)
-#define HC_ATL_INT (1 << 8)
-#define HC_INTL_INT (1 << 7)
-#define HC_EOT_INT (1 << 3)
-#define HC_SOT_INT (1 << 1)
-#define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT)
-
-#define HC_ISO_IRQ_MASK_OR_REG 0x318
-#define HC_INT_IRQ_MASK_OR_REG 0x31c
-#define HC_ATL_IRQ_MASK_OR_REG 0x320
-#define HC_ISO_IRQ_MASK_AND_REG 0x324
-#define HC_INT_IRQ_MASK_AND_REG 0x328
-#define HC_ATL_IRQ_MASK_AND_REG 0x32c
-
-/* -----------------------------------------------------------------------------
- * Peripheral Controller
- */
-
-/* Initialization Registers */
-#define DC_ADDRESS 0x0200
-#define DC_DEVEN (1 << 7)
-
-#define DC_MODE 0x020c
-#define DC_DMACLKON (1 << 9)
-#define DC_VBUSSTAT (1 << 8)
-#define DC_CLKAON (1 << 7)
-#define DC_SNDRSU (1 << 6)
-#define DC_GOSUSP (1 << 5)
-#define DC_SFRESET (1 << 4)
-#define DC_GLINTENA (1 << 3)
-#define DC_WKUPCS (1 << 2)
-
-#define DC_INTCONF 0x0210
-#define DC_CDBGMOD_ACK_NAK (0 << 6)
-#define DC_CDBGMOD_ACK (1 << 6)
-#define DC_CDBGMOD_ACK_1NAK (2 << 6)
-#define DC_DDBGMODIN_ACK_NAK (0 << 4)
-#define DC_DDBGMODIN_ACK (1 << 4)
-#define DC_DDBGMODIN_ACK_1NAK (2 << 4)
-#define DC_DDBGMODOUT_ACK_NYET_NAK (0 << 2)
-#define DC_DDBGMODOUT_ACK_NYET (1 << 2)
-#define DC_DDBGMODOUT_ACK_NYET_1NAK (2 << 2)
-#define DC_INTLVL (1 << 1)
-#define DC_INTPOL (1 << 0)
-
-#define DC_DEBUG 0x0212
-#define DC_INTENABLE 0x0214
-#define DC_IEPTX(n) (1 << (11 + 2 * (n)))
-#define DC_IEPRX(n) (1 << (10 + 2 * (n)))
-#define DC_IEPRXTX(n) (3 << (10 + 2 * (n)))
-#define DC_IEP0SETUP (1 << 8)
-#define DC_IEVBUS (1 << 7)
-#define DC_IEDMA (1 << 6)
-#define DC_IEHS_STA (1 << 5)
-#define DC_IERESM (1 << 4)
-#define DC_IESUSP (1 << 3)
-#define DC_IEPSOF (1 << 2)
-#define DC_IESOF (1 << 1)
-#define DC_IEBRST (1 << 0)
-
-/* Data Flow Registers */
-#define DC_EPINDEX 0x022c
-#define DC_EP0SETUP (1 << 5)
-#define DC_ENDPIDX(n) ((n) << 1)
-#define DC_EPDIR (1 << 0)
-
-#define DC_CTRLFUNC 0x0228
-#define DC_CLBUF (1 << 4)
-#define DC_VENDP (1 << 3)
-#define DC_DSEN (1 << 2)
-#define DC_STATUS (1 << 1)
-#define DC_STALL (1 << 0)
-
-#define DC_DATAPORT 0x0220
-#define DC_BUFLEN 0x021c
-#define DC_DATACOUNT_MASK 0xffff
-#define DC_BUFSTAT 0x021e
-#define DC_EPMAXPKTSZ 0x0204
-
-#define DC_EPTYPE 0x0208
-#define DC_NOEMPKT (1 << 4)
-#define DC_EPENABLE (1 << 3)
-#define DC_DBLBUF (1 << 2)
-#define DC_ENDPTYP_ISOC (1 << 0)
-#define DC_ENDPTYP_BULK (2 << 0)
-#define DC_ENDPTYP_INTERRUPT (3 << 0)
-
-/* DMA Registers */
-#define DC_DMACMD 0x0230
-#define DC_DMATXCOUNT 0x0234
-#define DC_DMACONF 0x0238
-#define DC_DMAHW 0x023c
-#define DC_DMAINTREASON 0x0250
-#define DC_DMAINTEN 0x0254
-#define DC_DMAEP 0x0258
-#define DC_DMABURSTCOUNT 0x0264
-
-/* General Registers */
-#define DC_INTERRUPT 0x0218
-#define DC_CHIPID 0x0270
-#define DC_FRAMENUM 0x0274
-#define DC_SCRATCH 0x0278
-#define DC_UNLOCKDEV 0x027c
-#define DC_INTPULSEWIDTH 0x0280
-#define DC_TESTMODE 0x0284
-
-#endif
+++ /dev/null
-/*
- * Driver for the NXP ISP1761 device controller
- *
- * Copyright 2014 Ideas on Board Oy
- *
- * Contacts:
- * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- */
-
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/timer.h>
-#include <linux/usb.h>
-
-#include "isp1760-core.h"
-#include "isp1760-regs.h"
-#include "isp1760-udc.h"
-
-#define ISP1760_VBUS_POLL_INTERVAL msecs_to_jiffies(500)
-
-struct isp1760_request {
- struct usb_request req;
- struct list_head queue;
- struct isp1760_ep *ep;
- unsigned int packet_size;
-};
-
-static inline struct isp1760_udc *gadget_to_udc(struct usb_gadget *gadget)
-{
- return container_of(gadget, struct isp1760_udc, gadget);
-}
-
-static inline struct isp1760_ep *ep_to_udc_ep(struct usb_ep *ep)
-{
- return container_of(ep, struct isp1760_ep, ep);
-}
-
-static inline struct isp1760_request *req_to_udc_req(struct usb_request *req)
-{
- return container_of(req, struct isp1760_request, req);
-}
-
-static inline u32 isp1760_udc_read(struct isp1760_udc *udc, u16 reg)
-{
- return isp1760_read32(udc->regs, reg);
-}
-
-static inline void isp1760_udc_write(struct isp1760_udc *udc, u16 reg, u32 val)
-{
- isp1760_write32(udc->regs, reg, val);
-}
-
-/* -----------------------------------------------------------------------------
- * Endpoint Management
- */
-
-static struct isp1760_ep *isp1760_udc_find_ep(struct isp1760_udc *udc,
- u16 index)
-{
- unsigned int i;
-
- if (index == 0)
- return &udc->ep[0];
-
- for (i = 1; i < ARRAY_SIZE(udc->ep); ++i) {
- if (udc->ep[i].addr == index)
- return udc->ep[i].desc ? &udc->ep[i] : NULL;
- }
-
- return NULL;
-}
-
-static void __isp1760_udc_select_ep(struct isp1760_ep *ep, int dir)
-{
- isp1760_udc_write(ep->udc, DC_EPINDEX,
- DC_ENDPIDX(ep->addr & USB_ENDPOINT_NUMBER_MASK) |
- (dir == USB_DIR_IN ? DC_EPDIR : 0));
-}
-
-/**
- * isp1760_udc_select_ep - Select an endpoint for register access
- * @ep: The endpoint
- *
- * The ISP1761 endpoint registers are banked. This function selects the target
- * endpoint for banked register access. The selection remains valid until the
- * next call to this function, the next direct access to the EPINDEX register
- * or the next reset, whichever comes first.
- *
- * Called with the UDC spinlock held.
- */
-static void isp1760_udc_select_ep(struct isp1760_ep *ep)
-{
- __isp1760_udc_select_ep(ep, ep->addr & USB_ENDPOINT_DIR_MASK);
-}
-
-/* Called with the UDC spinlock held. */
-static void isp1760_udc_ctrl_send_status(struct isp1760_ep *ep, int dir)
-{
- struct isp1760_udc *udc = ep->udc;
-
- /*
- * Proceed to the status stage. The status stage data packet flows in
- * the direction opposite to the data stage data packets, we thus need
- * to select the OUT/IN endpoint for IN/OUT transfers.
- */
- isp1760_udc_write(udc, DC_EPINDEX, DC_ENDPIDX(0) |
- (dir == USB_DIR_IN ? 0 : DC_EPDIR));
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_STATUS);
-
- /*
- * The hardware will terminate the request automatically and go back to
- * the setup stage without notifying us.
- */
- udc->ep0_state = ISP1760_CTRL_SETUP;
-}
-
-/* Called without the UDC spinlock held. */
-static void isp1760_udc_request_complete(struct isp1760_ep *ep,
- struct isp1760_request *req,
- int status)
-{
- struct isp1760_udc *udc = ep->udc;
- unsigned long flags;
-
- dev_dbg(ep->udc->isp->dev, "completing request %p with status %d\n",
- req, status);
-
- req->ep = NULL;
- req->req.status = status;
- req->req.complete(&ep->ep, &req->req);
-
- spin_lock_irqsave(&udc->lock, flags);
-
- /*
- * When completing control OUT requests, move to the status stage after
- * calling the request complete callback. This gives the gadget an
- * opportunity to stall the control transfer if needed.
- */
- if (status == 0 && ep->addr == 0 && udc->ep0_dir == USB_DIR_OUT)
- isp1760_udc_ctrl_send_status(ep, USB_DIR_OUT);
-
- spin_unlock_irqrestore(&udc->lock, flags);
-}
-
-static void isp1760_udc_ctrl_send_stall(struct isp1760_ep *ep)
-{
- struct isp1760_udc *udc = ep->udc;
- unsigned long flags;
-
- dev_dbg(ep->udc->isp->dev, "%s(ep%02x)\n", __func__, ep->addr);
-
- spin_lock_irqsave(&udc->lock, flags);
-
- /* Stall both the IN and OUT endpoints. */
- __isp1760_udc_select_ep(ep, USB_DIR_OUT);
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_STALL);
- __isp1760_udc_select_ep(ep, USB_DIR_IN);
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_STALL);
-
- /* A protocol stall completes the control transaction. */
- udc->ep0_state = ISP1760_CTRL_SETUP;
-
- spin_unlock_irqrestore(&udc->lock, flags);
-}
-
-/* -----------------------------------------------------------------------------
- * Data Endpoints
- */
-
-/* Called with the UDC spinlock held. */
-static bool isp1760_udc_receive(struct isp1760_ep *ep,
- struct isp1760_request *req)
-{
- struct isp1760_udc *udc = ep->udc;
- unsigned int len;
- u32 *buf;
- int i;
-
- isp1760_udc_select_ep(ep);
- len = isp1760_udc_read(udc, DC_BUFLEN) & DC_DATACOUNT_MASK;
-
- dev_dbg(udc->isp->dev, "%s: received %u bytes (%u/%u done)\n",
- __func__, len, req->req.actual, req->req.length);
-
- len = min(len, req->req.length - req->req.actual);
-
- if (!len) {
- /*
- * There's no data to be read from the FIFO, acknowledge the RX
- * interrupt by clearing the buffer.
- *
- * TODO: What if another packet arrives in the meantime ? The
- * datasheet doesn't clearly document how this should be
- * handled.
- */
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF);
- return false;
- }
-
- buf = req->req.buf + req->req.actual;
-
- /*
- * Make sure not to read more than one extra byte, otherwise data from
- * the next packet might be removed from the FIFO.
- */
- for (i = len; i > 2; i -= 4, ++buf)
- *buf = le32_to_cpu(isp1760_udc_read(udc, DC_DATAPORT));
- if (i > 0)
- *(u16 *)buf = le16_to_cpu(readw(udc->regs + DC_DATAPORT));
-
- req->req.actual += len;
-
- /*
- * TODO: The short_not_ok flag isn't supported yet, but isn't used by
- * any gadget driver either.
- */
-
- dev_dbg(udc->isp->dev,
- "%s: req %p actual/length %u/%u maxpacket %u packet size %u\n",
- __func__, req, req->req.actual, req->req.length, ep->maxpacket,
- len);
-
- ep->rx_pending = false;
-
- /*
- * Complete the request if all data has been received or if a short
- * packet has been received.
- */
- if (req->req.actual == req->req.length || len < ep->maxpacket) {
- list_del(&req->queue);
- return true;
- }
-
- return false;
-}
-
-static void isp1760_udc_transmit(struct isp1760_ep *ep,
- struct isp1760_request *req)
-{
- struct isp1760_udc *udc = ep->udc;
- u32 *buf = req->req.buf + req->req.actual;
- int i;
-
- req->packet_size = min(req->req.length - req->req.actual,
- ep->maxpacket);
-
- dev_dbg(udc->isp->dev, "%s: transferring %u bytes (%u/%u done)\n",
- __func__, req->packet_size, req->req.actual,
- req->req.length);
-
- __isp1760_udc_select_ep(ep, USB_DIR_IN);
-
- if (req->packet_size)
- isp1760_udc_write(udc, DC_BUFLEN, req->packet_size);
-
- /*
- * Make sure not to write more than one extra byte, otherwise extra data
- * will stay in the FIFO and will be transmitted during the next control
- * request. The endpoint control CLBUF bit is supposed to allow flushing
- * the FIFO for this kind of conditions, but doesn't seem to work.
- */
- for (i = req->packet_size; i > 2; i -= 4, ++buf)
- isp1760_udc_write(udc, DC_DATAPORT, cpu_to_le32(*buf));
- if (i > 0)
- writew(cpu_to_le16(*(u16 *)buf), udc->regs + DC_DATAPORT);
-
- if (ep->addr == 0)
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN);
- if (!req->packet_size)
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_VENDP);
-}
-
-static void isp1760_ep_rx_ready(struct isp1760_ep *ep)
-{
- struct isp1760_udc *udc = ep->udc;
- struct isp1760_request *req;
- bool complete;
-
- spin_lock(&udc->lock);
-
- if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_OUT) {
- spin_unlock(&udc->lock);
- dev_dbg(udc->isp->dev, "%s: invalid ep0 state %u\n", __func__,
- udc->ep0_state);
- return;
- }
-
- if (ep->addr != 0 && !ep->desc) {
- spin_unlock(&udc->lock);
- dev_dbg(udc->isp->dev, "%s: ep%02x is disabled\n", __func__,
- ep->addr);
- return;
- }
-
- if (list_empty(&ep->queue)) {
- ep->rx_pending = true;
- spin_unlock(&udc->lock);
- dev_dbg(udc->isp->dev, "%s: ep%02x (%p) has no request queued\n",
- __func__, ep->addr, ep);
- return;
- }
-
- req = list_first_entry(&ep->queue, struct isp1760_request,
- queue);
- complete = isp1760_udc_receive(ep, req);
-
- spin_unlock(&udc->lock);
-
- if (complete)
- isp1760_udc_request_complete(ep, req, 0);
-}
-
-static void isp1760_ep_tx_complete(struct isp1760_ep *ep)
-{
- struct isp1760_udc *udc = ep->udc;
- struct isp1760_request *complete = NULL;
- struct isp1760_request *req;
- bool need_zlp;
-
- spin_lock(&udc->lock);
-
- if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_IN) {
- spin_unlock(&udc->lock);
- dev_dbg(udc->isp->dev, "TX IRQ: invalid endpoint state %u\n",
- udc->ep0_state);
- return;
- }
-
- if (list_empty(&ep->queue)) {
- /*
- * This can happen for the control endpoint when the reply to
- * the GET_STATUS IN control request is sent directly by the
- * setup IRQ handler. Just proceed to the status stage.
- */
- if (ep->addr == 0) {
- isp1760_udc_ctrl_send_status(ep, USB_DIR_IN);
- spin_unlock(&udc->lock);
- return;
- }
-
- spin_unlock(&udc->lock);
- dev_dbg(udc->isp->dev, "%s: ep%02x has no request queued\n",
- __func__, ep->addr);
- return;
- }
-
- req = list_first_entry(&ep->queue, struct isp1760_request,
- queue);
- req->req.actual += req->packet_size;
-
- need_zlp = req->req.actual == req->req.length &&
- !(req->req.length % ep->maxpacket) &&
- req->packet_size && req->req.zero;
-
- dev_dbg(udc->isp->dev,
- "TX IRQ: req %p actual/length %u/%u maxpacket %u packet size %u zero %u need zlp %u\n",
- req, req->req.actual, req->req.length, ep->maxpacket,
- req->packet_size, req->req.zero, need_zlp);
-
- /*
- * Complete the request if all data has been sent and we don't need to
- * transmit a zero length packet.
- */
- if (req->req.actual == req->req.length && !need_zlp) {
- complete = req;
- list_del(&req->queue);
-
- if (ep->addr == 0)
- isp1760_udc_ctrl_send_status(ep, USB_DIR_IN);
-
- if (!list_empty(&ep->queue))
- req = list_first_entry(&ep->queue,
- struct isp1760_request, queue);
- else
- req = NULL;
- }
-
- /*
- * Transmit the next packet or start the next request, if any.
- *
- * TODO: If the endpoint is stalled the next request shouldn't be
- * started, but what about the next packet ?
- */
- if (req)
- isp1760_udc_transmit(ep, req);
-
- spin_unlock(&udc->lock);
-
- if (complete)
- isp1760_udc_request_complete(ep, complete, 0);
-}
-
-static int __isp1760_udc_set_halt(struct isp1760_ep *ep, bool halt)
-{
- struct isp1760_udc *udc = ep->udc;
-
- dev_dbg(udc->isp->dev, "%s: %s halt on ep%02x\n", __func__,
- halt ? "set" : "clear", ep->addr);
-
- if (ep->desc && usb_endpoint_xfer_isoc(ep->desc)) {
- dev_dbg(udc->isp->dev, "%s: ep%02x is isochronous\n", __func__,
- ep->addr);
- return -EINVAL;
- }
-
- isp1760_udc_select_ep(ep);
- isp1760_udc_write(udc, DC_CTRLFUNC, halt ? DC_STALL : 0);
-
- if (ep->addr == 0) {
- /* When halting the control endpoint, stall both IN and OUT. */
- __isp1760_udc_select_ep(ep, USB_DIR_IN);
- isp1760_udc_write(udc, DC_CTRLFUNC, halt ? DC_STALL : 0);
- } else if (!halt) {
- /* Reset the data PID by cycling the endpoint enable bit. */
- u16 eptype = isp1760_udc_read(udc, DC_EPTYPE);
-
- isp1760_udc_write(udc, DC_EPTYPE, eptype & ~DC_EPENABLE);
- isp1760_udc_write(udc, DC_EPTYPE, eptype);
-
- /*
- * Disabling the endpoint emptied the transmit FIFO, fill it
- * again if a request is pending.
- *
- * TODO: Does the gadget framework require synchronizatino with
- * the TX IRQ handler ?
- */
- if ((ep->addr & USB_DIR_IN) && !list_empty(&ep->queue)) {
- struct isp1760_request *req;
-
- req = list_first_entry(&ep->queue,
- struct isp1760_request, queue);
- isp1760_udc_transmit(ep, req);
- }
- }
-
- ep->halted = halt;
-
- return 0;
-}
-
-/* -----------------------------------------------------------------------------
- * Control Endpoint
- */
-
-static int isp1760_udc_get_status(struct isp1760_udc *udc,
- const struct usb_ctrlrequest *req)
-{
- struct isp1760_ep *ep;
- u16 status;
-
- if (req->wLength != cpu_to_le16(2) || req->wValue != cpu_to_le16(0))
- return -EINVAL;
-
- switch (req->bRequestType) {
- case USB_DIR_IN | USB_RECIP_DEVICE:
- status = udc->devstatus;
- break;
-
- case USB_DIR_IN | USB_RECIP_INTERFACE:
- status = 0;
- break;
-
- case USB_DIR_IN | USB_RECIP_ENDPOINT:
- ep = isp1760_udc_find_ep(udc, le16_to_cpu(req->wIndex));
- if (!ep)
- return -EINVAL;
-
- status = 0;
- if (ep->halted)
- status |= 1 << USB_ENDPOINT_HALT;
- break;
-
- default:
- return -EINVAL;
- }
-
- isp1760_udc_write(udc, DC_EPINDEX, DC_ENDPIDX(0) | DC_EPDIR);
- isp1760_udc_write(udc, DC_BUFLEN, 2);
-
- writew(cpu_to_le16(status), udc->regs + DC_DATAPORT);
-
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN);
-
- dev_dbg(udc->isp->dev, "%s: status 0x%04x\n", __func__, status);
-
- return 0;
-}
-
-static int isp1760_udc_set_address(struct isp1760_udc *udc, u16 addr)
-{
- if (addr > 127) {
- dev_dbg(udc->isp->dev, "invalid device address %u\n", addr);
- return -EINVAL;
- }
-
- if (udc->gadget.state != USB_STATE_DEFAULT &&
- udc->gadget.state != USB_STATE_ADDRESS) {
- dev_dbg(udc->isp->dev, "can't set address in state %u\n",
- udc->gadget.state);
- return -EINVAL;
- }
-
- usb_gadget_set_state(&udc->gadget, addr ? USB_STATE_ADDRESS :
- USB_STATE_DEFAULT);
-
- isp1760_udc_write(udc, DC_ADDRESS, DC_DEVEN | addr);
-
- spin_lock(&udc->lock);
- isp1760_udc_ctrl_send_status(&udc->ep[0], USB_DIR_OUT);
- spin_unlock(&udc->lock);
-
- return 0;
-}
-
-static bool isp1760_ep0_setup_standard(struct isp1760_udc *udc,
- struct usb_ctrlrequest *req)
-{
- bool stall;
-
- switch (req->bRequest) {
- case USB_REQ_GET_STATUS:
- return isp1760_udc_get_status(udc, req);
-
- case USB_REQ_CLEAR_FEATURE:
- switch (req->bRequestType) {
- case USB_DIR_OUT | USB_RECIP_DEVICE: {
- /* TODO: Handle remote wakeup feature. */
- return true;
- }
-
- case USB_DIR_OUT | USB_RECIP_ENDPOINT: {
- u16 index = le16_to_cpu(req->wIndex);
- struct isp1760_ep *ep;
-
- if (req->wLength != cpu_to_le16(0) ||
- req->wValue != cpu_to_le16(USB_ENDPOINT_HALT))
- return true;
-
- ep = isp1760_udc_find_ep(udc, index);
- if (!ep)
- return true;
-
- spin_lock(&udc->lock);
-
- /*
- * If the endpoint is wedged only the gadget can clear
- * the halt feature. Pretend success in that case, but
- * keep the endpoint halted.
- */
- if (!ep->wedged)
- stall = __isp1760_udc_set_halt(ep, false);
- else
- stall = false;
-
- if (!stall)
- isp1760_udc_ctrl_send_status(&udc->ep[0],
- USB_DIR_OUT);
-
- spin_unlock(&udc->lock);
- return stall;
- }
-
- default:
- return true;
- }
- break;
-
- case USB_REQ_SET_FEATURE:
- switch (req->bRequestType) {
- case USB_DIR_OUT | USB_RECIP_DEVICE: {
- /* TODO: Handle remote wakeup and test mode features */
- return true;
- }
-
- case USB_DIR_OUT | USB_RECIP_ENDPOINT: {
- u16 index = le16_to_cpu(req->wIndex);
- struct isp1760_ep *ep;
-
- if (req->wLength != cpu_to_le16(0) ||
- req->wValue != cpu_to_le16(USB_ENDPOINT_HALT))
- return true;
-
- ep = isp1760_udc_find_ep(udc, index);
- if (!ep)
- return true;
-
- spin_lock(&udc->lock);
-
- stall = __isp1760_udc_set_halt(ep, true);
- if (!stall)
- isp1760_udc_ctrl_send_status(&udc->ep[0],
- USB_DIR_OUT);
-
- spin_unlock(&udc->lock);
- return stall;
- }
-
- default:
- return true;
- }
- break;
-
- case USB_REQ_SET_ADDRESS:
- if (req->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
- return true;
-
- return isp1760_udc_set_address(udc, le16_to_cpu(req->wValue));
-
- case USB_REQ_SET_CONFIGURATION:
- if (req->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
- return true;
-
- if (udc->gadget.state != USB_STATE_ADDRESS &&
- udc->gadget.state != USB_STATE_CONFIGURED)
- return true;
-
- stall = udc->driver->setup(&udc->gadget, req) < 0;
- if (stall)
- return true;
-
- usb_gadget_set_state(&udc->gadget, req->wValue ?
- USB_STATE_CONFIGURED : USB_STATE_ADDRESS);
-
- /*
- * SET_CONFIGURATION (and SET_INTERFACE) must reset the halt
- * feature on all endpoints. There is however no need to do so
- * explicitly here as the gadget driver will disable and
- * reenable endpoints, clearing the halt feature.
- */
- return false;
-
- default:
- return udc->driver->setup(&udc->gadget, req) < 0;
- }
-}
-
-static void isp1760_ep0_setup(struct isp1760_udc *udc)
-{
- union {
- struct usb_ctrlrequest r;
- u32 data[2];
- } req;
- unsigned int count;
- bool stall = false;
-
- spin_lock(&udc->lock);
-
- isp1760_udc_write(udc, DC_EPINDEX, DC_EP0SETUP);
-
- count = isp1760_udc_read(udc, DC_BUFLEN) & DC_DATACOUNT_MASK;
- if (count != sizeof(req)) {
- spin_unlock(&udc->lock);
-
- dev_err(udc->isp->dev, "invalid length %u for setup packet\n",
- count);
-
- isp1760_udc_ctrl_send_stall(&udc->ep[0]);
- return;
- }
-
- req.data[0] = isp1760_udc_read(udc, DC_DATAPORT);
- req.data[1] = isp1760_udc_read(udc, DC_DATAPORT);
-
- if (udc->ep0_state != ISP1760_CTRL_SETUP) {
- spin_unlock(&udc->lock);
- dev_dbg(udc->isp->dev, "unexpected SETUP packet\n");
- return;
- }
-
- /* Move to the data stage. */
- if (!req.r.wLength)
- udc->ep0_state = ISP1760_CTRL_STATUS;
- else if (req.r.bRequestType & USB_DIR_IN)
- udc->ep0_state = ISP1760_CTRL_DATA_IN;
- else
- udc->ep0_state = ISP1760_CTRL_DATA_OUT;
-
- udc->ep0_dir = req.r.bRequestType & USB_DIR_IN;
- udc->ep0_length = le16_to_cpu(req.r.wLength);
-
- spin_unlock(&udc->lock);
-
- dev_dbg(udc->isp->dev,
- "%s: bRequestType 0x%02x bRequest 0x%02x wValue 0x%04x wIndex 0x%04x wLength 0x%04x\n",
- __func__, req.r.bRequestType, req.r.bRequest,
- le16_to_cpu(req.r.wValue), le16_to_cpu(req.r.wIndex),
- le16_to_cpu(req.r.wLength));
-
- if ((req.r.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
- stall = isp1760_ep0_setup_standard(udc, &req.r);
- else
- stall = udc->driver->setup(&udc->gadget, &req.r) < 0;
-
- if (stall)
- isp1760_udc_ctrl_send_stall(&udc->ep[0]);
-}
-
-/* -----------------------------------------------------------------------------
- * Gadget Endpoint Operations
- */
-
-static int isp1760_ep_enable(struct usb_ep *ep,
- const struct usb_endpoint_descriptor *desc)
-{
- struct isp1760_ep *uep = ep_to_udc_ep(ep);
- struct isp1760_udc *udc = uep->udc;
- unsigned long flags;
- unsigned int type;
-
- dev_dbg(uep->udc->isp->dev, "%s\n", __func__);
-
- /*
- * Validate the descriptor. The control endpoint can't be enabled
- * manually.
- */
- if (desc->bDescriptorType != USB_DT_ENDPOINT ||
- desc->bEndpointAddress == 0 ||
- desc->bEndpointAddress != uep->addr ||
- le16_to_cpu(desc->wMaxPacketSize) > ep->maxpacket) {
- dev_dbg(udc->isp->dev,
- "%s: invalid descriptor type %u addr %02x ep addr %02x max packet size %u/%u\n",
- __func__, desc->bDescriptorType,
- desc->bEndpointAddress, uep->addr,
- le16_to_cpu(desc->wMaxPacketSize), ep->maxpacket);
- return -EINVAL;
- }
-
- switch (usb_endpoint_type(desc)) {
- case USB_ENDPOINT_XFER_ISOC:
- type = DC_ENDPTYP_ISOC;
- break;
- case USB_ENDPOINT_XFER_BULK:
- type = DC_ENDPTYP_BULK;
- break;
- case USB_ENDPOINT_XFER_INT:
- type = DC_ENDPTYP_INTERRUPT;
- break;
- case USB_ENDPOINT_XFER_CONTROL:
- default:
- dev_dbg(udc->isp->dev, "%s: control endpoints unsupported\n",
- __func__);
- return -EINVAL;
- }
-
- spin_lock_irqsave(&udc->lock, flags);
-
- uep->desc = desc;
- uep->maxpacket = le16_to_cpu(desc->wMaxPacketSize);
- uep->rx_pending = false;
- uep->halted = false;
- uep->wedged = false;
-
- isp1760_udc_select_ep(uep);
- isp1760_udc_write(udc, DC_EPMAXPKTSZ, uep->maxpacket);
- isp1760_udc_write(udc, DC_BUFLEN, uep->maxpacket);
- isp1760_udc_write(udc, DC_EPTYPE, DC_EPENABLE | type);
-
- spin_unlock_irqrestore(&udc->lock, flags);
-
- return 0;
-}
-
-static int isp1760_ep_disable(struct usb_ep *ep)
-{
- struct isp1760_ep *uep = ep_to_udc_ep(ep);
- struct isp1760_udc *udc = uep->udc;
- struct isp1760_request *req, *nreq;
- LIST_HEAD(req_list);
- unsigned long flags;
-
- dev_dbg(udc->isp->dev, "%s\n", __func__);
-
- spin_lock_irqsave(&udc->lock, flags);
-
- if (!uep->desc) {
- dev_dbg(udc->isp->dev, "%s: endpoint not enabled\n", __func__);
- spin_unlock_irqrestore(&udc->lock, flags);
- return -EINVAL;
- }
-
- uep->desc = NULL;
- uep->maxpacket = 0;
-
- isp1760_udc_select_ep(uep);
- isp1760_udc_write(udc, DC_EPTYPE, 0);
-
- /* TODO Synchronize with the IRQ handler */
-
- list_splice_init(&uep->queue, &req_list);
-
- spin_unlock_irqrestore(&udc->lock, flags);
-
- list_for_each_entry_safe(req, nreq, &req_list, queue) {
- list_del(&req->queue);
- isp1760_udc_request_complete(uep, req, -ESHUTDOWN);
- }
-
- return 0;
-}
-
-static struct usb_request *isp1760_ep_alloc_request(struct usb_ep *ep,
- gfp_t gfp_flags)
-{
- struct isp1760_request *req;
-
- req = kzalloc(sizeof(*req), gfp_flags);
-
- return &req->req;
-}
-
-static void isp1760_ep_free_request(struct usb_ep *ep, struct usb_request *_req)
-{
- struct isp1760_request *req = req_to_udc_req(_req);
-
- kfree(req);
-}
-
-static int isp1760_ep_queue(struct usb_ep *ep, struct usb_request *_req,
- gfp_t gfp_flags)
-{
- struct isp1760_request *req = req_to_udc_req(_req);
- struct isp1760_ep *uep = ep_to_udc_ep(ep);
- struct isp1760_udc *udc = uep->udc;
- bool complete = false;
- unsigned long flags;
- int ret = 0;
-
- _req->status = -EINPROGRESS;
- _req->actual = 0;
-
- spin_lock_irqsave(&udc->lock, flags);
-
- dev_dbg(udc->isp->dev,
- "%s: req %p (%u bytes%s) ep %p(0x%02x)\n", __func__, _req,
- _req->length, _req->zero ? " (zlp)" : "", uep, uep->addr);
-
- req->ep = uep;
-
- if (uep->addr == 0) {
- if (_req->length != udc->ep0_length &&
- udc->ep0_state != ISP1760_CTRL_DATA_IN) {
- dev_dbg(udc->isp->dev,
- "%s: invalid length %u for req %p\n",
- __func__, _req->length, req);
- ret = -EINVAL;
- goto done;
- }
-
- switch (udc->ep0_state) {
- case ISP1760_CTRL_DATA_IN:
- dev_dbg(udc->isp->dev, "%s: transmitting req %p\n",
- __func__, req);
-
- list_add_tail(&req->queue, &uep->queue);
- isp1760_udc_transmit(uep, req);
- break;
-
- case ISP1760_CTRL_DATA_OUT:
- list_add_tail(&req->queue, &uep->queue);
- __isp1760_udc_select_ep(uep, USB_DIR_OUT);
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN);
- break;
-
- case ISP1760_CTRL_STATUS:
- complete = true;
- break;
-
- default:
- dev_dbg(udc->isp->dev, "%s: invalid ep0 state\n",
- __func__);
- ret = -EINVAL;
- break;
- }
- } else if (uep->desc) {
- bool empty = list_empty(&uep->queue);
-
- list_add_tail(&req->queue, &uep->queue);
- if ((uep->addr & USB_DIR_IN) && !uep->halted && empty)
- isp1760_udc_transmit(uep, req);
- else if (!(uep->addr & USB_DIR_IN) && uep->rx_pending)
- complete = isp1760_udc_receive(uep, req);
- } else {
- dev_dbg(udc->isp->dev,
- "%s: can't queue request to disabled ep%02x\n",
- __func__, uep->addr);
- ret = -ESHUTDOWN;
- }
-
-done:
- if (ret < 0)
- req->ep = NULL;
-
- spin_unlock_irqrestore(&udc->lock, flags);
-
- if (complete)
- isp1760_udc_request_complete(uep, req, 0);
-
- return ret;
-}
-
-static int isp1760_ep_dequeue(struct usb_ep *ep, struct usb_request *_req)
-{
- struct isp1760_request *req = req_to_udc_req(_req);
- struct isp1760_ep *uep = ep_to_udc_ep(ep);
- struct isp1760_udc *udc = uep->udc;
- unsigned long flags;
-
- dev_dbg(uep->udc->isp->dev, "%s(ep%02x)\n", __func__, uep->addr);
-
- spin_lock_irqsave(&udc->lock, flags);
-
- if (req->ep != uep)
- req = NULL;
- else
- list_del(&req->queue);
-
- spin_unlock_irqrestore(&udc->lock, flags);
-
- if (!req)
- return -EINVAL;
-
- isp1760_udc_request_complete(uep, req, -ECONNRESET);
- return 0;
-}
-
-static int __isp1760_ep_set_halt(struct isp1760_ep *uep, bool stall, bool wedge)
-{
- struct isp1760_udc *udc = uep->udc;
- int ret;
-
- if (!uep->addr) {
- /*
- * Halting the control endpoint is only valid as a delayed error
- * response to a SETUP packet. Make sure EP0 is in the right
- * stage and that the gadget isn't trying to clear the halt
- * condition.
- */
- if (WARN_ON(udc->ep0_state == ISP1760_CTRL_SETUP || !stall ||
- wedge)) {
- return -EINVAL;
- }
- }
-
- if (uep->addr && !uep->desc) {
- dev_dbg(udc->isp->dev, "%s: ep%02x is disabled\n", __func__,
- uep->addr);
- return -EINVAL;
- }
-
- if (uep->addr & USB_DIR_IN) {
- /* Refuse to halt IN endpoints with active transfers. */
- if (!list_empty(&uep->queue)) {
- dev_dbg(udc->isp->dev,
- "%s: ep%02x has request pending\n", __func__,
- uep->addr);
- return -EAGAIN;
- }
- }
-
- ret = __isp1760_udc_set_halt(uep, stall);
- if (ret < 0)
- return ret;
-
- if (!uep->addr) {
- /*
- * Stalling EP0 completes the control transaction, move back to
- * the SETUP state.
- */
- udc->ep0_state = ISP1760_CTRL_SETUP;
- return 0;
- }
-
- if (wedge)
- uep->wedged = true;
- else if (!stall)
- uep->wedged = false;
-
- return 0;
-}
-
-static int isp1760_ep_set_halt(struct usb_ep *ep, int value)
-{
- struct isp1760_ep *uep = ep_to_udc_ep(ep);
- unsigned long flags;
- int ret;
-
- dev_dbg(uep->udc->isp->dev, "%s: %s halt on ep%02x\n", __func__,
- value ? "set" : "clear", uep->addr);
-
- spin_lock_irqsave(&uep->udc->lock, flags);
- ret = __isp1760_ep_set_halt(uep, value, false);
- spin_unlock_irqrestore(&uep->udc->lock, flags);
-
- return ret;
-}
-
-static int isp1760_ep_set_wedge(struct usb_ep *ep)
-{
- struct isp1760_ep *uep = ep_to_udc_ep(ep);
- unsigned long flags;
- int ret;
-
- dev_dbg(uep->udc->isp->dev, "%s: set wedge on ep%02x)\n", __func__,
- uep->addr);
-
- spin_lock_irqsave(&uep->udc->lock, flags);
- ret = __isp1760_ep_set_halt(uep, true, true);
- spin_unlock_irqrestore(&uep->udc->lock, flags);
-
- return ret;
-}
-
-static void isp1760_ep_fifo_flush(struct usb_ep *ep)
-{
- struct isp1760_ep *uep = ep_to_udc_ep(ep);
- struct isp1760_udc *udc = uep->udc;
- unsigned long flags;
-
- spin_lock_irqsave(&udc->lock, flags);
-
- isp1760_udc_select_ep(uep);
-
- /*
- * Set the CLBUF bit twice to flush both buffers in case double
- * buffering is enabled.
- */
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF);
- isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF);
-
- spin_unlock_irqrestore(&udc->lock, flags);
-}
-
-static const struct usb_ep_ops isp1760_ep_ops = {
- .enable = isp1760_ep_enable,
- .disable = isp1760_ep_disable,
- .alloc_request = isp1760_ep_alloc_request,
- .free_request = isp1760_ep_free_request,
- .queue = isp1760_ep_queue,
- .dequeue = isp1760_ep_dequeue,
- .set_halt = isp1760_ep_set_halt,
- .set_wedge = isp1760_ep_set_wedge,
- .fifo_flush = isp1760_ep_fifo_flush,
-};
-
-/* -----------------------------------------------------------------------------
- * Device States
- */
-
-/* Called with the UDC spinlock held. */
-static void isp1760_udc_connect(struct isp1760_udc *udc)
-{
- usb_gadget_set_state(&udc->gadget, USB_STATE_POWERED);
- mod_timer(&udc->vbus_timer, jiffies + ISP1760_VBUS_POLL_INTERVAL);
-}
-
-/* Called with the UDC spinlock held. */
-static void isp1760_udc_disconnect(struct isp1760_udc *udc)
-{
- if (udc->gadget.state < USB_STATE_POWERED)
- return;
-
- dev_dbg(udc->isp->dev, "Device disconnected in state %u\n",
- udc->gadget.state);
-
- udc->gadget.speed = USB_SPEED_UNKNOWN;
- usb_gadget_set_state(&udc->gadget, USB_STATE_ATTACHED);
-
- if (udc->driver->disconnect)
- udc->driver->disconnect(&udc->gadget);
-
- del_timer(&udc->vbus_timer);
-
- /* TODO Reset all endpoints ? */
-}
-
-static void isp1760_udc_init_hw(struct isp1760_udc *udc)
-{
- /*
- * The device controller currently shares its interrupt with the host
- * controller, the DC_IRQ polarity and signaling mode are ignored. Set
- * the to active-low level-triggered.
- *
- * Configure the control, in and out pipes to generate interrupts on
- * ACK tokens only (and NYET for the out pipe). The default
- * configuration also generates an interrupt on the first NACK token.
- */
- isp1760_udc_write(udc, DC_INTCONF, DC_CDBGMOD_ACK | DC_DDBGMODIN_ACK |
- DC_DDBGMODOUT_ACK_NYET);
-
- isp1760_udc_write(udc, DC_INTENABLE, DC_IEPRXTX(7) | DC_IEPRXTX(6) |
- DC_IEPRXTX(5) | DC_IEPRXTX(4) | DC_IEPRXTX(3) |
- DC_IEPRXTX(2) | DC_IEPRXTX(1) | DC_IEPRXTX(0) |
- DC_IEP0SETUP | DC_IEVBUS | DC_IERESM | DC_IESUSP |
- DC_IEHS_STA | DC_IEBRST);
-
- if (udc->connected)
- isp1760_set_pullup(udc->isp, true);
-
- isp1760_udc_write(udc, DC_ADDRESS, DC_DEVEN);
-}
-
-static void isp1760_udc_reset(struct isp1760_udc *udc)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&udc->lock, flags);
-
- /*
- * The bus reset has reset most registers to their default value,
- * reinitialize the UDC hardware.
- */
- isp1760_udc_init_hw(udc);
-
- udc->ep0_state = ISP1760_CTRL_SETUP;
- udc->gadget.speed = USB_SPEED_FULL;
-
- usb_gadget_udc_reset(&udc->gadget, udc->driver);
-
- spin_unlock_irqrestore(&udc->lock, flags);
-}
-
-static void isp1760_udc_suspend(struct isp1760_udc *udc)
-{
- if (udc->gadget.state < USB_STATE_DEFAULT)
- return;
-
- if (udc->driver->suspend)
- udc->driver->suspend(&udc->gadget);
-}
-
-static void isp1760_udc_resume(struct isp1760_udc *udc)
-{
- if (udc->gadget.state < USB_STATE_DEFAULT)
- return;
-
- if (udc->driver->resume)
- udc->driver->resume(&udc->gadget);
-}
-
-/* -----------------------------------------------------------------------------
- * Gadget Operations
- */
-
-static int isp1760_udc_get_frame(struct usb_gadget *gadget)
-{
- struct isp1760_udc *udc = gadget_to_udc(gadget);
-
- return isp1760_udc_read(udc, DC_FRAMENUM) & ((1 << 11) - 1);
-}
-
-static int isp1760_udc_wakeup(struct usb_gadget *gadget)
-{
- struct isp1760_udc *udc = gadget_to_udc(gadget);
-
- dev_dbg(udc->isp->dev, "%s\n", __func__);
- return -ENOTSUPP;
-}
-
-static int isp1760_udc_set_selfpowered(struct usb_gadget *gadget,
- int is_selfpowered)
-{
- struct isp1760_udc *udc = gadget_to_udc(gadget);
-
- if (is_selfpowered)
- udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
- else
- udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
-
- return 0;
-}
-
-static int isp1760_udc_pullup(struct usb_gadget *gadget, int is_on)
-{
- struct isp1760_udc *udc = gadget_to_udc(gadget);
-
- isp1760_set_pullup(udc->isp, is_on);
- udc->connected = is_on;
-
- return 0;
-}
-
-static int isp1760_udc_start(struct usb_gadget *gadget,
- struct usb_gadget_driver *driver)
-{
- struct isp1760_udc *udc = gadget_to_udc(gadget);
-
- /* The hardware doesn't support low speed. */
- if (driver->max_speed < USB_SPEED_FULL) {
- dev_err(udc->isp->dev, "Invalid gadget driver\n");
- return -EINVAL;
- }
-
- spin_lock(&udc->lock);
-
- if (udc->driver) {
- dev_err(udc->isp->dev, "UDC already has a gadget driver\n");
- spin_unlock(&udc->lock);
- return -EBUSY;
- }
-
- udc->driver = driver;
-
- spin_unlock(&udc->lock);
-
- dev_dbg(udc->isp->dev, "starting UDC with driver %s\n",
- driver->function);
-
- udc->devstatus = 0;
- udc->connected = true;
-
- usb_gadget_set_state(&udc->gadget, USB_STATE_ATTACHED);
-
- /* DMA isn't supported yet, don't enable the DMA clock. */
- isp1760_udc_write(udc, DC_MODE, DC_GLINTENA);
-
- isp1760_udc_init_hw(udc);
-
- dev_dbg(udc->isp->dev, "UDC started with driver %s\n",
- driver->function);
-
- return 0;
-}
-
-static int isp1760_udc_stop(struct usb_gadget *gadget)
-{
- struct isp1760_udc *udc = gadget_to_udc(gadget);
-
- dev_dbg(udc->isp->dev, "%s\n", __func__);
-
- del_timer_sync(&udc->vbus_timer);
-
- isp1760_udc_write(udc, DC_MODE, 0);
-
- spin_lock(&udc->lock);
- udc->driver = NULL;
- spin_unlock(&udc->lock);
-
- return 0;
-}
-
-static struct usb_gadget_ops isp1760_udc_ops = {
- .get_frame = isp1760_udc_get_frame,
- .wakeup = isp1760_udc_wakeup,
- .set_selfpowered = isp1760_udc_set_selfpowered,
- .pullup = isp1760_udc_pullup,
- .udc_start = isp1760_udc_start,
- .udc_stop = isp1760_udc_stop,
-};
-
-/* -----------------------------------------------------------------------------
- * Interrupt Handling
- */
-
-static irqreturn_t isp1760_udc_irq(int irq, void *dev)
-{
- struct isp1760_udc *udc = dev;
- unsigned int i;
- u32 status;
-
- status = isp1760_udc_read(udc, DC_INTERRUPT)
- & isp1760_udc_read(udc, DC_INTENABLE);
- isp1760_udc_write(udc, DC_INTERRUPT, status);
-
- if (status & DC_IEVBUS) {
- dev_dbg(udc->isp->dev, "%s(VBUS)\n", __func__);
- /* The VBUS interrupt is only triggered when VBUS appears. */
- spin_lock(&udc->lock);
- isp1760_udc_connect(udc);
- spin_unlock(&udc->lock);
- }
-
- if (status & DC_IEBRST) {
- dev_dbg(udc->isp->dev, "%s(BRST)\n", __func__);
-
- isp1760_udc_reset(udc);
- }
-
- for (i = 0; i <= 7; ++i) {
- struct isp1760_ep *ep = &udc->ep[i*2];
-
- if (status & DC_IEPTX(i)) {
- dev_dbg(udc->isp->dev, "%s(EPTX%u)\n", __func__, i);
- isp1760_ep_tx_complete(ep);
- }
-
- if (status & DC_IEPRX(i)) {
- dev_dbg(udc->isp->dev, "%s(EPRX%u)\n", __func__, i);
- isp1760_ep_rx_ready(i ? ep - 1 : ep);
- }
- }
-
- if (status & DC_IEP0SETUP) {
- dev_dbg(udc->isp->dev, "%s(EP0SETUP)\n", __func__);
-
- isp1760_ep0_setup(udc);
- }
-
- if (status & DC_IERESM) {
- dev_dbg(udc->isp->dev, "%s(RESM)\n", __func__);
- isp1760_udc_resume(udc);
- }
-
- if (status & DC_IESUSP) {
- dev_dbg(udc->isp->dev, "%s(SUSP)\n", __func__);
-
- spin_lock(&udc->lock);
- if (!(isp1760_udc_read(udc, DC_MODE) & DC_VBUSSTAT))
- isp1760_udc_disconnect(udc);
- else
- isp1760_udc_suspend(udc);
- spin_unlock(&udc->lock);
- }
-
- if (status & DC_IEHS_STA) {
- dev_dbg(udc->isp->dev, "%s(HS_STA)\n", __func__);
- udc->gadget.speed = USB_SPEED_HIGH;
- }
-
- return status ? IRQ_HANDLED : IRQ_NONE;
-}
-
-static void isp1760_udc_vbus_poll(unsigned long data)
-{
- struct isp1760_udc *udc = (struct isp1760_udc *)data;
- unsigned long flags;
-
- spin_lock_irqsave(&udc->lock, flags);
-
- if (!(isp1760_udc_read(udc, DC_MODE) & DC_VBUSSTAT))
- isp1760_udc_disconnect(udc);
- else if (udc->gadget.state >= USB_STATE_POWERED)
- mod_timer(&udc->vbus_timer,
- jiffies + ISP1760_VBUS_POLL_INTERVAL);
-
- spin_unlock_irqrestore(&udc->lock, flags);
-}
-
-/* -----------------------------------------------------------------------------
- * Registration
- */
-
-static void isp1760_udc_init_eps(struct isp1760_udc *udc)
-{
- unsigned int i;
-
- INIT_LIST_HEAD(&udc->gadget.ep_list);
-
- for (i = 0; i < ARRAY_SIZE(udc->ep); ++i) {
- struct isp1760_ep *ep = &udc->ep[i];
- unsigned int ep_num = (i + 1) / 2;
- bool is_in = !(i & 1);
-
- ep->udc = udc;
-
- INIT_LIST_HEAD(&ep->queue);
-
- ep->addr = (ep_num && is_in ? USB_DIR_IN : USB_DIR_OUT)
- | ep_num;
- ep->desc = NULL;
-
- sprintf(ep->name, "ep%u%s", ep_num,
- ep_num ? (is_in ? "in" : "out") : "");
-
- ep->ep.ops = &isp1760_ep_ops;
- ep->ep.name = ep->name;
-
- /*
- * Hardcode the maximum packet sizes for now, to 64 bytes for
- * the control endpoint and 512 bytes for all other endpoints.
- * This fits in the 8kB FIFO without double-buffering.
- */
- if (ep_num == 0) {
- ep->ep.maxpacket = 64;
- ep->maxpacket = 64;
- udc->gadget.ep0 = &ep->ep;
- } else {
- ep->ep.maxpacket = 512;
- ep->maxpacket = 0;
- list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
- }
- }
-}
-
-static int isp1760_udc_init(struct isp1760_udc *udc)
-{
- u16 scratch;
- u32 chipid;
-
- /*
- * Check that the controller is present by writing to the scratch
- * register, modifying the bus pattern by reading from the chip ID
- * register, and reading the scratch register value back. The chip ID
- * and scratch register contents must match the expected values.
- */
- isp1760_udc_write(udc, DC_SCRATCH, 0xbabe);
- chipid = isp1760_udc_read(udc, DC_CHIPID);
- scratch = isp1760_udc_read(udc, DC_SCRATCH);
-
- if (scratch != 0xbabe) {
- dev_err(udc->isp->dev,
- "udc: scratch test failed (0x%04x/0x%08x)\n",
- scratch, chipid);
- return -ENODEV;
- }
-
- if (chipid != 0x00011582) {
- dev_err(udc->isp->dev, "udc: invalid chip ID 0x%08x\n", chipid);
- return -ENODEV;
- }
-
- /* Reset the device controller. */
- isp1760_udc_write(udc, DC_MODE, DC_SFRESET);
- usleep_range(10000, 11000);
- isp1760_udc_write(udc, DC_MODE, 0);
- usleep_range(10000, 11000);
-
- return 0;
-}
-
-int isp1760_udc_register(struct isp1760_device *isp, int irq,
- unsigned long irqflags)
-{
- struct isp1760_udc *udc = &isp->udc;
- const char *devname;
- int ret;
-
- udc->irq = -1;
- udc->isp = isp;
- udc->regs = isp->regs;
-
- spin_lock_init(&udc->lock);
- setup_timer(&udc->vbus_timer, isp1760_udc_vbus_poll,
- (unsigned long)udc);
-
- ret = isp1760_udc_init(udc);
- if (ret < 0)
- return ret;
-
- devname = dev_name(isp->dev);
- udc->irqname = kmalloc(strlen(devname) + 7, GFP_KERNEL);
- if (!udc->irqname)
- return -ENOMEM;
-
- sprintf(udc->irqname, "%s (udc)", devname);
-
- ret = request_irq(irq, isp1760_udc_irq, IRQF_SHARED | IRQF_DISABLED |
- irqflags, udc->irqname, udc);
- if (ret < 0)
- goto error;
-
- udc->irq = irq;
-
- /*
- * Initialize the gadget static fields and register its device. Gadget
- * fields that vary during the life time of the gadget are initialized
- * by the UDC core.
- */
- udc->gadget.ops = &isp1760_udc_ops;
- udc->gadget.speed = USB_SPEED_UNKNOWN;
- udc->gadget.max_speed = USB_SPEED_HIGH;
- udc->gadget.name = "isp1761_udc";
-
- isp1760_udc_init_eps(udc);
-
- ret = usb_add_gadget_udc(isp->dev, &udc->gadget);
- if (ret < 0)
- goto error;
-
- return 0;
-
-error:
- if (udc->irq >= 0)
- free_irq(udc->irq, udc);
- kfree(udc->irqname);
-
- return ret;
-}
-
-void isp1760_udc_unregister(struct isp1760_device *isp)
-{
- struct isp1760_udc *udc = &isp->udc;
-
- usb_del_gadget_udc(&udc->gadget);
-
- free_irq(udc->irq, udc);
- kfree(udc->irqname);
-}
+++ /dev/null
-/*
- * Driver for the NXP ISP1761 device controller
- *
- * Copyright 2014 Ideas on Board Oy
- *
- * Contacts:
- * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- */
-
-#ifndef _ISP1760_UDC_H_
-#define _ISP1760_UDC_H_
-
-#include <linux/ioport.h>
-#include <linux/list.h>
-#include <linux/spinlock.h>
-#include <linux/timer.h>
-#include <linux/usb/gadget.h>
-
-struct isp1760_device;
-struct isp1760_udc;
-
-enum isp1760_ctrl_state {
- ISP1760_CTRL_SETUP, /* Waiting for a SETUP transaction */
- ISP1760_CTRL_DATA_IN, /* Setup received, data IN stage */
- ISP1760_CTRL_DATA_OUT, /* Setup received, data OUT stage */
- ISP1760_CTRL_STATUS, /* 0-length request in status stage */
-};
-
-struct isp1760_ep {
- struct isp1760_udc *udc;
- struct usb_ep ep;
-
- struct list_head queue;
-
- unsigned int addr;
- unsigned int maxpacket;
- char name[7];
-
- const struct usb_endpoint_descriptor *desc;
-
- bool rx_pending;
- bool halted;
- bool wedged;
-};
-
-/**
- * struct isp1760_udc - UDC state information
- * irq: IRQ number
- * irqname: IRQ name (as passed to request_irq)
- * regs: Base address of the UDC registers
- * driver: Gadget driver
- * gadget: Gadget device
- * lock: Protects driver, vbus_timer, ep, ep0_*, DC_EPINDEX register
- * ep: Array of endpoints
- * ep0_state: Control request state for endpoint 0
- * ep0_dir: Direction of the current control request
- * ep0_length: Length of the current control request
- * connected: Tracks gadget driver bus connection state
- */
-struct isp1760_udc {
-#if CONFIG_USB_ISP1761_UDC
- struct isp1760_device *isp;
-
- int irq;
- char *irqname;
- void __iomem *regs;
-
- struct usb_gadget_driver *driver;
- struct usb_gadget gadget;
-
- spinlock_t lock;
- struct timer_list vbus_timer;
-
- struct isp1760_ep ep[15];
-
- enum isp1760_ctrl_state ep0_state;
- u8 ep0_dir;
- u16 ep0_length;
-
- bool connected;
-
- unsigned int devstatus;
-#endif
-};
-
-#if CONFIG_USB_ISP1761_UDC
-int isp1760_udc_register(struct isp1760_device *isp, int irq,
- unsigned long irqflags);
-void isp1760_udc_unregister(struct isp1760_device *isp);
-#else
-static inline int isp1760_udc_register(struct isp1760_device *isp, int irq,
- unsigned long irqflags)
-{
- return 0;
-}
-
-static inline void isp1760_udc_unregister(struct isp1760_device *isp)
-{
-}
-#endif
-
-#endif
--- /dev/null
+config USB_ISP1760
+ tristate "NXP ISP 1760/1761 support"
+ depends on USB
+ help
+ Say Y or M here if your system as an ISP1760 USB host controller
+ or an ISP1761 USB dual-role controller.
+
+ This driver does not support isochronous transfers or OTG.
+ This USB controller is usually attached to a non-DMA-Master
+ capable bus. NXP's eval kit brings this chip on PCI card
+ where the chip itself is behind a PLB to simulate such
+ a bus.
+
+ To compile this driver as a module, choose M here: the
+ module will be called isp1760.
+
+config USB_ISP1761_UDC
+ boolean "NXP ISP1761 USB Device Controller"
+ depends on USB_ISP1760 && USB_GADGET
+ help
+ The NXP ISP1761 is a dual-role high-speed USB host and device
+ controller.
--- /dev/null
+isp1760-y := isp1760-core.o isp1760-hcd.o isp1760-if.o
+isp1760-$(CONFIG_USB_ISP1761_UDC) += isp1760-udc.o
+
+obj-$(CONFIG_USB_ISP1760) += isp1760.o
--- /dev/null
+/*
+ * Driver for the NXP ISP1760 chip
+ *
+ * Copyright 2014 Laurent Pinchart
+ * Copyright 2007 Sebastian Siewior
+ *
+ * Contacts:
+ * Sebastian Siewior <bigeasy@linutronix.de>
+ * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/usb.h>
+
+#include "isp1760-core.h"
+#include "isp1760-hcd.h"
+#include "isp1760-regs.h"
+#include "isp1760-udc.h"
+
+static void isp1760_init_core(struct isp1760_device *isp)
+{
+ u32 otgctrl;
+ u32 hwmode;
+
+ /* Low-level chip reset */
+ if (isp->rst_gpio) {
+ gpiod_set_value_cansleep(isp->rst_gpio, 1);
+ mdelay(50);
+ gpiod_set_value_cansleep(isp->rst_gpio, 0);
+ }
+
+ /*
+ * Reset the host controller, including the CPU interface
+ * configuration.
+ */
+ isp1760_write32(isp->regs, HC_RESET_REG, SW_RESET_RESET_ALL);
+ msleep(100);
+
+ /* Setup HW Mode Control: This assumes a level active-low interrupt */
+ hwmode = HW_DATA_BUS_32BIT;
+
+ if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_16)
+ hwmode &= ~HW_DATA_BUS_32BIT;
+ if (isp->devflags & ISP1760_FLAG_ANALOG_OC)
+ hwmode |= HW_ANA_DIGI_OC;
+ if (isp->devflags & ISP1760_FLAG_DACK_POL_HIGH)
+ hwmode |= HW_DACK_POL_HIGH;
+ if (isp->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
+ hwmode |= HW_DREQ_POL_HIGH;
+ if (isp->devflags & ISP1760_FLAG_INTR_POL_HIGH)
+ hwmode |= HW_INTR_HIGH_ACT;
+ if (isp->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
+ hwmode |= HW_INTR_EDGE_TRIG;
+
+ /*
+ * The ISP1761 has a dedicated DC IRQ line but supports sharing the HC
+ * IRQ line for both the host and device controllers. Hardcode IRQ
+ * sharing for now and disable the DC interrupts globally to avoid
+ * spurious interrupts during HCD registration.
+ */
+ if (isp->devflags & ISP1760_FLAG_ISP1761) {
+ isp1760_write32(isp->regs, DC_MODE, 0);
+ hwmode |= HW_COMN_IRQ;
+ }
+
+ /*
+ * We have to set this first in case we're in 16-bit mode.
+ * Write it twice to ensure correct upper bits if switching
+ * to 16-bit mode.
+ */
+ isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode);
+ isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode);
+
+ /*
+ * PORT 1 Control register of the ISP1760 is the OTG control register
+ * on ISP1761.
+ *
+ * TODO: Really support OTG. For now we configure port 1 in device mode
+ * when OTG is requested.
+ */
+ if ((isp->devflags & ISP1760_FLAG_ISP1761) &&
+ (isp->devflags & ISP1760_FLAG_OTG_EN))
+ otgctrl = ((HW_DM_PULLDOWN | HW_DP_PULLDOWN) << 16)
+ | HW_OTG_DISABLE;
+ else
+ otgctrl = (HW_SW_SEL_HC_DC << 16)
+ | (HW_VBUS_DRV | HW_SEL_CP_EXT);
+
+ isp1760_write32(isp->regs, HC_PORT1_CTRL, otgctrl);
+
+ dev_info(isp->dev, "bus width: %u, oc: %s\n",
+ isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32,
+ isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital");
+}
+
+void isp1760_set_pullup(struct isp1760_device *isp, bool enable)
+{
+ isp1760_write32(isp->regs, HW_OTG_CTRL_SET,
+ enable ? HW_DP_PULLUP : HW_DP_PULLUP << 16);
+}
+
+int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
+ struct device *dev, unsigned int devflags)
+{
+ struct isp1760_device *isp;
+ int ret;
+
+ if (usb_disabled())
+ return -ENODEV;
+
+ /* prevent usb-core allocating DMA pages */
+ dev->dma_mask = NULL;
+
+ isp = devm_kzalloc(dev, sizeof(*isp), GFP_KERNEL);
+ if (!isp)
+ return -ENOMEM;
+
+ isp->dev = dev;
+ isp->devflags = devflags;
+
+ isp->rst_gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);
+ if (IS_ERR(isp->rst_gpio))
+ return PTR_ERR(isp->rst_gpio);
+
+ isp->regs = devm_ioremap_resource(dev, mem);
+ if (IS_ERR(isp->regs))
+ return PTR_ERR(isp->regs);
+
+ isp1760_init_core(isp);
+
+ ret = isp1760_hcd_register(&isp->hcd, isp->regs, mem, irq,
+ irqflags | IRQF_SHARED, dev);
+ if (ret < 0)
+ return ret;
+
+ if (devflags & ISP1760_FLAG_ISP1761) {
+ ret = isp1760_udc_register(isp, irq, irqflags | IRQF_SHARED |
+ IRQF_DISABLED);
+ if (ret < 0) {
+ isp1760_hcd_unregister(&isp->hcd);
+ return ret;
+ }
+ }
+
+ dev_set_drvdata(dev, isp);
+
+ return 0;
+}
+
+void isp1760_unregister(struct device *dev)
+{
+ struct isp1760_device *isp = dev_get_drvdata(dev);
+
+ if (isp->devflags & ISP1760_FLAG_ISP1761)
+ isp1760_udc_unregister(isp);
+
+ isp1760_hcd_unregister(&isp->hcd);
+}
+
+MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
+MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * Driver for the NXP ISP1760 chip
+ *
+ * Copyright 2014 Laurent Pinchart
+ * Copyright 2007 Sebastian Siewior
+ *
+ * Contacts:
+ * Sebastian Siewior <bigeasy@linutronix.de>
+ * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ */
+
+#ifndef _ISP1760_CORE_H_
+#define _ISP1760_CORE_H_
+
+#include <linux/ioport.h>
+
+#include "isp1760-hcd.h"
+#include "isp1760-udc.h"
+
+struct device;
+struct gpio_desc;
+
+/*
+ * Device flags that can vary from board to board. All of these
+ * indicate the most "atypical" case, so that a devflags of 0 is
+ * a sane default configuration.
+ */
+#define ISP1760_FLAG_BUS_WIDTH_16 0x00000002 /* 16-bit data bus width */
+#define ISP1760_FLAG_OTG_EN 0x00000004 /* Port 1 supports OTG */
+#define ISP1760_FLAG_ANALOG_OC 0x00000008 /* Analog overcurrent */
+#define ISP1760_FLAG_DACK_POL_HIGH 0x00000010 /* DACK active high */
+#define ISP1760_FLAG_DREQ_POL_HIGH 0x00000020 /* DREQ active high */
+#define ISP1760_FLAG_ISP1761 0x00000040 /* Chip is ISP1761 */
+#define ISP1760_FLAG_INTR_POL_HIGH 0x00000080 /* Interrupt polarity active high */
+#define ISP1760_FLAG_INTR_EDGE_TRIG 0x00000100 /* Interrupt edge triggered */
+
+struct isp1760_device {
+ struct device *dev;
+
+ void __iomem *regs;
+ unsigned int devflags;
+ struct gpio_desc *rst_gpio;
+
+ struct isp1760_hcd hcd;
+ struct isp1760_udc udc;
+};
+
+int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
+ struct device *dev, unsigned int devflags);
+void isp1760_unregister(struct device *dev);
+
+void isp1760_set_pullup(struct isp1760_device *isp, bool enable);
+
+static inline u32 isp1760_read32(void __iomem *base, u32 reg)
+{
+ return readl(base + reg);
+}
+
+static inline void isp1760_write32(void __iomem *base, u32 reg, u32 val)
+{
+ writel(val, base + reg);
+}
+
+#endif
--- /dev/null
+/*
+ * Driver for the NXP ISP1760 chip
+ *
+ * However, the code might contain some bugs. What doesn't work for sure is:
+ * - ISO
+ * - OTG
+ e The interrupt line is configured as active low, level.
+ *
+ * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
+ *
+ * (c) 2011 Arvid Brodin <arvid.brodin@enea.com>
+ *
+ */
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/usb.h>
+#include <linux/usb/hcd.h>
+#include <linux/debugfs.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/timer.h>
+#include <asm/unaligned.h>
+#include <asm/cacheflush.h>
+
+#include "isp1760-core.h"
+#include "isp1760-hcd.h"
+#include "isp1760-regs.h"
+
+static struct kmem_cache *qtd_cachep;
+static struct kmem_cache *qh_cachep;
+static struct kmem_cache *urb_listitem_cachep;
+
+typedef void (packet_enqueue)(struct usb_hcd *hcd, struct isp1760_qh *qh,
+ struct isp1760_qtd *qtd);
+
+static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
+{
+ return *(struct isp1760_hcd **)hcd->hcd_priv;
+}
+
+/* urb state*/
+#define DELETE_URB (0x0008)
+#define NO_TRANSFER_ACTIVE (0xffffffff)
+
+/* Philips Proprietary Transfer Descriptor (PTD) */
+typedef __u32 __bitwise __dw;
+struct ptd {
+ __dw dw0;
+ __dw dw1;
+ __dw dw2;
+ __dw dw3;
+ __dw dw4;
+ __dw dw5;
+ __dw dw6;
+ __dw dw7;
+};
+#define PTD_OFFSET 0x0400
+#define ISO_PTD_OFFSET 0x0400
+#define INT_PTD_OFFSET 0x0800
+#define ATL_PTD_OFFSET 0x0c00
+#define PAYLOAD_OFFSET 0x1000
+
+
+/* ATL */
+/* DW0 */
+#define DW0_VALID_BIT 1
+#define FROM_DW0_VALID(x) ((x) & 0x01)
+#define TO_DW0_LENGTH(x) (((u32) x) << 3)
+#define TO_DW0_MAXPACKET(x) (((u32) x) << 18)
+#define TO_DW0_MULTI(x) (((u32) x) << 29)
+#define TO_DW0_ENDPOINT(x) (((u32) x) << 31)
+/* DW1 */
+#define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3)
+#define TO_DW1_PID_TOKEN(x) (((u32) x) << 10)
+#define DW1_TRANS_BULK ((u32) 2 << 12)
+#define DW1_TRANS_INT ((u32) 3 << 12)
+#define DW1_TRANS_SPLIT ((u32) 1 << 14)
+#define DW1_SE_USB_LOSPEED ((u32) 2 << 16)
+#define TO_DW1_PORT_NUM(x) (((u32) x) << 18)
+#define TO_DW1_HUB_NUM(x) (((u32) x) << 25)
+/* DW2 */
+#define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8)
+#define TO_DW2_RL(x) ((x) << 25)
+#define FROM_DW2_RL(x) (((x) >> 25) & 0xf)
+/* DW3 */
+#define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff)
+#define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff)
+#define TO_DW3_NAKCOUNT(x) ((x) << 19)
+#define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf)
+#define TO_DW3_CERR(x) ((x) << 23)
+#define FROM_DW3_CERR(x) (((x) >> 23) & 0x3)
+#define TO_DW3_DATA_TOGGLE(x) ((x) << 25)
+#define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1)
+#define TO_DW3_PING(x) ((x) << 26)
+#define FROM_DW3_PING(x) (((x) >> 26) & 0x1)
+#define DW3_ERROR_BIT (1 << 28)
+#define DW3_BABBLE_BIT (1 << 29)
+#define DW3_HALT_BIT (1 << 30)
+#define DW3_ACTIVE_BIT (1 << 31)
+#define FROM_DW3_ACTIVE(x) (((x) >> 31) & 0x01)
+
+#define INT_UNDERRUN (1 << 2)
+#define INT_BABBLE (1 << 1)
+#define INT_EXACT (1 << 0)
+
+#define SETUP_PID (2)
+#define IN_PID (1)
+#define OUT_PID (0)
+
+/* Errata 1 */
+#define RL_COUNTER (0)
+#define NAK_COUNTER (0)
+#define ERR_COUNTER (2)
+
+struct isp1760_qtd {
+ u8 packet_type;
+ void *data_buffer;
+ u32 payload_addr;
+
+ /* the rest is HCD-private */
+ struct list_head qtd_list;
+ struct urb *urb;
+ size_t length;
+ size_t actual_length;
+
+ /* QTD_ENQUEUED: waiting for transfer (inactive) */
+ /* QTD_PAYLOAD_ALLOC: chip mem has been allocated for payload */
+ /* QTD_XFER_STARTED: valid ptd has been written to isp176x - only
+ interrupt handler may touch this qtd! */
+ /* QTD_XFER_COMPLETE: payload has been transferred successfully */
+ /* QTD_RETIRE: transfer error/abort qtd */
+#define QTD_ENQUEUED 0
+#define QTD_PAYLOAD_ALLOC 1
+#define QTD_XFER_STARTED 2
+#define QTD_XFER_COMPLETE 3
+#define QTD_RETIRE 4
+ u32 status;
+};
+
+/* Queue head, one for each active endpoint */
+struct isp1760_qh {
+ struct list_head qh_list;
+ struct list_head qtd_list;
+ u32 toggle;
+ u32 ping;
+ int slot;
+ int tt_buffer_dirty; /* See USB2.0 spec section 11.17.5 */
+};
+
+struct urb_listitem {
+ struct list_head urb_list;
+ struct urb *urb;
+};
+
+/*
+ * Access functions for isp176x registers (addresses 0..0x03FF).
+ */
+static u32 reg_read32(void __iomem *base, u32 reg)
+{
+ return isp1760_read32(base, reg);
+}
+
+static void reg_write32(void __iomem *base, u32 reg, u32 val)
+{
+ isp1760_write32(base, reg, val);
+}
+
+/*
+ * Access functions for isp176x memory (offset >= 0x0400).
+ *
+ * bank_reads8() reads memory locations prefetched by an earlier write to
+ * HC_MEMORY_REG (see isp176x datasheet). Unless you want to do fancy multi-
+ * bank optimizations, you should use the more generic mem_reads8() below.
+ *
+ * For access to ptd memory, use the specialized ptd_read() and ptd_write()
+ * below.
+ *
+ * These functions copy via MMIO data to/from the device. memcpy_{to|from}io()
+ * doesn't quite work because some people have to enforce 32-bit access
+ */
+static void bank_reads8(void __iomem *src_base, u32 src_offset, u32 bank_addr,
+ __u32 *dst, u32 bytes)
+{
+ __u32 __iomem *src;
+ u32 val;
+ __u8 *src_byteptr;
+ __u8 *dst_byteptr;
+
+ src = src_base + (bank_addr | src_offset);
+
+ if (src_offset < PAYLOAD_OFFSET) {
+ while (bytes >= 4) {
+ *dst = le32_to_cpu(__raw_readl(src));
+ bytes -= 4;
+ src++;
+ dst++;
+ }
+ } else {
+ while (bytes >= 4) {
+ *dst = __raw_readl(src);
+ bytes -= 4;
+ src++;
+ dst++;
+ }
+ }
+
+ if (!bytes)
+ return;
+
+ /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
+ * allocated.
+ */
+ if (src_offset < PAYLOAD_OFFSET)
+ val = le32_to_cpu(__raw_readl(src));
+ else
+ val = __raw_readl(src);
+
+ dst_byteptr = (void *) dst;
+ src_byteptr = (void *) &val;
+ while (bytes > 0) {
+ *dst_byteptr = *src_byteptr;
+ dst_byteptr++;
+ src_byteptr++;
+ bytes--;
+ }
+}
+
+static void mem_reads8(void __iomem *src_base, u32 src_offset, void *dst,
+ u32 bytes)
+{
+ reg_write32(src_base, HC_MEMORY_REG, src_offset + ISP_BANK(0));
+ ndelay(90);
+ bank_reads8(src_base, src_offset, ISP_BANK(0), dst, bytes);
+}
+
+static void mem_writes8(void __iomem *dst_base, u32 dst_offset,
+ __u32 const *src, u32 bytes)
+{
+ __u32 __iomem *dst;
+
+ dst = dst_base + dst_offset;
+
+ if (dst_offset < PAYLOAD_OFFSET) {
+ while (bytes >= 4) {
+ __raw_writel(cpu_to_le32(*src), dst);
+ bytes -= 4;
+ src++;
+ dst++;
+ }
+ } else {
+ while (bytes >= 4) {
+ __raw_writel(*src, dst);
+ bytes -= 4;
+ src++;
+ dst++;
+ }
+ }
+
+ if (!bytes)
+ return;
+ /* in case we have 3, 2 or 1 bytes left. The buffer is allocated and the
+ * extra bytes should not be read by the HW.
+ */
+
+ if (dst_offset < PAYLOAD_OFFSET)
+ __raw_writel(cpu_to_le32(*src), dst);
+ else
+ __raw_writel(*src, dst);
+}
+
+/*
+ * Read and write ptds. 'ptd_offset' should be one of ISO_PTD_OFFSET,
+ * INT_PTD_OFFSET, and ATL_PTD_OFFSET. 'slot' should be less than 32.
+ */
+static void ptd_read(void __iomem *base, u32 ptd_offset, u32 slot,
+ struct ptd *ptd)
+{
+ reg_write32(base, HC_MEMORY_REG,
+ ISP_BANK(0) + ptd_offset + slot*sizeof(*ptd));
+ ndelay(90);
+ bank_reads8(base, ptd_offset + slot*sizeof(*ptd), ISP_BANK(0),
+ (void *) ptd, sizeof(*ptd));
+}
+
+static void ptd_write(void __iomem *base, u32 ptd_offset, u32 slot,
+ struct ptd *ptd)
+{
+ mem_writes8(base, ptd_offset + slot*sizeof(*ptd) + sizeof(ptd->dw0),
+ &ptd->dw1, 7*sizeof(ptd->dw1));
+ /* Make sure dw0 gets written last (after other dw's and after payload)
+ since it contains the enable bit */
+ wmb();
+ mem_writes8(base, ptd_offset + slot*sizeof(*ptd), &ptd->dw0,
+ sizeof(ptd->dw0));
+}
+
+
+/* memory management of the 60kb on the chip from 0x1000 to 0xffff */
+static void init_memory(struct isp1760_hcd *priv)
+{
+ int i, curr;
+ u32 payload_addr;
+
+ payload_addr = PAYLOAD_OFFSET;
+ for (i = 0; i < BLOCK_1_NUM; i++) {
+ priv->memory_pool[i].start = payload_addr;
+ priv->memory_pool[i].size = BLOCK_1_SIZE;
+ priv->memory_pool[i].free = 1;
+ payload_addr += priv->memory_pool[i].size;
+ }
+
+ curr = i;
+ for (i = 0; i < BLOCK_2_NUM; i++) {
+ priv->memory_pool[curr + i].start = payload_addr;
+ priv->memory_pool[curr + i].size = BLOCK_2_SIZE;
+ priv->memory_pool[curr + i].free = 1;
+ payload_addr += priv->memory_pool[curr + i].size;
+ }
+
+ curr = i;
+ for (i = 0; i < BLOCK_3_NUM; i++) {
+ priv->memory_pool[curr + i].start = payload_addr;
+ priv->memory_pool[curr + i].size = BLOCK_3_SIZE;
+ priv->memory_pool[curr + i].free = 1;
+ payload_addr += priv->memory_pool[curr + i].size;
+ }
+
+ WARN_ON(payload_addr - priv->memory_pool[0].start > PAYLOAD_AREA_SIZE);
+}
+
+static void alloc_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ int i;
+
+ WARN_ON(qtd->payload_addr);
+
+ if (!qtd->length)
+ return;
+
+ for (i = 0; i < BLOCKS; i++) {
+ if (priv->memory_pool[i].size >= qtd->length &&
+ priv->memory_pool[i].free) {
+ priv->memory_pool[i].free = 0;
+ qtd->payload_addr = priv->memory_pool[i].start;
+ return;
+ }
+ }
+}
+
+static void free_mem(struct usb_hcd *hcd, struct isp1760_qtd *qtd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ int i;
+
+ if (!qtd->payload_addr)
+ return;
+
+ for (i = 0; i < BLOCKS; i++) {
+ if (priv->memory_pool[i].start == qtd->payload_addr) {
+ WARN_ON(priv->memory_pool[i].free);
+ priv->memory_pool[i].free = 1;
+ qtd->payload_addr = 0;
+ return;
+ }
+ }
+
+ dev_err(hcd->self.controller, "%s: Invalid pointer: %08x\n",
+ __func__, qtd->payload_addr);
+ WARN_ON(1);
+ qtd->payload_addr = 0;
+}
+
+static int handshake(struct usb_hcd *hcd, u32 reg,
+ u32 mask, u32 done, int usec)
+{
+ u32 result;
+
+ do {
+ result = reg_read32(hcd->regs, reg);
+ if (result == ~0)
+ return -ENODEV;
+ result &= mask;
+ if (result == done)
+ return 0;
+ udelay(1);
+ usec--;
+ } while (usec > 0);
+ return -ETIMEDOUT;
+}
+
+/* reset a non-running (STS_HALT == 1) controller */
+static int ehci_reset(struct usb_hcd *hcd)
+{
+ int retval;
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+
+ u32 command = reg_read32(hcd->regs, HC_USBCMD);
+
+ command |= CMD_RESET;
+ reg_write32(hcd->regs, HC_USBCMD, command);
+ hcd->state = HC_STATE_HALT;
+ priv->next_statechange = jiffies;
+ retval = handshake(hcd, HC_USBCMD,
+ CMD_RESET, 0, 250 * 1000);
+ return retval;
+}
+
+static struct isp1760_qh *qh_alloc(gfp_t flags)
+{
+ struct isp1760_qh *qh;
+
+ qh = kmem_cache_zalloc(qh_cachep, flags);
+ if (!qh)
+ return NULL;
+
+ INIT_LIST_HEAD(&qh->qh_list);
+ INIT_LIST_HEAD(&qh->qtd_list);
+ qh->slot = -1;
+
+ return qh;
+}
+
+static void qh_free(struct isp1760_qh *qh)
+{
+ WARN_ON(!list_empty(&qh->qtd_list));
+ WARN_ON(qh->slot > -1);
+ kmem_cache_free(qh_cachep, qh);
+}
+
+/* one-time init, only for memory state */
+static int priv_init(struct usb_hcd *hcd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ u32 hcc_params;
+ int i;
+
+ spin_lock_init(&priv->lock);
+
+ for (i = 0; i < QH_END; i++)
+ INIT_LIST_HEAD(&priv->qh_list[i]);
+
+ /*
+ * hw default: 1K periodic list heads, one per frame.
+ * periodic_size can shrink by USBCMD update if hcc_params allows.
+ */
+ priv->periodic_size = DEFAULT_I_TDPS;
+
+ /* controllers may cache some of the periodic schedule ... */
+ hcc_params = reg_read32(hcd->regs, HC_HCCPARAMS);
+ /* full frame cache */
+ if (HCC_ISOC_CACHE(hcc_params))
+ priv->i_thresh = 8;
+ else /* N microframes cached */
+ priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
+
+ return 0;
+}
+
+static int isp1760_hc_setup(struct usb_hcd *hcd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ int result;
+ u32 scratch, hwmode;
+
+ reg_write32(hcd->regs, HC_SCRATCH_REG, 0xdeadbabe);
+ /* Change bus pattern */
+ scratch = reg_read32(hcd->regs, HC_CHIP_ID_REG);
+ scratch = reg_read32(hcd->regs, HC_SCRATCH_REG);
+ if (scratch != 0xdeadbabe) {
+ dev_err(hcd->self.controller, "Scratch test failed.\n");
+ return -ENODEV;
+ }
+
+ /*
+ * The RESET_HC bit in the SW_RESET register is supposed to reset the
+ * host controller without touching the CPU interface registers, but at
+ * least on the ISP1761 it seems to behave as the RESET_ALL bit and
+ * reset the whole device. We thus can't use it here, so let's reset
+ * the host controller through the EHCI USB Command register. The device
+ * has been reset in core code anyway, so this shouldn't matter.
+ */
+ reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, 0);
+ reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
+ reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
+ reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
+
+ result = ehci_reset(hcd);
+ if (result)
+ return result;
+
+ /* Step 11 passed */
+
+ /* ATL reset */
+ hwmode = reg_read32(hcd->regs, HC_HW_MODE_CTRL) & ~ALL_ATX_RESET;
+ reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode | ALL_ATX_RESET);
+ mdelay(10);
+ reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
+
+ reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK);
+
+ priv->hcs_params = reg_read32(hcd->regs, HC_HCSPARAMS);
+
+ return priv_init(hcd);
+}
+
+static u32 base_to_chip(u32 base)
+{
+ return ((base - 0x400) >> 3);
+}
+
+static int last_qtd_of_urb(struct isp1760_qtd *qtd, struct isp1760_qh *qh)
+{
+ struct urb *urb;
+
+ if (list_is_last(&qtd->qtd_list, &qh->qtd_list))
+ return 1;
+
+ urb = qtd->urb;
+ qtd = list_entry(qtd->qtd_list.next, typeof(*qtd), qtd_list);
+ return (qtd->urb != urb);
+}
+
+/* magic numbers that can affect system performance */
+#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
+#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
+#define EHCI_TUNE_RL_TT 0
+#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
+#define EHCI_TUNE_MULT_TT 1
+#define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
+
+static void create_ptd_atl(struct isp1760_qh *qh,
+ struct isp1760_qtd *qtd, struct ptd *ptd)
+{
+ u32 maxpacket;
+ u32 multi;
+ u32 rl = RL_COUNTER;
+ u32 nak = NAK_COUNTER;
+
+ memset(ptd, 0, sizeof(*ptd));
+
+ /* according to 3.6.2, max packet len can not be > 0x400 */
+ maxpacket = usb_maxpacket(qtd->urb->dev, qtd->urb->pipe,
+ usb_pipeout(qtd->urb->pipe));
+ multi = 1 + ((maxpacket >> 11) & 0x3);
+ maxpacket &= 0x7ff;
+
+ /* DW0 */
+ ptd->dw0 = DW0_VALID_BIT;
+ ptd->dw0 |= TO_DW0_LENGTH(qtd->length);
+ ptd->dw0 |= TO_DW0_MAXPACKET(maxpacket);
+ ptd->dw0 |= TO_DW0_ENDPOINT(usb_pipeendpoint(qtd->urb->pipe));
+
+ /* DW1 */
+ ptd->dw1 = usb_pipeendpoint(qtd->urb->pipe) >> 1;
+ ptd->dw1 |= TO_DW1_DEVICE_ADDR(usb_pipedevice(qtd->urb->pipe));
+ ptd->dw1 |= TO_DW1_PID_TOKEN(qtd->packet_type);
+
+ if (usb_pipebulk(qtd->urb->pipe))
+ ptd->dw1 |= DW1_TRANS_BULK;
+ else if (usb_pipeint(qtd->urb->pipe))
+ ptd->dw1 |= DW1_TRANS_INT;
+
+ if (qtd->urb->dev->speed != USB_SPEED_HIGH) {
+ /* split transaction */
+
+ ptd->dw1 |= DW1_TRANS_SPLIT;
+ if (qtd->urb->dev->speed == USB_SPEED_LOW)
+ ptd->dw1 |= DW1_SE_USB_LOSPEED;
+
+ ptd->dw1 |= TO_DW1_PORT_NUM(qtd->urb->dev->ttport);
+ ptd->dw1 |= TO_DW1_HUB_NUM(qtd->urb->dev->tt->hub->devnum);
+
+ /* SE bit for Split INT transfers */
+ if (usb_pipeint(qtd->urb->pipe) &&
+ (qtd->urb->dev->speed == USB_SPEED_LOW))
+ ptd->dw1 |= 2 << 16;
+
+ rl = 0;
+ nak = 0;
+ } else {
+ ptd->dw0 |= TO_DW0_MULTI(multi);
+ if (usb_pipecontrol(qtd->urb->pipe) ||
+ usb_pipebulk(qtd->urb->pipe))
+ ptd->dw3 |= TO_DW3_PING(qh->ping);
+ }
+ /* DW2 */
+ ptd->dw2 = 0;
+ ptd->dw2 |= TO_DW2_DATA_START_ADDR(base_to_chip(qtd->payload_addr));
+ ptd->dw2 |= TO_DW2_RL(rl);
+
+ /* DW3 */
+ ptd->dw3 |= TO_DW3_NAKCOUNT(nak);
+ ptd->dw3 |= TO_DW3_DATA_TOGGLE(qh->toggle);
+ if (usb_pipecontrol(qtd->urb->pipe)) {
+ if (qtd->data_buffer == qtd->urb->setup_packet)
+ ptd->dw3 &= ~TO_DW3_DATA_TOGGLE(1);
+ else if (last_qtd_of_urb(qtd, qh))
+ ptd->dw3 |= TO_DW3_DATA_TOGGLE(1);
+ }
+
+ ptd->dw3 |= DW3_ACTIVE_BIT;
+ /* Cerr */
+ ptd->dw3 |= TO_DW3_CERR(ERR_COUNTER);
+}
+
+static void transform_add_int(struct isp1760_qh *qh,
+ struct isp1760_qtd *qtd, struct ptd *ptd)
+{
+ u32 usof;
+ u32 period;
+
+ /*
+ * Most of this is guessing. ISP1761 datasheet is quite unclear, and
+ * the algorithm from the original Philips driver code, which was
+ * pretty much used in this driver before as well, is quite horrendous
+ * and, i believe, incorrect. The code below follows the datasheet and
+ * USB2.0 spec as far as I can tell, and plug/unplug seems to be much
+ * more reliable this way (fingers crossed...).
+ */
+
+ if (qtd->urb->dev->speed == USB_SPEED_HIGH) {
+ /* urb->interval is in units of microframes (1/8 ms) */
+ period = qtd->urb->interval >> 3;
+
+ if (qtd->urb->interval > 4)
+ usof = 0x01; /* One bit set =>
+ interval 1 ms * uFrame-match */
+ else if (qtd->urb->interval > 2)
+ usof = 0x22; /* Two bits set => interval 1/2 ms */
+ else if (qtd->urb->interval > 1)
+ usof = 0x55; /* Four bits set => interval 1/4 ms */
+ else
+ usof = 0xff; /* All bits set => interval 1/8 ms */
+ } else {
+ /* urb->interval is in units of frames (1 ms) */
+ period = qtd->urb->interval;
+ usof = 0x0f; /* Execute Start Split on any of the
+ four first uFrames */
+
+ /*
+ * First 8 bits in dw5 is uSCS and "specifies which uSOF the
+ * complete split needs to be sent. Valid only for IN." Also,
+ * "All bits can be set to one for every transfer." (p 82,
+ * ISP1761 data sheet.) 0x1c is from Philips driver. Where did
+ * that number come from? 0xff seems to work fine...
+ */
+ /* ptd->dw5 = 0x1c; */
+ ptd->dw5 = 0xff; /* Execute Complete Split on any uFrame */
+ }
+
+ period = period >> 1;/* Ensure equal or shorter period than requested */
+ period &= 0xf8; /* Mask off too large values and lowest unused 3 bits */
+
+ ptd->dw2 |= period;
+ ptd->dw4 = usof;
+}
+
+static void create_ptd_int(struct isp1760_qh *qh,
+ struct isp1760_qtd *qtd, struct ptd *ptd)
+{
+ create_ptd_atl(qh, qtd, ptd);
+ transform_add_int(qh, qtd, ptd);
+}
+
+static void isp1760_urb_done(struct usb_hcd *hcd, struct urb *urb)
+__releases(priv->lock)
+__acquires(priv->lock)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+
+ if (!urb->unlinked) {
+ if (urb->status == -EINPROGRESS)
+ urb->status = 0;
+ }
+
+ if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {
+ void *ptr;
+ for (ptr = urb->transfer_buffer;
+ ptr < urb->transfer_buffer + urb->transfer_buffer_length;
+ ptr += PAGE_SIZE)
+ flush_dcache_page(virt_to_page(ptr));
+ }
+
+ /* complete() can reenter this HCD */
+ usb_hcd_unlink_urb_from_ep(hcd, urb);
+ spin_unlock(&priv->lock);
+ usb_hcd_giveback_urb(hcd, urb, urb->status);
+ spin_lock(&priv->lock);
+}
+
+static struct isp1760_qtd *qtd_alloc(gfp_t flags, struct urb *urb,
+ u8 packet_type)
+{
+ struct isp1760_qtd *qtd;
+
+ qtd = kmem_cache_zalloc(qtd_cachep, flags);
+ if (!qtd)
+ return NULL;
+
+ INIT_LIST_HEAD(&qtd->qtd_list);
+ qtd->urb = urb;
+ qtd->packet_type = packet_type;
+ qtd->status = QTD_ENQUEUED;
+ qtd->actual_length = 0;
+
+ return qtd;
+}
+
+static void qtd_free(struct isp1760_qtd *qtd)
+{
+ WARN_ON(qtd->payload_addr);
+ kmem_cache_free(qtd_cachep, qtd);
+}
+
+static void start_bus_transfer(struct usb_hcd *hcd, u32 ptd_offset, int slot,
+ struct isp1760_slotinfo *slots,
+ struct isp1760_qtd *qtd, struct isp1760_qh *qh,
+ struct ptd *ptd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ int skip_map;
+
+ WARN_ON((slot < 0) || (slot > 31));
+ WARN_ON(qtd->length && !qtd->payload_addr);
+ WARN_ON(slots[slot].qtd);
+ WARN_ON(slots[slot].qh);
+ WARN_ON(qtd->status != QTD_PAYLOAD_ALLOC);
+
+ /* Make sure done map has not triggered from some unlinked transfer */
+ if (ptd_offset == ATL_PTD_OFFSET) {
+ priv->atl_done_map |= reg_read32(hcd->regs,
+ HC_ATL_PTD_DONEMAP_REG);
+ priv->atl_done_map &= ~(1 << slot);
+ } else {
+ priv->int_done_map |= reg_read32(hcd->regs,
+ HC_INT_PTD_DONEMAP_REG);
+ priv->int_done_map &= ~(1 << slot);
+ }
+
+ qh->slot = slot;
+ qtd->status = QTD_XFER_STARTED;
+ slots[slot].timestamp = jiffies;
+ slots[slot].qtd = qtd;
+ slots[slot].qh = qh;
+ ptd_write(hcd->regs, ptd_offset, slot, ptd);
+
+ if (ptd_offset == ATL_PTD_OFFSET) {
+ skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
+ skip_map &= ~(1 << qh->slot);
+ reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
+ } else {
+ skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
+ skip_map &= ~(1 << qh->slot);
+ reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
+ }
+}
+
+static int is_short_bulk(struct isp1760_qtd *qtd)
+{
+ return (usb_pipebulk(qtd->urb->pipe) &&
+ (qtd->actual_length < qtd->length));
+}
+
+static void collect_qtds(struct usb_hcd *hcd, struct isp1760_qh *qh,
+ struct list_head *urb_list)
+{
+ int last_qtd;
+ struct isp1760_qtd *qtd, *qtd_next;
+ struct urb_listitem *urb_listitem;
+
+ list_for_each_entry_safe(qtd, qtd_next, &qh->qtd_list, qtd_list) {
+ if (qtd->status < QTD_XFER_COMPLETE)
+ break;
+
+ last_qtd = last_qtd_of_urb(qtd, qh);
+
+ if ((!last_qtd) && (qtd->status == QTD_RETIRE))
+ qtd_next->status = QTD_RETIRE;
+
+ if (qtd->status == QTD_XFER_COMPLETE) {
+ if (qtd->actual_length) {
+ switch (qtd->packet_type) {
+ case IN_PID:
+ mem_reads8(hcd->regs, qtd->payload_addr,
+ qtd->data_buffer,
+ qtd->actual_length);
+ /* Fall through (?) */
+ case OUT_PID:
+ qtd->urb->actual_length +=
+ qtd->actual_length;
+ /* Fall through ... */
+ case SETUP_PID:
+ break;
+ }
+ }
+
+ if (is_short_bulk(qtd)) {
+ if (qtd->urb->transfer_flags & URB_SHORT_NOT_OK)
+ qtd->urb->status = -EREMOTEIO;
+ if (!last_qtd)
+ qtd_next->status = QTD_RETIRE;
+ }
+ }
+
+ if (qtd->payload_addr)
+ free_mem(hcd, qtd);
+
+ if (last_qtd) {
+ if ((qtd->status == QTD_RETIRE) &&
+ (qtd->urb->status == -EINPROGRESS))
+ qtd->urb->status = -EPIPE;
+ /* Defer calling of urb_done() since it releases lock */
+ urb_listitem = kmem_cache_zalloc(urb_listitem_cachep,
+ GFP_ATOMIC);
+ if (unlikely(!urb_listitem))
+ break; /* Try again on next call */
+ urb_listitem->urb = qtd->urb;
+ list_add_tail(&urb_listitem->urb_list, urb_list);
+ }
+
+ list_del(&qtd->qtd_list);
+ qtd_free(qtd);
+ }
+}
+
+#define ENQUEUE_DEPTH 2
+static void enqueue_qtds(struct usb_hcd *hcd, struct isp1760_qh *qh)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ int ptd_offset;
+ struct isp1760_slotinfo *slots;
+ int curr_slot, free_slot;
+ int n;
+ struct ptd ptd;
+ struct isp1760_qtd *qtd;
+
+ if (unlikely(list_empty(&qh->qtd_list))) {
+ WARN_ON(1);
+ return;
+ }
+
+ /* Make sure this endpoint's TT buffer is clean before queueing ptds */
+ if (qh->tt_buffer_dirty)
+ return;
+
+ if (usb_pipeint(list_entry(qh->qtd_list.next, struct isp1760_qtd,
+ qtd_list)->urb->pipe)) {
+ ptd_offset = INT_PTD_OFFSET;
+ slots = priv->int_slots;
+ } else {
+ ptd_offset = ATL_PTD_OFFSET;
+ slots = priv->atl_slots;
+ }
+
+ free_slot = -1;
+ for (curr_slot = 0; curr_slot < 32; curr_slot++) {
+ if ((free_slot == -1) && (slots[curr_slot].qtd == NULL))
+ free_slot = curr_slot;
+ if (slots[curr_slot].qh == qh)
+ break;
+ }
+
+ n = 0;
+ list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
+ if (qtd->status == QTD_ENQUEUED) {
+ WARN_ON(qtd->payload_addr);
+ alloc_mem(hcd, qtd);
+ if ((qtd->length) && (!qtd->payload_addr))
+ break;
+
+ if ((qtd->length) &&
+ ((qtd->packet_type == SETUP_PID) ||
+ (qtd->packet_type == OUT_PID))) {
+ mem_writes8(hcd->regs, qtd->payload_addr,
+ qtd->data_buffer, qtd->length);
+ }
+
+ qtd->status = QTD_PAYLOAD_ALLOC;
+ }
+
+ if (qtd->status == QTD_PAYLOAD_ALLOC) {
+/*
+ if ((curr_slot > 31) && (free_slot == -1))
+ dev_dbg(hcd->self.controller, "%s: No slot "
+ "available for transfer\n", __func__);
+*/
+ /* Start xfer for this endpoint if not already done */
+ if ((curr_slot > 31) && (free_slot > -1)) {
+ if (usb_pipeint(qtd->urb->pipe))
+ create_ptd_int(qh, qtd, &ptd);
+ else
+ create_ptd_atl(qh, qtd, &ptd);
+
+ start_bus_transfer(hcd, ptd_offset, free_slot,
+ slots, qtd, qh, &ptd);
+ curr_slot = free_slot;
+ }
+
+ n++;
+ if (n >= ENQUEUE_DEPTH)
+ break;
+ }
+ }
+}
+
+static void schedule_ptds(struct usb_hcd *hcd)
+{
+ struct isp1760_hcd *priv;
+ struct isp1760_qh *qh, *qh_next;
+ struct list_head *ep_queue;
+ LIST_HEAD(urb_list);
+ struct urb_listitem *urb_listitem, *urb_listitem_next;
+ int i;
+
+ if (!hcd) {
+ WARN_ON(1);
+ return;
+ }
+
+ priv = hcd_to_priv(hcd);
+
+ /*
+ * check finished/retired xfers, transfer payloads, call urb_done()
+ */
+ for (i = 0; i < QH_END; i++) {
+ ep_queue = &priv->qh_list[i];
+ list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list) {
+ collect_qtds(hcd, qh, &urb_list);
+ if (list_empty(&qh->qtd_list))
+ list_del(&qh->qh_list);
+ }
+ }
+
+ list_for_each_entry_safe(urb_listitem, urb_listitem_next, &urb_list,
+ urb_list) {
+ isp1760_urb_done(hcd, urb_listitem->urb);
+ kmem_cache_free(urb_listitem_cachep, urb_listitem);
+ }
+
+ /*
+ * Schedule packets for transfer.
+ *
+ * According to USB2.0 specification:
+ *
+ * 1st prio: interrupt xfers, up to 80 % of bandwidth
+ * 2nd prio: control xfers
+ * 3rd prio: bulk xfers
+ *
+ * ... but let's use a simpler scheme here (mostly because ISP1761 doc
+ * is very unclear on how to prioritize traffic):
+ *
+ * 1) Enqueue any queued control transfers, as long as payload chip mem
+ * and PTD ATL slots are available.
+ * 2) Enqueue any queued INT transfers, as long as payload chip mem
+ * and PTD INT slots are available.
+ * 3) Enqueue any queued bulk transfers, as long as payload chip mem
+ * and PTD ATL slots are available.
+ *
+ * Use double buffering (ENQUEUE_DEPTH==2) as a compromise between
+ * conservation of chip mem and performance.
+ *
+ * I'm sure this scheme could be improved upon!
+ */
+ for (i = 0; i < QH_END; i++) {
+ ep_queue = &priv->qh_list[i];
+ list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list)
+ enqueue_qtds(hcd, qh);
+ }
+}
+
+#define PTD_STATE_QTD_DONE 1
+#define PTD_STATE_QTD_RELOAD 2
+#define PTD_STATE_URB_RETIRE 3
+
+static int check_int_transfer(struct usb_hcd *hcd, struct ptd *ptd,
+ struct urb *urb)
+{
+ __dw dw4;
+ int i;
+
+ dw4 = ptd->dw4;
+ dw4 >>= 8;
+
+ /* FIXME: ISP1761 datasheet does not say what to do with these. Do we
+ need to handle these errors? Is it done in hardware? */
+
+ if (ptd->dw3 & DW3_HALT_BIT) {
+
+ urb->status = -EPROTO; /* Default unknown error */
+
+ for (i = 0; i < 8; i++) {
+ switch (dw4 & 0x7) {
+ case INT_UNDERRUN:
+ dev_dbg(hcd->self.controller, "%s: underrun "
+ "during uFrame %d\n",
+ __func__, i);
+ urb->status = -ECOMM; /* Could not write data */
+ break;
+ case INT_EXACT:
+ dev_dbg(hcd->self.controller, "%s: transaction "
+ "error during uFrame %d\n",
+ __func__, i);
+ urb->status = -EPROTO; /* timeout, bad CRC, PID
+ error etc. */
+ break;
+ case INT_BABBLE:
+ dev_dbg(hcd->self.controller, "%s: babble "
+ "error during uFrame %d\n",
+ __func__, i);
+ urb->status = -EOVERFLOW;
+ break;
+ }
+ dw4 >>= 3;
+ }
+
+ return PTD_STATE_URB_RETIRE;
+ }
+
+ return PTD_STATE_QTD_DONE;
+}
+
+static int check_atl_transfer(struct usb_hcd *hcd, struct ptd *ptd,
+ struct urb *urb)
+{
+ WARN_ON(!ptd);
+ if (ptd->dw3 & DW3_HALT_BIT) {
+ if (ptd->dw3 & DW3_BABBLE_BIT)
+ urb->status = -EOVERFLOW;
+ else if (FROM_DW3_CERR(ptd->dw3))
+ urb->status = -EPIPE; /* Stall */
+ else if (ptd->dw3 & DW3_ERROR_BIT)
+ urb->status = -EPROTO; /* XactErr */
+ else
+ urb->status = -EPROTO; /* Unknown */
+/*
+ dev_dbg(hcd->self.controller, "%s: ptd error:\n"
+ " dw0: %08x dw1: %08x dw2: %08x dw3: %08x\n"
+ " dw4: %08x dw5: %08x dw6: %08x dw7: %08x\n",
+ __func__,
+ ptd->dw0, ptd->dw1, ptd->dw2, ptd->dw3,
+ ptd->dw4, ptd->dw5, ptd->dw6, ptd->dw7);
+*/
+ return PTD_STATE_URB_RETIRE;
+ }
+
+ if ((ptd->dw3 & DW3_ERROR_BIT) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
+ /* Transfer Error, *but* active and no HALT -> reload */
+ dev_dbg(hcd->self.controller, "PID error; reloading ptd\n");
+ return PTD_STATE_QTD_RELOAD;
+ }
+
+ if (!FROM_DW3_NAKCOUNT(ptd->dw3) && (ptd->dw3 & DW3_ACTIVE_BIT)) {
+ /*
+ * NAKs are handled in HW by the chip. Usually if the
+ * device is not able to send data fast enough.
+ * This happens mostly on slower hardware.
+ */
+ return PTD_STATE_QTD_RELOAD;
+ }
+
+ return PTD_STATE_QTD_DONE;
+}
+
+static void handle_done_ptds(struct usb_hcd *hcd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ struct ptd ptd;
+ struct isp1760_qh *qh;
+ int slot;
+ int state;
+ struct isp1760_slotinfo *slots;
+ u32 ptd_offset;
+ struct isp1760_qtd *qtd;
+ int modified;
+ int skip_map;
+
+ skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
+ priv->int_done_map &= ~skip_map;
+ skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
+ priv->atl_done_map &= ~skip_map;
+
+ modified = priv->int_done_map || priv->atl_done_map;
+
+ while (priv->int_done_map || priv->atl_done_map) {
+ if (priv->int_done_map) {
+ /* INT ptd */
+ slot = __ffs(priv->int_done_map);
+ priv->int_done_map &= ~(1 << slot);
+ slots = priv->int_slots;
+ /* This should not trigger, and could be removed if
+ noone have any problems with it triggering: */
+ if (!slots[slot].qh) {
+ WARN_ON(1);
+ continue;
+ }
+ ptd_offset = INT_PTD_OFFSET;
+ ptd_read(hcd->regs, INT_PTD_OFFSET, slot, &ptd);
+ state = check_int_transfer(hcd, &ptd,
+ slots[slot].qtd->urb);
+ } else {
+ /* ATL ptd */
+ slot = __ffs(priv->atl_done_map);
+ priv->atl_done_map &= ~(1 << slot);
+ slots = priv->atl_slots;
+ /* This should not trigger, and could be removed if
+ noone have any problems with it triggering: */
+ if (!slots[slot].qh) {
+ WARN_ON(1);
+ continue;
+ }
+ ptd_offset = ATL_PTD_OFFSET;
+ ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
+ state = check_atl_transfer(hcd, &ptd,
+ slots[slot].qtd->urb);
+ }
+
+ qtd = slots[slot].qtd;
+ slots[slot].qtd = NULL;
+ qh = slots[slot].qh;
+ slots[slot].qh = NULL;
+ qh->slot = -1;
+
+ WARN_ON(qtd->status != QTD_XFER_STARTED);
+
+ switch (state) {
+ case PTD_STATE_QTD_DONE:
+ if ((usb_pipeint(qtd->urb->pipe)) &&
+ (qtd->urb->dev->speed != USB_SPEED_HIGH))
+ qtd->actual_length =
+ FROM_DW3_SCS_NRBYTESTRANSFERRED(ptd.dw3);
+ else
+ qtd->actual_length =
+ FROM_DW3_NRBYTESTRANSFERRED(ptd.dw3);
+
+ qtd->status = QTD_XFER_COMPLETE;
+ if (list_is_last(&qtd->qtd_list, &qh->qtd_list) ||
+ is_short_bulk(qtd))
+ qtd = NULL;
+ else
+ qtd = list_entry(qtd->qtd_list.next,
+ typeof(*qtd), qtd_list);
+
+ qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
+ qh->ping = FROM_DW3_PING(ptd.dw3);
+ break;
+
+ case PTD_STATE_QTD_RELOAD: /* QTD_RETRY, for atls only */
+ qtd->status = QTD_PAYLOAD_ALLOC;
+ ptd.dw0 |= DW0_VALID_BIT;
+ /* RL counter = ERR counter */
+ ptd.dw3 &= ~TO_DW3_NAKCOUNT(0xf);
+ ptd.dw3 |= TO_DW3_NAKCOUNT(FROM_DW2_RL(ptd.dw2));
+ ptd.dw3 &= ~TO_DW3_CERR(3);
+ ptd.dw3 |= TO_DW3_CERR(ERR_COUNTER);
+ qh->toggle = FROM_DW3_DATA_TOGGLE(ptd.dw3);
+ qh->ping = FROM_DW3_PING(ptd.dw3);
+ break;
+
+ case PTD_STATE_URB_RETIRE:
+ qtd->status = QTD_RETIRE;
+ if ((qtd->urb->dev->speed != USB_SPEED_HIGH) &&
+ (qtd->urb->status != -EPIPE) &&
+ (qtd->urb->status != -EREMOTEIO)) {
+ qh->tt_buffer_dirty = 1;
+ if (usb_hub_clear_tt_buffer(qtd->urb))
+ /* Clear failed; let's hope things work
+ anyway */
+ qh->tt_buffer_dirty = 0;
+ }
+ qtd = NULL;
+ qh->toggle = 0;
+ qh->ping = 0;
+ break;
+
+ default:
+ WARN_ON(1);
+ continue;
+ }
+
+ if (qtd && (qtd->status == QTD_PAYLOAD_ALLOC)) {
+ if (slots == priv->int_slots) {
+ if (state == PTD_STATE_QTD_RELOAD)
+ dev_err(hcd->self.controller,
+ "%s: PTD_STATE_QTD_RELOAD on "
+ "interrupt packet\n", __func__);
+ if (state != PTD_STATE_QTD_RELOAD)
+ create_ptd_int(qh, qtd, &ptd);
+ } else {
+ if (state != PTD_STATE_QTD_RELOAD)
+ create_ptd_atl(qh, qtd, &ptd);
+ }
+
+ start_bus_transfer(hcd, ptd_offset, slot, slots, qtd,
+ qh, &ptd);
+ }
+ }
+
+ if (modified)
+ schedule_ptds(hcd);
+}
+
+static irqreturn_t isp1760_irq(struct usb_hcd *hcd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ u32 imask;
+ irqreturn_t irqret = IRQ_NONE;
+
+ spin_lock(&priv->lock);
+
+ if (!(hcd->state & HC_STATE_RUNNING))
+ goto leave;
+
+ imask = reg_read32(hcd->regs, HC_INTERRUPT_REG);
+ if (unlikely(!imask))
+ goto leave;
+ reg_write32(hcd->regs, HC_INTERRUPT_REG, imask); /* Clear */
+
+ priv->int_done_map |= reg_read32(hcd->regs, HC_INT_PTD_DONEMAP_REG);
+ priv->atl_done_map |= reg_read32(hcd->regs, HC_ATL_PTD_DONEMAP_REG);
+
+ handle_done_ptds(hcd);
+
+ irqret = IRQ_HANDLED;
+leave:
+ spin_unlock(&priv->lock);
+
+ return irqret;
+}
+
+/*
+ * Workaround for problem described in chip errata 2:
+ *
+ * Sometimes interrupts are not generated when ATL (not INT?) completion occurs.
+ * One solution suggested in the errata is to use SOF interrupts _instead_of_
+ * ATL done interrupts (the "instead of" might be important since it seems
+ * enabling ATL interrupts also causes the chip to sometimes - rarely - "forget"
+ * to set the PTD's done bit in addition to not generating an interrupt!).
+ *
+ * So if we use SOF + ATL interrupts, we sometimes get stale PTDs since their
+ * done bit is not being set. This is bad - it blocks the endpoint until reboot.
+ *
+ * If we use SOF interrupts only, we get latency between ptd completion and the
+ * actual handling. This is very noticeable in testusb runs which takes several
+ * minutes longer without ATL interrupts.
+ *
+ * A better solution is to run the code below every SLOT_CHECK_PERIOD ms. If it
+ * finds active ATL slots which are older than SLOT_TIMEOUT ms, it checks the
+ * slot's ACTIVE and VALID bits. If these are not set, the ptd is considered
+ * completed and its done map bit is set.
+ *
+ * The values of SLOT_TIMEOUT and SLOT_CHECK_PERIOD have been arbitrarily chosen
+ * not to cause too much lag when this HW bug occurs, while still hopefully
+ * ensuring that the check does not falsely trigger.
+ */
+#define SLOT_TIMEOUT 300
+#define SLOT_CHECK_PERIOD 200
+static struct timer_list errata2_timer;
+
+static void errata2_function(unsigned long data)
+{
+ struct usb_hcd *hcd = (struct usb_hcd *) data;
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ int slot;
+ struct ptd ptd;
+ unsigned long spinflags;
+
+ spin_lock_irqsave(&priv->lock, spinflags);
+
+ for (slot = 0; slot < 32; slot++)
+ if (priv->atl_slots[slot].qh && time_after(jiffies,
+ priv->atl_slots[slot].timestamp +
+ SLOT_TIMEOUT * HZ / 1000)) {
+ ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
+ if (!FROM_DW0_VALID(ptd.dw0) &&
+ !FROM_DW3_ACTIVE(ptd.dw3))
+ priv->atl_done_map |= 1 << slot;
+ }
+
+ if (priv->atl_done_map)
+ handle_done_ptds(hcd);
+
+ spin_unlock_irqrestore(&priv->lock, spinflags);
+
+ errata2_timer.expires = jiffies + SLOT_CHECK_PERIOD * HZ / 1000;
+ add_timer(&errata2_timer);
+}
+
+static int isp1760_run(struct usb_hcd *hcd)
+{
+ int retval;
+ u32 temp;
+ u32 command;
+ u32 chipid;
+
+ hcd->uses_new_polling = 1;
+
+ hcd->state = HC_STATE_RUNNING;
+
+ /* Set PTD interrupt AND & OR maps */
+ reg_write32(hcd->regs, HC_ATL_IRQ_MASK_AND_REG, 0);
+ reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, 0xffffffff);
+ reg_write32(hcd->regs, HC_INT_IRQ_MASK_AND_REG, 0);
+ reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, 0xffffffff);
+ reg_write32(hcd->regs, HC_ISO_IRQ_MASK_AND_REG, 0);
+ reg_write32(hcd->regs, HC_ISO_IRQ_MASK_OR_REG, 0xffffffff);
+ /* step 23 passed */
+
+ temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
+ reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp | HW_GLOBAL_INTR_EN);
+
+ command = reg_read32(hcd->regs, HC_USBCMD);
+ command &= ~(CMD_LRESET|CMD_RESET);
+ command |= CMD_RUN;
+ reg_write32(hcd->regs, HC_USBCMD, command);
+
+ retval = handshake(hcd, HC_USBCMD, CMD_RUN, CMD_RUN, 250 * 1000);
+ if (retval)
+ return retval;
+
+ /*
+ * XXX
+ * Spec says to write FLAG_CF as last config action, priv code grabs
+ * the semaphore while doing so.
+ */
+ down_write(&ehci_cf_port_reset_rwsem);
+ reg_write32(hcd->regs, HC_CONFIGFLAG, FLAG_CF);
+
+ retval = handshake(hcd, HC_CONFIGFLAG, FLAG_CF, FLAG_CF, 250 * 1000);
+ up_write(&ehci_cf_port_reset_rwsem);
+ if (retval)
+ return retval;
+
+ init_timer(&errata2_timer);
+ errata2_timer.function = errata2_function;
+ errata2_timer.data = (unsigned long) hcd;
+ errata2_timer.expires = jiffies + SLOT_CHECK_PERIOD * HZ / 1000;
+ add_timer(&errata2_timer);
+
+ chipid = reg_read32(hcd->regs, HC_CHIP_ID_REG);
+ dev_info(hcd->self.controller, "USB ISP %04x HW rev. %d started\n",
+ chipid & 0xffff, chipid >> 16);
+
+ /* PTD Register Init Part 2, Step 28 */
+
+ /* Setup registers controlling PTD checking */
+ reg_write32(hcd->regs, HC_ATL_PTD_LASTPTD_REG, 0x80000000);
+ reg_write32(hcd->regs, HC_INT_PTD_LASTPTD_REG, 0x80000000);
+ reg_write32(hcd->regs, HC_ISO_PTD_LASTPTD_REG, 0x00000001);
+ reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, 0xffffffff);
+ reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, 0xffffffff);
+ reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, 0xffffffff);
+ reg_write32(hcd->regs, HC_BUFFER_STATUS_REG,
+ ATL_BUF_FILL | INT_BUF_FILL);
+
+ /* GRR this is run-once init(), being done every time the HC starts.
+ * So long as they're part of class devices, we can't do it init()
+ * since the class device isn't created that early.
+ */
+ return 0;
+}
+
+static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len)
+{
+ qtd->data_buffer = databuffer;
+
+ if (len > MAX_PAYLOAD_SIZE)
+ len = MAX_PAYLOAD_SIZE;
+ qtd->length = len;
+
+ return qtd->length;
+}
+
+static void qtd_list_free(struct list_head *qtd_list)
+{
+ struct isp1760_qtd *qtd, *qtd_next;
+
+ list_for_each_entry_safe(qtd, qtd_next, qtd_list, qtd_list) {
+ list_del(&qtd->qtd_list);
+ qtd_free(qtd);
+ }
+}
+
+/*
+ * Packetize urb->transfer_buffer into list of packets of size wMaxPacketSize.
+ * Also calculate the PID type (SETUP/IN/OUT) for each packet.
+ */
+#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
+static void packetize_urb(struct usb_hcd *hcd,
+ struct urb *urb, struct list_head *head, gfp_t flags)
+{
+ struct isp1760_qtd *qtd;
+ void *buf;
+ int len, maxpacketsize;
+ u8 packet_type;
+
+ /*
+ * URBs map to sequences of QTDs: one logical transaction
+ */
+
+ if (!urb->transfer_buffer && urb->transfer_buffer_length) {
+ /* XXX This looks like usb storage / SCSI bug */
+ dev_err(hcd->self.controller,
+ "buf is null, dma is %08lx len is %d\n",
+ (long unsigned)urb->transfer_dma,
+ urb->transfer_buffer_length);
+ WARN_ON(1);
+ }
+
+ if (usb_pipein(urb->pipe))
+ packet_type = IN_PID;
+ else
+ packet_type = OUT_PID;
+
+ if (usb_pipecontrol(urb->pipe)) {
+ qtd = qtd_alloc(flags, urb, SETUP_PID);
+ if (!qtd)
+ goto cleanup;
+ qtd_fill(qtd, urb->setup_packet, sizeof(struct usb_ctrlrequest));
+ list_add_tail(&qtd->qtd_list, head);
+
+ /* for zero length DATA stages, STATUS is always IN */
+ if (urb->transfer_buffer_length == 0)
+ packet_type = IN_PID;
+ }
+
+ maxpacketsize = max_packet(usb_maxpacket(urb->dev, urb->pipe,
+ usb_pipeout(urb->pipe)));
+
+ /*
+ * buffer gets wrapped in one or more qtds;
+ * last one may be "short" (including zero len)
+ * and may serve as a control status ack
+ */
+ buf = urb->transfer_buffer;
+ len = urb->transfer_buffer_length;
+
+ for (;;) {
+ int this_qtd_len;
+
+ qtd = qtd_alloc(flags, urb, packet_type);
+ if (!qtd)
+ goto cleanup;
+ this_qtd_len = qtd_fill(qtd, buf, len);
+ list_add_tail(&qtd->qtd_list, head);
+
+ len -= this_qtd_len;
+ buf += this_qtd_len;
+
+ if (len <= 0)
+ break;
+ }
+
+ /*
+ * control requests may need a terminating data "status" ack;
+ * bulk ones may need a terminating short packet (zero length).
+ */
+ if (urb->transfer_buffer_length != 0) {
+ int one_more = 0;
+
+ if (usb_pipecontrol(urb->pipe)) {
+ one_more = 1;
+ if (packet_type == IN_PID)
+ packet_type = OUT_PID;
+ else
+ packet_type = IN_PID;
+ } else if (usb_pipebulk(urb->pipe)
+ && (urb->transfer_flags & URB_ZERO_PACKET)
+ && !(urb->transfer_buffer_length %
+ maxpacketsize)) {
+ one_more = 1;
+ }
+ if (one_more) {
+ qtd = qtd_alloc(flags, urb, packet_type);
+ if (!qtd)
+ goto cleanup;
+
+ /* never any data in such packets */
+ qtd_fill(qtd, NULL, 0);
+ list_add_tail(&qtd->qtd_list, head);
+ }
+ }
+
+ return;
+
+cleanup:
+ qtd_list_free(head);
+}
+
+static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
+ gfp_t mem_flags)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ struct list_head *ep_queue;
+ struct isp1760_qh *qh, *qhit;
+ unsigned long spinflags;
+ LIST_HEAD(new_qtds);
+ int retval;
+ int qh_in_queue;
+
+ switch (usb_pipetype(urb->pipe)) {
+ case PIPE_CONTROL:
+ ep_queue = &priv->qh_list[QH_CONTROL];
+ break;
+ case PIPE_BULK:
+ ep_queue = &priv->qh_list[QH_BULK];
+ break;
+ case PIPE_INTERRUPT:
+ if (urb->interval < 0)
+ return -EINVAL;
+ /* FIXME: Check bandwidth */
+ ep_queue = &priv->qh_list[QH_INTERRUPT];
+ break;
+ case PIPE_ISOCHRONOUS:
+ dev_err(hcd->self.controller, "%s: isochronous USB packets "
+ "not yet supported\n",
+ __func__);
+ return -EPIPE;
+ default:
+ dev_err(hcd->self.controller, "%s: unknown pipe type\n",
+ __func__);
+ return -EPIPE;
+ }
+
+ if (usb_pipein(urb->pipe))
+ urb->actual_length = 0;
+
+ packetize_urb(hcd, urb, &new_qtds, mem_flags);
+ if (list_empty(&new_qtds))
+ return -ENOMEM;
+
+ retval = 0;
+ spin_lock_irqsave(&priv->lock, spinflags);
+
+ if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
+ retval = -ESHUTDOWN;
+ qtd_list_free(&new_qtds);
+ goto out;
+ }
+ retval = usb_hcd_link_urb_to_ep(hcd, urb);
+ if (retval) {
+ qtd_list_free(&new_qtds);
+ goto out;
+ }
+
+ qh = urb->ep->hcpriv;
+ if (qh) {
+ qh_in_queue = 0;
+ list_for_each_entry(qhit, ep_queue, qh_list) {
+ if (qhit == qh) {
+ qh_in_queue = 1;
+ break;
+ }
+ }
+ if (!qh_in_queue)
+ list_add_tail(&qh->qh_list, ep_queue);
+ } else {
+ qh = qh_alloc(GFP_ATOMIC);
+ if (!qh) {
+ retval = -ENOMEM;
+ usb_hcd_unlink_urb_from_ep(hcd, urb);
+ qtd_list_free(&new_qtds);
+ goto out;
+ }
+ list_add_tail(&qh->qh_list, ep_queue);
+ urb->ep->hcpriv = qh;
+ }
+
+ list_splice_tail(&new_qtds, &qh->qtd_list);
+ schedule_ptds(hcd);
+
+out:
+ spin_unlock_irqrestore(&priv->lock, spinflags);
+ return retval;
+}
+
+static void kill_transfer(struct usb_hcd *hcd, struct urb *urb,
+ struct isp1760_qh *qh)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ int skip_map;
+
+ WARN_ON(qh->slot == -1);
+
+ /* We need to forcefully reclaim the slot since some transfers never
+ return, e.g. interrupt transfers and NAKed bulk transfers. */
+ if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe)) {
+ skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
+ skip_map |= (1 << qh->slot);
+ reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
+ priv->atl_slots[qh->slot].qh = NULL;
+ priv->atl_slots[qh->slot].qtd = NULL;
+ } else {
+ skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
+ skip_map |= (1 << qh->slot);
+ reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
+ priv->int_slots[qh->slot].qh = NULL;
+ priv->int_slots[qh->slot].qtd = NULL;
+ }
+
+ qh->slot = -1;
+}
+
+/*
+ * Retire the qtds beginning at 'qtd' and belonging all to the same urb, killing
+ * any active transfer belonging to the urb in the process.
+ */
+static void dequeue_urb_from_qtd(struct usb_hcd *hcd, struct isp1760_qh *qh,
+ struct isp1760_qtd *qtd)
+{
+ struct urb *urb;
+ int urb_was_running;
+
+ urb = qtd->urb;
+ urb_was_running = 0;
+ list_for_each_entry_from(qtd, &qh->qtd_list, qtd_list) {
+ if (qtd->urb != urb)
+ break;
+
+ if (qtd->status >= QTD_XFER_STARTED)
+ urb_was_running = 1;
+ if (last_qtd_of_urb(qtd, qh) &&
+ (qtd->status >= QTD_XFER_COMPLETE))
+ urb_was_running = 0;
+
+ if (qtd->status == QTD_XFER_STARTED)
+ kill_transfer(hcd, urb, qh);
+ qtd->status = QTD_RETIRE;
+ }
+
+ if ((urb->dev->speed != USB_SPEED_HIGH) && urb_was_running) {
+ qh->tt_buffer_dirty = 1;
+ if (usb_hub_clear_tt_buffer(urb))
+ /* Clear failed; let's hope things work anyway */
+ qh->tt_buffer_dirty = 0;
+ }
+}
+
+static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
+ int status)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ unsigned long spinflags;
+ struct isp1760_qh *qh;
+ struct isp1760_qtd *qtd;
+ int retval = 0;
+
+ spin_lock_irqsave(&priv->lock, spinflags);
+ retval = usb_hcd_check_unlink_urb(hcd, urb, status);
+ if (retval)
+ goto out;
+
+ qh = urb->ep->hcpriv;
+ if (!qh) {
+ retval = -EINVAL;
+ goto out;
+ }
+
+ list_for_each_entry(qtd, &qh->qtd_list, qtd_list)
+ if (qtd->urb == urb) {
+ dequeue_urb_from_qtd(hcd, qh, qtd);
+ list_move(&qtd->qtd_list, &qh->qtd_list);
+ break;
+ }
+
+ urb->status = status;
+ schedule_ptds(hcd);
+
+out:
+ spin_unlock_irqrestore(&priv->lock, spinflags);
+ return retval;
+}
+
+static void isp1760_endpoint_disable(struct usb_hcd *hcd,
+ struct usb_host_endpoint *ep)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ unsigned long spinflags;
+ struct isp1760_qh *qh, *qh_iter;
+ int i;
+
+ spin_lock_irqsave(&priv->lock, spinflags);
+
+ qh = ep->hcpriv;
+ if (!qh)
+ goto out;
+
+ WARN_ON(!list_empty(&qh->qtd_list));
+
+ for (i = 0; i < QH_END; i++)
+ list_for_each_entry(qh_iter, &priv->qh_list[i], qh_list)
+ if (qh_iter == qh) {
+ list_del(&qh_iter->qh_list);
+ i = QH_END;
+ break;
+ }
+ qh_free(qh);
+ ep->hcpriv = NULL;
+
+ schedule_ptds(hcd);
+
+out:
+ spin_unlock_irqrestore(&priv->lock, spinflags);
+}
+
+static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ u32 temp, status = 0;
+ u32 mask;
+ int retval = 1;
+ unsigned long flags;
+
+ /* if !PM, root hub timers won't get shut down ... */
+ if (!HC_IS_RUNNING(hcd->state))
+ return 0;
+
+ /* init status to no-changes */
+ buf[0] = 0;
+ mask = PORT_CSC;
+
+ spin_lock_irqsave(&priv->lock, flags);
+ temp = reg_read32(hcd->regs, HC_PORTSC1);
+
+ if (temp & PORT_OWNER) {
+ if (temp & PORT_CSC) {
+ temp &= ~PORT_CSC;
+ reg_write32(hcd->regs, HC_PORTSC1, temp);
+ goto done;
+ }
+ }
+
+ /*
+ * Return status information even for ports with OWNER set.
+ * Otherwise hub_wq wouldn't see the disconnect event when a
+ * high-speed device is switched over to the companion
+ * controller by the user.
+ */
+
+ if ((temp & mask) != 0
+ || ((temp & PORT_RESUME) != 0
+ && time_after_eq(jiffies,
+ priv->reset_done))) {
+ buf [0] |= 1 << (0 + 1);
+ status = STS_PCD;
+ }
+ /* FIXME autosuspend idle root hubs */
+done:
+ spin_unlock_irqrestore(&priv->lock, flags);
+ return status ? retval : 0;
+}
+
+static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
+ struct usb_hub_descriptor *desc)
+{
+ int ports = HCS_N_PORTS(priv->hcs_params);
+ u16 temp;
+
+ desc->bDescriptorType = 0x29;
+ /* priv 1.0, 2.3.9 says 20ms max */
+ desc->bPwrOn2PwrGood = 10;
+ desc->bHubContrCurrent = 0;
+
+ desc->bNbrPorts = ports;
+ temp = 1 + (ports / 8);
+ desc->bDescLength = 7 + 2 * temp;
+
+ /* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
+ memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
+ memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
+
+ /* per-port overcurrent reporting */
+ temp = 0x0008;
+ if (HCS_PPC(priv->hcs_params))
+ /* per-port power control */
+ temp |= 0x0001;
+ else
+ /* no power switching */
+ temp |= 0x0002;
+ desc->wHubCharacteristics = cpu_to_le16(temp);
+}
+
+#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
+
+static int check_reset_complete(struct usb_hcd *hcd, int index,
+ int port_status)
+{
+ if (!(port_status & PORT_CONNECT))
+ return port_status;
+
+ /* if reset finished and it's still not enabled -- handoff */
+ if (!(port_status & PORT_PE)) {
+
+ dev_info(hcd->self.controller,
+ "port %d full speed --> companion\n",
+ index + 1);
+
+ port_status |= PORT_OWNER;
+ port_status &= ~PORT_RWC_BITS;
+ reg_write32(hcd->regs, HC_PORTSC1, port_status);
+
+ } else
+ dev_info(hcd->self.controller, "port %d high speed\n",
+ index + 1);
+
+ return port_status;
+}
+
+static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
+ u16 wValue, u16 wIndex, char *buf, u16 wLength)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ int ports = HCS_N_PORTS(priv->hcs_params);
+ u32 temp, status;
+ unsigned long flags;
+ int retval = 0;
+ unsigned selector;
+
+ /*
+ * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
+ * HCS_INDICATOR may say we can change LEDs to off/amber/green.
+ * (track current state ourselves) ... blink for diagnostics,
+ * power, "this is the one", etc. EHCI spec supports this.
+ */
+
+ spin_lock_irqsave(&priv->lock, flags);
+ switch (typeReq) {
+ case ClearHubFeature:
+ switch (wValue) {
+ case C_HUB_LOCAL_POWER:
+ case C_HUB_OVER_CURRENT:
+ /* no hub-wide feature/status flags */
+ break;
+ default:
+ goto error;
+ }
+ break;
+ case ClearPortFeature:
+ if (!wIndex || wIndex > ports)
+ goto error;
+ wIndex--;
+ temp = reg_read32(hcd->regs, HC_PORTSC1);
+
+ /*
+ * Even if OWNER is set, so the port is owned by the
+ * companion controller, hub_wq needs to be able to clear
+ * the port-change status bits (especially
+ * USB_PORT_STAT_C_CONNECTION).
+ */
+
+ switch (wValue) {
+ case USB_PORT_FEAT_ENABLE:
+ reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_PE);
+ break;
+ case USB_PORT_FEAT_C_ENABLE:
+ /* XXX error? */
+ break;
+ case USB_PORT_FEAT_SUSPEND:
+ if (temp & PORT_RESET)
+ goto error;
+
+ if (temp & PORT_SUSPEND) {
+ if ((temp & PORT_PE) == 0)
+ goto error;
+ /* resume signaling for 20 msec */
+ temp &= ~(PORT_RWC_BITS);
+ reg_write32(hcd->regs, HC_PORTSC1,
+ temp | PORT_RESUME);
+ priv->reset_done = jiffies +
+ msecs_to_jiffies(20);
+ }
+ break;
+ case USB_PORT_FEAT_C_SUSPEND:
+ /* we auto-clear this feature */
+ break;
+ case USB_PORT_FEAT_POWER:
+ if (HCS_PPC(priv->hcs_params))
+ reg_write32(hcd->regs, HC_PORTSC1,
+ temp & ~PORT_POWER);
+ break;
+ case USB_PORT_FEAT_C_CONNECTION:
+ reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_CSC);
+ break;
+ case USB_PORT_FEAT_C_OVER_CURRENT:
+ /* XXX error ?*/
+ break;
+ case USB_PORT_FEAT_C_RESET:
+ /* GetPortStatus clears reset */
+ break;
+ default:
+ goto error;
+ }
+ reg_read32(hcd->regs, HC_USBCMD);
+ break;
+ case GetHubDescriptor:
+ isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
+ buf);
+ break;
+ case GetHubStatus:
+ /* no hub-wide feature/status flags */
+ memset(buf, 0, 4);
+ break;
+ case GetPortStatus:
+ if (!wIndex || wIndex > ports)
+ goto error;
+ wIndex--;
+ status = 0;
+ temp = reg_read32(hcd->regs, HC_PORTSC1);
+
+ /* wPortChange bits */
+ if (temp & PORT_CSC)
+ status |= USB_PORT_STAT_C_CONNECTION << 16;
+
+
+ /* whoever resumes must GetPortStatus to complete it!! */
+ if (temp & PORT_RESUME) {
+ dev_err(hcd->self.controller, "Port resume should be skipped.\n");
+
+ /* Remote Wakeup received? */
+ if (!priv->reset_done) {
+ /* resume signaling for 20 msec */
+ priv->reset_done = jiffies
+ + msecs_to_jiffies(20);
+ /* check the port again */
+ mod_timer(&hcd->rh_timer, priv->reset_done);
+ }
+
+ /* resume completed? */
+ else if (time_after_eq(jiffies,
+ priv->reset_done)) {
+ status |= USB_PORT_STAT_C_SUSPEND << 16;
+ priv->reset_done = 0;
+
+ /* stop resume signaling */
+ temp = reg_read32(hcd->regs, HC_PORTSC1);
+ reg_write32(hcd->regs, HC_PORTSC1,
+ temp & ~(PORT_RWC_BITS | PORT_RESUME));
+ retval = handshake(hcd, HC_PORTSC1,
+ PORT_RESUME, 0, 2000 /* 2msec */);
+ if (retval != 0) {
+ dev_err(hcd->self.controller,
+ "port %d resume error %d\n",
+ wIndex + 1, retval);
+ goto error;
+ }
+ temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
+ }
+ }
+
+ /* whoever resets must GetPortStatus to complete it!! */
+ if ((temp & PORT_RESET)
+ && time_after_eq(jiffies,
+ priv->reset_done)) {
+ status |= USB_PORT_STAT_C_RESET << 16;
+ priv->reset_done = 0;
+
+ /* force reset to complete */
+ reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_RESET);
+ /* REVISIT: some hardware needs 550+ usec to clear
+ * this bit; seems too long to spin routinely...
+ */
+ retval = handshake(hcd, HC_PORTSC1,
+ PORT_RESET, 0, 750);
+ if (retval != 0) {
+ dev_err(hcd->self.controller, "port %d reset error %d\n",
+ wIndex + 1, retval);
+ goto error;
+ }
+
+ /* see what we found out */
+ temp = check_reset_complete(hcd, wIndex,
+ reg_read32(hcd->regs, HC_PORTSC1));
+ }
+ /*
+ * Even if OWNER is set, there's no harm letting hub_wq
+ * see the wPortStatus values (they should all be 0 except
+ * for PORT_POWER anyway).
+ */
+
+ if (temp & PORT_OWNER)
+ dev_err(hcd->self.controller, "PORT_OWNER is set\n");
+
+ if (temp & PORT_CONNECT) {
+ status |= USB_PORT_STAT_CONNECTION;
+ /* status may be from integrated TT */
+ status |= USB_PORT_STAT_HIGH_SPEED;
+ }
+ if (temp & PORT_PE)
+ status |= USB_PORT_STAT_ENABLE;
+ if (temp & (PORT_SUSPEND|PORT_RESUME))
+ status |= USB_PORT_STAT_SUSPEND;
+ if (temp & PORT_RESET)
+ status |= USB_PORT_STAT_RESET;
+ if (temp & PORT_POWER)
+ status |= USB_PORT_STAT_POWER;
+
+ put_unaligned(cpu_to_le32(status), (__le32 *) buf);
+ break;
+ case SetHubFeature:
+ switch (wValue) {
+ case C_HUB_LOCAL_POWER:
+ case C_HUB_OVER_CURRENT:
+ /* no hub-wide feature/status flags */
+ break;
+ default:
+ goto error;
+ }
+ break;
+ case SetPortFeature:
+ selector = wIndex >> 8;
+ wIndex &= 0xff;
+ if (!wIndex || wIndex > ports)
+ goto error;
+ wIndex--;
+ temp = reg_read32(hcd->regs, HC_PORTSC1);
+ if (temp & PORT_OWNER)
+ break;
+
+/* temp &= ~PORT_RWC_BITS; */
+ switch (wValue) {
+ case USB_PORT_FEAT_ENABLE:
+ reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_PE);
+ break;
+
+ case USB_PORT_FEAT_SUSPEND:
+ if ((temp & PORT_PE) == 0
+ || (temp & PORT_RESET) != 0)
+ goto error;
+
+ reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_SUSPEND);
+ break;
+ case USB_PORT_FEAT_POWER:
+ if (HCS_PPC(priv->hcs_params))
+ reg_write32(hcd->regs, HC_PORTSC1,
+ temp | PORT_POWER);
+ break;
+ case USB_PORT_FEAT_RESET:
+ if (temp & PORT_RESUME)
+ goto error;
+ /* line status bits may report this as low speed,
+ * which can be fine if this root hub has a
+ * transaction translator built in.
+ */
+ if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
+ && PORT_USB11(temp)) {
+ temp |= PORT_OWNER;
+ } else {
+ temp |= PORT_RESET;
+ temp &= ~PORT_PE;
+
+ /*
+ * caller must wait, then call GetPortStatus
+ * usb 2.0 spec says 50 ms resets on root
+ */
+ priv->reset_done = jiffies +
+ msecs_to_jiffies(50);
+ }
+ reg_write32(hcd->regs, HC_PORTSC1, temp);
+ break;
+ default:
+ goto error;
+ }
+ reg_read32(hcd->regs, HC_USBCMD);
+ break;
+
+ default:
+error:
+ /* "stall" on error */
+ retval = -EPIPE;
+ }
+ spin_unlock_irqrestore(&priv->lock, flags);
+ return retval;
+}
+
+static int isp1760_get_frame(struct usb_hcd *hcd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ u32 fr;
+
+ fr = reg_read32(hcd->regs, HC_FRINDEX);
+ return (fr >> 3) % priv->periodic_size;
+}
+
+static void isp1760_stop(struct usb_hcd *hcd)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ u32 temp;
+
+ del_timer(&errata2_timer);
+
+ isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
+ NULL, 0);
+ mdelay(20);
+
+ spin_lock_irq(&priv->lock);
+ ehci_reset(hcd);
+ /* Disable IRQ */
+ temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
+ reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
+ spin_unlock_irq(&priv->lock);
+
+ reg_write32(hcd->regs, HC_CONFIGFLAG, 0);
+}
+
+static void isp1760_shutdown(struct usb_hcd *hcd)
+{
+ u32 command, temp;
+
+ isp1760_stop(hcd);
+ temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
+ reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
+
+ command = reg_read32(hcd->regs, HC_USBCMD);
+ command &= ~CMD_RUN;
+ reg_write32(hcd->regs, HC_USBCMD, command);
+}
+
+static void isp1760_clear_tt_buffer_complete(struct usb_hcd *hcd,
+ struct usb_host_endpoint *ep)
+{
+ struct isp1760_hcd *priv = hcd_to_priv(hcd);
+ struct isp1760_qh *qh = ep->hcpriv;
+ unsigned long spinflags;
+
+ if (!qh)
+ return;
+
+ spin_lock_irqsave(&priv->lock, spinflags);
+ qh->tt_buffer_dirty = 0;
+ schedule_ptds(hcd);
+ spin_unlock_irqrestore(&priv->lock, spinflags);
+}
+
+
+static const struct hc_driver isp1760_hc_driver = {
+ .description = "isp1760-hcd",
+ .product_desc = "NXP ISP1760 USB Host Controller",
+ .hcd_priv_size = sizeof(struct isp1760_hcd *),
+ .irq = isp1760_irq,
+ .flags = HCD_MEMORY | HCD_USB2,
+ .reset = isp1760_hc_setup,
+ .start = isp1760_run,
+ .stop = isp1760_stop,
+ .shutdown = isp1760_shutdown,
+ .urb_enqueue = isp1760_urb_enqueue,
+ .urb_dequeue = isp1760_urb_dequeue,
+ .endpoint_disable = isp1760_endpoint_disable,
+ .get_frame_number = isp1760_get_frame,
+ .hub_status_data = isp1760_hub_status_data,
+ .hub_control = isp1760_hub_control,
+ .clear_tt_buffer_complete = isp1760_clear_tt_buffer_complete,
+};
+
+int __init isp1760_init_kmem_once(void)
+{
+ urb_listitem_cachep = kmem_cache_create("isp1760_urb_listitem",
+ sizeof(struct urb_listitem), 0, SLAB_TEMPORARY |
+ SLAB_MEM_SPREAD, NULL);
+
+ if (!urb_listitem_cachep)
+ return -ENOMEM;
+
+ qtd_cachep = kmem_cache_create("isp1760_qtd",
+ sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
+ SLAB_MEM_SPREAD, NULL);
+
+ if (!qtd_cachep)
+ return -ENOMEM;
+
+ qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
+ 0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
+
+ if (!qh_cachep) {
+ kmem_cache_destroy(qtd_cachep);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+void isp1760_deinit_kmem_cache(void)
+{
+ kmem_cache_destroy(qtd_cachep);
+ kmem_cache_destroy(qh_cachep);
+ kmem_cache_destroy(urb_listitem_cachep);
+}
+
+int isp1760_hcd_register(struct isp1760_hcd *priv, void __iomem *regs,
+ struct resource *mem, int irq, unsigned long irqflags,
+ struct device *dev)
+{
+ struct usb_hcd *hcd;
+ int ret;
+
+ hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev_name(dev));
+ if (!hcd)
+ return -ENOMEM;
+
+ *(struct isp1760_hcd **)hcd->hcd_priv = priv;
+
+ priv->hcd = hcd;
+
+ init_memory(priv);
+
+ hcd->irq = irq;
+ hcd->regs = regs;
+ hcd->rsrc_start = mem->start;
+ hcd->rsrc_len = resource_size(mem);
+
+ ret = usb_add_hcd(hcd, irq, irqflags);
+ if (ret)
+ goto error;
+
+ device_wakeup_enable(hcd->self.controller);
+
+ return 0;
+
+error:
+ usb_put_hcd(hcd);
+ return ret;
+}
+
+void isp1760_hcd_unregister(struct isp1760_hcd *priv)
+{
+ usb_remove_hcd(priv->hcd);
+ usb_put_hcd(priv->hcd);
+}
--- /dev/null
+#ifndef _ISP1760_HCD_H_
+#define _ISP1760_HCD_H_
+
+#include <linux/spinlock.h>
+
+struct isp1760_qh;
+struct isp1760_qtd;
+struct resource;
+struct usb_hcd;
+
+/*
+ * 60kb divided in:
+ * - 32 blocks @ 256 bytes
+ * - 20 blocks @ 1024 bytes
+ * - 4 blocks @ 8192 bytes
+ */
+
+#define BLOCK_1_NUM 32
+#define BLOCK_2_NUM 20
+#define BLOCK_3_NUM 4
+
+#define BLOCK_1_SIZE 256
+#define BLOCK_2_SIZE 1024
+#define BLOCK_3_SIZE 8192
+#define BLOCKS (BLOCK_1_NUM + BLOCK_2_NUM + BLOCK_3_NUM)
+#define MAX_PAYLOAD_SIZE BLOCK_3_SIZE
+#define PAYLOAD_AREA_SIZE 0xf000
+
+struct isp1760_slotinfo {
+ struct isp1760_qh *qh;
+ struct isp1760_qtd *qtd;
+ unsigned long timestamp;
+};
+
+/* chip memory management */
+struct isp1760_memory_chunk {
+ unsigned int start;
+ unsigned int size;
+ unsigned int free;
+};
+
+enum isp1760_queue_head_types {
+ QH_CONTROL,
+ QH_BULK,
+ QH_INTERRUPT,
+ QH_END
+};
+
+struct isp1760_hcd {
+ struct usb_hcd *hcd;
+
+ u32 hcs_params;
+ spinlock_t lock;
+ struct isp1760_slotinfo atl_slots[32];
+ int atl_done_map;
+ struct isp1760_slotinfo int_slots[32];
+ int int_done_map;
+ struct isp1760_memory_chunk memory_pool[BLOCKS];
+ struct list_head qh_list[QH_END];
+
+ /* periodic schedule support */
+#define DEFAULT_I_TDPS 1024
+ unsigned periodic_size;
+ unsigned i_thresh;
+ unsigned long reset_done;
+ unsigned long next_statechange;
+};
+
+int isp1760_hcd_register(struct isp1760_hcd *priv, void __iomem *regs,
+ struct resource *mem, int irq, unsigned long irqflags,
+ struct device *dev);
+void isp1760_hcd_unregister(struct isp1760_hcd *priv);
+
+int isp1760_init_kmem_once(void);
+void isp1760_deinit_kmem_cache(void);
+
+#endif /* _ISP1760_HCD_H_ */
--- /dev/null
+/*
+ * Glue code for the ISP1760 driver and bus
+ * Currently there is support for
+ * - OpenFirmware
+ * - PCI
+ * - PDEV (generic platform device centralized driver model)
+ *
+ * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
+ *
+ */
+
+#include <linux/usb.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/usb/isp1760.h>
+#include <linux/usb/hcd.h>
+
+#include "isp1760-core.h"
+#include "isp1760-regs.h"
+
+#ifdef CONFIG_PCI
+#include <linux/pci.h>
+#endif
+
+#ifdef CONFIG_PCI
+static int isp1761_pci_init(struct pci_dev *dev)
+{
+ resource_size_t mem_start;
+ resource_size_t mem_length;
+ u8 __iomem *iobase;
+ u8 latency, limit;
+ int retry_count;
+ u32 reg_data;
+
+ /* Grab the PLX PCI shared memory of the ISP 1761 we need */
+ mem_start = pci_resource_start(dev, 3);
+ mem_length = pci_resource_len(dev, 3);
+ if (mem_length < 0xffff) {
+ printk(KERN_ERR "memory length for this resource is wrong\n");
+ return -ENOMEM;
+ }
+
+ if (!request_mem_region(mem_start, mem_length, "ISP-PCI")) {
+ printk(KERN_ERR "host controller already in use\n");
+ return -EBUSY;
+ }
+
+ /* map available memory */
+ iobase = ioremap_nocache(mem_start, mem_length);
+ if (!iobase) {
+ printk(KERN_ERR "Error ioremap failed\n");
+ release_mem_region(mem_start, mem_length);
+ return -ENOMEM;
+ }
+
+ /* bad pci latencies can contribute to overruns */
+ pci_read_config_byte(dev, PCI_LATENCY_TIMER, &latency);
+ if (latency) {
+ pci_read_config_byte(dev, PCI_MAX_LAT, &limit);
+ if (limit && limit < latency)
+ pci_write_config_byte(dev, PCI_LATENCY_TIMER, limit);
+ }
+
+ /* Try to check whether we can access Scratch Register of
+ * Host Controller or not. The initial PCI access is retried until
+ * local init for the PCI bridge is completed
+ */
+ retry_count = 20;
+ reg_data = 0;
+ while ((reg_data != 0xFACE) && retry_count) {
+ /*by default host is in 16bit mode, so
+ * io operations at this stage must be 16 bit
+ * */
+ writel(0xface, iobase + HC_SCRATCH_REG);
+ udelay(100);
+ reg_data = readl(iobase + HC_SCRATCH_REG) & 0x0000ffff;
+ retry_count--;
+ }
+
+ iounmap(iobase);
+ release_mem_region(mem_start, mem_length);
+
+ /* Host Controller presence is detected by writing to scratch register
+ * and reading back and checking the contents are same or not
+ */
+ if (reg_data != 0xFACE) {
+ dev_err(&dev->dev, "scratch register mismatch %x\n", reg_data);
+ return -ENOMEM;
+ }
+
+ /* Grab the PLX PCI mem maped port start address we need */
+ mem_start = pci_resource_start(dev, 0);
+ mem_length = pci_resource_len(dev, 0);
+
+ if (!request_mem_region(mem_start, mem_length, "ISP1761 IO MEM")) {
+ printk(KERN_ERR "request region #1\n");
+ return -EBUSY;
+ }
+
+ iobase = ioremap_nocache(mem_start, mem_length);
+ if (!iobase) {
+ printk(KERN_ERR "ioremap #1\n");
+ release_mem_region(mem_start, mem_length);
+ return -ENOMEM;
+ }
+
+ /* configure PLX PCI chip to pass interrupts */
+#define PLX_INT_CSR_REG 0x68
+ reg_data = readl(iobase + PLX_INT_CSR_REG);
+ reg_data |= 0x900;
+ writel(reg_data, iobase + PLX_INT_CSR_REG);
+
+ /* done with PLX IO access */
+ iounmap(iobase);
+ release_mem_region(mem_start, mem_length);
+
+ return 0;
+}
+
+static int isp1761_pci_probe(struct pci_dev *dev,
+ const struct pci_device_id *id)
+{
+ unsigned int devflags = 0;
+ int ret;
+
+ if (usb_disabled())
+ return -ENODEV;
+
+ if (!dev->irq)
+ return -ENODEV;
+
+ if (pci_enable_device(dev) < 0)
+ return -ENODEV;
+
+ ret = isp1761_pci_init(dev);
+ if (ret < 0)
+ goto error;
+
+ pci_set_master(dev);
+
+ dev->dev.dma_mask = NULL;
+ ret = isp1760_register(&dev->resource[3], dev->irq, 0, &dev->dev,
+ devflags);
+ if (ret < 0)
+ goto error;
+
+ return 0;
+
+error:
+ pci_disable_device(dev);
+ return ret;
+}
+
+static void isp1761_pci_remove(struct pci_dev *dev)
+{
+ isp1760_unregister(&dev->dev);
+
+ pci_disable_device(dev);
+}
+
+static void isp1761_pci_shutdown(struct pci_dev *dev)
+{
+ printk(KERN_ERR "ips1761_pci_shutdown\n");
+}
+
+static const struct pci_device_id isp1760_plx [] = {
+ {
+ .class = PCI_CLASS_BRIDGE_OTHER << 8,
+ .class_mask = ~0,
+ .vendor = PCI_VENDOR_ID_PLX,
+ .device = 0x5406,
+ .subvendor = PCI_VENDOR_ID_PLX,
+ .subdevice = 0x9054,
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(pci, isp1760_plx);
+
+static struct pci_driver isp1761_pci_driver = {
+ .name = "isp1760",
+ .id_table = isp1760_plx,
+ .probe = isp1761_pci_probe,
+ .remove = isp1761_pci_remove,
+ .shutdown = isp1761_pci_shutdown,
+};
+#endif
+
+static int isp1760_plat_probe(struct platform_device *pdev)
+{
+ unsigned long irqflags;
+ unsigned int devflags = 0;
+ struct resource *mem_res;
+ struct resource *irq_res;
+ int ret;
+
+ mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!irq_res) {
+ pr_warning("isp1760: IRQ resource not available\n");
+ return -ENODEV;
+ }
+ irqflags = irq_res->flags & IRQF_TRIGGER_MASK;
+
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+ struct device_node *dp = pdev->dev.of_node;
+ u32 bus_width = 0;
+
+ if (of_device_is_compatible(dp, "nxp,usb-isp1761"))
+ devflags |= ISP1760_FLAG_ISP1761;
+
+ /* Some systems wire up only 16 of the 32 data lines */
+ of_property_read_u32(dp, "bus-width", &bus_width);
+ if (bus_width == 16)
+ devflags |= ISP1760_FLAG_BUS_WIDTH_16;
+
+ if (of_property_read_bool(dp, "port1-otg"))
+ devflags |= ISP1760_FLAG_OTG_EN;
+
+ if (of_property_read_bool(dp, "analog-oc"))
+ devflags |= ISP1760_FLAG_ANALOG_OC;
+
+ if (of_property_read_bool(dp, "dack-polarity"))
+ devflags |= ISP1760_FLAG_DACK_POL_HIGH;
+
+ if (of_property_read_bool(dp, "dreq-polarity"))
+ devflags |= ISP1760_FLAG_DREQ_POL_HIGH;
+ } else if (dev_get_platdata(&pdev->dev)) {
+ struct isp1760_platform_data *pdata =
+ dev_get_platdata(&pdev->dev);
+
+ if (pdata->is_isp1761)
+ devflags |= ISP1760_FLAG_ISP1761;
+ if (pdata->bus_width_16)
+ devflags |= ISP1760_FLAG_BUS_WIDTH_16;
+ if (pdata->port1_otg)
+ devflags |= ISP1760_FLAG_OTG_EN;
+ if (pdata->analog_oc)
+ devflags |= ISP1760_FLAG_ANALOG_OC;
+ if (pdata->dack_polarity_high)
+ devflags |= ISP1760_FLAG_DACK_POL_HIGH;
+ if (pdata->dreq_polarity_high)
+ devflags |= ISP1760_FLAG_DREQ_POL_HIGH;
+ }
+
+ ret = isp1760_register(mem_res, irq_res->start, irqflags, &pdev->dev,
+ devflags);
+ if (ret < 0)
+ return ret;
+
+ pr_info("ISP1760 USB device initialised\n");
+ return 0;
+}
+
+static int isp1760_plat_remove(struct platform_device *pdev)
+{
+ isp1760_unregister(&pdev->dev);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id isp1760_of_match[] = {
+ { .compatible = "nxp,usb-isp1760", },
+ { .compatible = "nxp,usb-isp1761", },
+ { },
+};
+MODULE_DEVICE_TABLE(of, isp1760_of_match);
+#endif
+
+static struct platform_driver isp1760_plat_driver = {
+ .probe = isp1760_plat_probe,
+ .remove = isp1760_plat_remove,
+ .driver = {
+ .name = "isp1760",
+ .of_match_table = of_match_ptr(isp1760_of_match),
+ },
+};
+
+static int __init isp1760_init(void)
+{
+ int ret, any_ret = -ENODEV;
+
+ isp1760_init_kmem_once();
+
+ ret = platform_driver_register(&isp1760_plat_driver);
+ if (!ret)
+ any_ret = 0;
+#ifdef CONFIG_PCI
+ ret = pci_register_driver(&isp1761_pci_driver);
+ if (!ret)
+ any_ret = 0;
+#endif
+
+ if (any_ret)
+ isp1760_deinit_kmem_cache();
+ return any_ret;
+}
+module_init(isp1760_init);
+
+static void __exit isp1760_exit(void)
+{
+ platform_driver_unregister(&isp1760_plat_driver);
+#ifdef CONFIG_PCI
+ pci_unregister_driver(&isp1761_pci_driver);
+#endif
+ isp1760_deinit_kmem_cache();
+}
+module_exit(isp1760_exit);
--- /dev/null
+/*
+ * Driver for the NXP ISP1760 chip
+ *
+ * Copyright 2014 Laurent Pinchart
+ * Copyright 2007 Sebastian Siewior
+ *
+ * Contacts:
+ * Sebastian Siewior <bigeasy@linutronix.de>
+ * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ */
+
+#ifndef _ISP1760_REGS_H_
+#define _ISP1760_REGS_H_
+
+/* -----------------------------------------------------------------------------
+ * Host Controller
+ */
+
+/* EHCI capability registers */
+#define HC_CAPLENGTH 0x000
+#define HC_LENGTH(p) (((p) >> 00) & 0x00ff) /* bits 7:0 */
+#define HC_VERSION(p) (((p) >> 16) & 0xffff) /* bits 31:16 */
+
+#define HC_HCSPARAMS 0x004
+#define HCS_INDICATOR(p) ((p) & (1 << 16)) /* true: has port indicators */
+#define HCS_PPC(p) ((p) & (1 << 4)) /* true: port power control */
+#define HCS_N_PORTS(p) (((p) >> 0) & 0xf) /* bits 3:0, ports on HC */
+
+#define HC_HCCPARAMS 0x008
+#define HCC_ISOC_CACHE(p) ((p) & (1 << 7)) /* true: can cache isoc frame */
+#define HCC_ISOC_THRES(p) (((p) >> 4) & 0x7) /* bits 6:4, uframes cached */
+
+/* EHCI operational registers */
+#define HC_USBCMD 0x020
+#define CMD_LRESET (1 << 7) /* partial reset (no ports, etc) */
+#define CMD_RESET (1 << 1) /* reset HC not bus */
+#define CMD_RUN (1 << 0) /* start/stop HC */
+
+#define HC_USBSTS 0x024
+#define STS_PCD (1 << 2) /* port change detect */
+
+#define HC_FRINDEX 0x02c
+
+#define HC_CONFIGFLAG 0x060
+#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */
+
+#define HC_PORTSC1 0x064
+#define PORT_OWNER (1 << 13) /* true: companion hc owns this port */
+#define PORT_POWER (1 << 12) /* true: has power (see PPC) */
+#define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */
+#define PORT_RESET (1 << 8) /* reset port */
+#define PORT_SUSPEND (1 << 7) /* suspend port */
+#define PORT_RESUME (1 << 6) /* resume it */
+#define PORT_PE (1 << 2) /* port enable */
+#define PORT_CSC (1 << 1) /* connect status change */
+#define PORT_CONNECT (1 << 0) /* device connected */
+#define PORT_RWC_BITS (PORT_CSC)
+
+#define HC_ISO_PTD_DONEMAP_REG 0x130
+#define HC_ISO_PTD_SKIPMAP_REG 0x134
+#define HC_ISO_PTD_LASTPTD_REG 0x138
+#define HC_INT_PTD_DONEMAP_REG 0x140
+#define HC_INT_PTD_SKIPMAP_REG 0x144
+#define HC_INT_PTD_LASTPTD_REG 0x148
+#define HC_ATL_PTD_DONEMAP_REG 0x150
+#define HC_ATL_PTD_SKIPMAP_REG 0x154
+#define HC_ATL_PTD_LASTPTD_REG 0x158
+
+/* Configuration Register */
+#define HC_HW_MODE_CTRL 0x300
+#define ALL_ATX_RESET (1 << 31)
+#define HW_ANA_DIGI_OC (1 << 15)
+#define HW_DEV_DMA (1 << 11)
+#define HW_COMN_IRQ (1 << 10)
+#define HW_COMN_DMA (1 << 9)
+#define HW_DATA_BUS_32BIT (1 << 8)
+#define HW_DACK_POL_HIGH (1 << 6)
+#define HW_DREQ_POL_HIGH (1 << 5)
+#define HW_INTR_HIGH_ACT (1 << 2)
+#define HW_INTR_EDGE_TRIG (1 << 1)
+#define HW_GLOBAL_INTR_EN (1 << 0)
+
+#define HC_CHIP_ID_REG 0x304
+#define HC_SCRATCH_REG 0x308
+
+#define HC_RESET_REG 0x30c
+#define SW_RESET_RESET_HC (1 << 1)
+#define SW_RESET_RESET_ALL (1 << 0)
+
+#define HC_BUFFER_STATUS_REG 0x334
+#define ISO_BUF_FILL (1 << 2)
+#define INT_BUF_FILL (1 << 1)
+#define ATL_BUF_FILL (1 << 0)
+
+#define HC_MEMORY_REG 0x33c
+#define ISP_BANK(x) ((x) << 16)
+
+#define HC_PORT1_CTRL 0x374
+#define PORT1_POWER (3 << 3)
+#define PORT1_INIT1 (1 << 7)
+#define PORT1_INIT2 (1 << 23)
+#define HW_OTG_CTRL_SET 0x374
+#define HW_OTG_CTRL_CLR 0x376
+#define HW_OTG_DISABLE (1 << 10)
+#define HW_OTG_SE0_EN (1 << 9)
+#define HW_BDIS_ACON_EN (1 << 8)
+#define HW_SW_SEL_HC_DC (1 << 7)
+#define HW_VBUS_CHRG (1 << 6)
+#define HW_VBUS_DISCHRG (1 << 5)
+#define HW_VBUS_DRV (1 << 4)
+#define HW_SEL_CP_EXT (1 << 3)
+#define HW_DM_PULLDOWN (1 << 2)
+#define HW_DP_PULLDOWN (1 << 1)
+#define HW_DP_PULLUP (1 << 0)
+
+/* Interrupt Register */
+#define HC_INTERRUPT_REG 0x310
+
+#define HC_INTERRUPT_ENABLE 0x314
+#define HC_ISO_INT (1 << 9)
+#define HC_ATL_INT (1 << 8)
+#define HC_INTL_INT (1 << 7)
+#define HC_EOT_INT (1 << 3)
+#define HC_SOT_INT (1 << 1)
+#define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT)
+
+#define HC_ISO_IRQ_MASK_OR_REG 0x318
+#define HC_INT_IRQ_MASK_OR_REG 0x31c
+#define HC_ATL_IRQ_MASK_OR_REG 0x320
+#define HC_ISO_IRQ_MASK_AND_REG 0x324
+#define HC_INT_IRQ_MASK_AND_REG 0x328
+#define HC_ATL_IRQ_MASK_AND_REG 0x32c
+
+/* -----------------------------------------------------------------------------
+ * Peripheral Controller
+ */
+
+/* Initialization Registers */
+#define DC_ADDRESS 0x0200
+#define DC_DEVEN (1 << 7)
+
+#define DC_MODE 0x020c
+#define DC_DMACLKON (1 << 9)
+#define DC_VBUSSTAT (1 << 8)
+#define DC_CLKAON (1 << 7)
+#define DC_SNDRSU (1 << 6)
+#define DC_GOSUSP (1 << 5)
+#define DC_SFRESET (1 << 4)
+#define DC_GLINTENA (1 << 3)
+#define DC_WKUPCS (1 << 2)
+
+#define DC_INTCONF 0x0210
+#define DC_CDBGMOD_ACK_NAK (0 << 6)
+#define DC_CDBGMOD_ACK (1 << 6)
+#define DC_CDBGMOD_ACK_1NAK (2 << 6)
+#define DC_DDBGMODIN_ACK_NAK (0 << 4)
+#define DC_DDBGMODIN_ACK (1 << 4)
+#define DC_DDBGMODIN_ACK_1NAK (2 << 4)
+#define DC_DDBGMODOUT_ACK_NYET_NAK (0 << 2)
+#define DC_DDBGMODOUT_ACK_NYET (1 << 2)
+#define DC_DDBGMODOUT_ACK_NYET_1NAK (2 << 2)
+#define DC_INTLVL (1 << 1)
+#define DC_INTPOL (1 << 0)
+
+#define DC_DEBUG 0x0212
+#define DC_INTENABLE 0x0214
+#define DC_IEPTX(n) (1 << (11 + 2 * (n)))
+#define DC_IEPRX(n) (1 << (10 + 2 * (n)))
+#define DC_IEPRXTX(n) (3 << (10 + 2 * (n)))
+#define DC_IEP0SETUP (1 << 8)
+#define DC_IEVBUS (1 << 7)
+#define DC_IEDMA (1 << 6)
+#define DC_IEHS_STA (1 << 5)
+#define DC_IERESM (1 << 4)
+#define DC_IESUSP (1 << 3)
+#define DC_IEPSOF (1 << 2)
+#define DC_IESOF (1 << 1)
+#define DC_IEBRST (1 << 0)
+
+/* Data Flow Registers */
+#define DC_EPINDEX 0x022c
+#define DC_EP0SETUP (1 << 5)
+#define DC_ENDPIDX(n) ((n) << 1)
+#define DC_EPDIR (1 << 0)
+
+#define DC_CTRLFUNC 0x0228
+#define DC_CLBUF (1 << 4)
+#define DC_VENDP (1 << 3)
+#define DC_DSEN (1 << 2)
+#define DC_STATUS (1 << 1)
+#define DC_STALL (1 << 0)
+
+#define DC_DATAPORT 0x0220
+#define DC_BUFLEN 0x021c
+#define DC_DATACOUNT_MASK 0xffff
+#define DC_BUFSTAT 0x021e
+#define DC_EPMAXPKTSZ 0x0204
+
+#define DC_EPTYPE 0x0208
+#define DC_NOEMPKT (1 << 4)
+#define DC_EPENABLE (1 << 3)
+#define DC_DBLBUF (1 << 2)
+#define DC_ENDPTYP_ISOC (1 << 0)
+#define DC_ENDPTYP_BULK (2 << 0)
+#define DC_ENDPTYP_INTERRUPT (3 << 0)
+
+/* DMA Registers */
+#define DC_DMACMD 0x0230
+#define DC_DMATXCOUNT 0x0234
+#define DC_DMACONF 0x0238
+#define DC_DMAHW 0x023c
+#define DC_DMAINTREASON 0x0250
+#define DC_DMAINTEN 0x0254
+#define DC_DMAEP 0x0258
+#define DC_DMABURSTCOUNT 0x0264
+
+/* General Registers */
+#define DC_INTERRUPT 0x0218
+#define DC_CHIPID 0x0270
+#define DC_FRAMENUM 0x0274
+#define DC_SCRATCH 0x0278
+#define DC_UNLOCKDEV 0x027c
+#define DC_INTPULSEWIDTH 0x0280
+#define DC_TESTMODE 0x0284
+
+#endif
--- /dev/null
+/*
+ * Driver for the NXP ISP1761 device controller
+ *
+ * Copyright 2014 Ideas on Board Oy
+ *
+ * Contacts:
+ * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/timer.h>
+#include <linux/usb.h>
+
+#include "isp1760-core.h"
+#include "isp1760-regs.h"
+#include "isp1760-udc.h"
+
+#define ISP1760_VBUS_POLL_INTERVAL msecs_to_jiffies(500)
+
+struct isp1760_request {
+ struct usb_request req;
+ struct list_head queue;
+ struct isp1760_ep *ep;
+ unsigned int packet_size;
+};
+
+static inline struct isp1760_udc *gadget_to_udc(struct usb_gadget *gadget)
+{
+ return container_of(gadget, struct isp1760_udc, gadget);
+}
+
+static inline struct isp1760_ep *ep_to_udc_ep(struct usb_ep *ep)
+{
+ return container_of(ep, struct isp1760_ep, ep);
+}
+
+static inline struct isp1760_request *req_to_udc_req(struct usb_request *req)
+{
+ return container_of(req, struct isp1760_request, req);
+}
+
+static inline u32 isp1760_udc_read(struct isp1760_udc *udc, u16 reg)
+{
+ return isp1760_read32(udc->regs, reg);
+}
+
+static inline void isp1760_udc_write(struct isp1760_udc *udc, u16 reg, u32 val)
+{
+ isp1760_write32(udc->regs, reg, val);
+}
+
+/* -----------------------------------------------------------------------------
+ * Endpoint Management
+ */
+
+static struct isp1760_ep *isp1760_udc_find_ep(struct isp1760_udc *udc,
+ u16 index)
+{
+ unsigned int i;
+
+ if (index == 0)
+ return &udc->ep[0];
+
+ for (i = 1; i < ARRAY_SIZE(udc->ep); ++i) {
+ if (udc->ep[i].addr == index)
+ return udc->ep[i].desc ? &udc->ep[i] : NULL;
+ }
+
+ return NULL;
+}
+
+static void __isp1760_udc_select_ep(struct isp1760_ep *ep, int dir)
+{
+ isp1760_udc_write(ep->udc, DC_EPINDEX,
+ DC_ENDPIDX(ep->addr & USB_ENDPOINT_NUMBER_MASK) |
+ (dir == USB_DIR_IN ? DC_EPDIR : 0));
+}
+
+/**
+ * isp1760_udc_select_ep - Select an endpoint for register access
+ * @ep: The endpoint
+ *
+ * The ISP1761 endpoint registers are banked. This function selects the target
+ * endpoint for banked register access. The selection remains valid until the
+ * next call to this function, the next direct access to the EPINDEX register
+ * or the next reset, whichever comes first.
+ *
+ * Called with the UDC spinlock held.
+ */
+static void isp1760_udc_select_ep(struct isp1760_ep *ep)
+{
+ __isp1760_udc_select_ep(ep, ep->addr & USB_ENDPOINT_DIR_MASK);
+}
+
+/* Called with the UDC spinlock held. */
+static void isp1760_udc_ctrl_send_status(struct isp1760_ep *ep, int dir)
+{
+ struct isp1760_udc *udc = ep->udc;
+
+ /*
+ * Proceed to the status stage. The status stage data packet flows in
+ * the direction opposite to the data stage data packets, we thus need
+ * to select the OUT/IN endpoint for IN/OUT transfers.
+ */
+ isp1760_udc_write(udc, DC_EPINDEX, DC_ENDPIDX(0) |
+ (dir == USB_DIR_IN ? 0 : DC_EPDIR));
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_STATUS);
+
+ /*
+ * The hardware will terminate the request automatically and go back to
+ * the setup stage without notifying us.
+ */
+ udc->ep0_state = ISP1760_CTRL_SETUP;
+}
+
+/* Called without the UDC spinlock held. */
+static void isp1760_udc_request_complete(struct isp1760_ep *ep,
+ struct isp1760_request *req,
+ int status)
+{
+ struct isp1760_udc *udc = ep->udc;
+ unsigned long flags;
+
+ dev_dbg(ep->udc->isp->dev, "completing request %p with status %d\n",
+ req, status);
+
+ req->ep = NULL;
+ req->req.status = status;
+ req->req.complete(&ep->ep, &req->req);
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ /*
+ * When completing control OUT requests, move to the status stage after
+ * calling the request complete callback. This gives the gadget an
+ * opportunity to stall the control transfer if needed.
+ */
+ if (status == 0 && ep->addr == 0 && udc->ep0_dir == USB_DIR_OUT)
+ isp1760_udc_ctrl_send_status(ep, USB_DIR_OUT);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+}
+
+static void isp1760_udc_ctrl_send_stall(struct isp1760_ep *ep)
+{
+ struct isp1760_udc *udc = ep->udc;
+ unsigned long flags;
+
+ dev_dbg(ep->udc->isp->dev, "%s(ep%02x)\n", __func__, ep->addr);
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ /* Stall both the IN and OUT endpoints. */
+ __isp1760_udc_select_ep(ep, USB_DIR_OUT);
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_STALL);
+ __isp1760_udc_select_ep(ep, USB_DIR_IN);
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_STALL);
+
+ /* A protocol stall completes the control transaction. */
+ udc->ep0_state = ISP1760_CTRL_SETUP;
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+}
+
+/* -----------------------------------------------------------------------------
+ * Data Endpoints
+ */
+
+/* Called with the UDC spinlock held. */
+static bool isp1760_udc_receive(struct isp1760_ep *ep,
+ struct isp1760_request *req)
+{
+ struct isp1760_udc *udc = ep->udc;
+ unsigned int len;
+ u32 *buf;
+ int i;
+
+ isp1760_udc_select_ep(ep);
+ len = isp1760_udc_read(udc, DC_BUFLEN) & DC_DATACOUNT_MASK;
+
+ dev_dbg(udc->isp->dev, "%s: received %u bytes (%u/%u done)\n",
+ __func__, len, req->req.actual, req->req.length);
+
+ len = min(len, req->req.length - req->req.actual);
+
+ if (!len) {
+ /*
+ * There's no data to be read from the FIFO, acknowledge the RX
+ * interrupt by clearing the buffer.
+ *
+ * TODO: What if another packet arrives in the meantime ? The
+ * datasheet doesn't clearly document how this should be
+ * handled.
+ */
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF);
+ return false;
+ }
+
+ buf = req->req.buf + req->req.actual;
+
+ /*
+ * Make sure not to read more than one extra byte, otherwise data from
+ * the next packet might be removed from the FIFO.
+ */
+ for (i = len; i > 2; i -= 4, ++buf)
+ *buf = le32_to_cpu(isp1760_udc_read(udc, DC_DATAPORT));
+ if (i > 0)
+ *(u16 *)buf = le16_to_cpu(readw(udc->regs + DC_DATAPORT));
+
+ req->req.actual += len;
+
+ /*
+ * TODO: The short_not_ok flag isn't supported yet, but isn't used by
+ * any gadget driver either.
+ */
+
+ dev_dbg(udc->isp->dev,
+ "%s: req %p actual/length %u/%u maxpacket %u packet size %u\n",
+ __func__, req, req->req.actual, req->req.length, ep->maxpacket,
+ len);
+
+ ep->rx_pending = false;
+
+ /*
+ * Complete the request if all data has been received or if a short
+ * packet has been received.
+ */
+ if (req->req.actual == req->req.length || len < ep->maxpacket) {
+ list_del(&req->queue);
+ return true;
+ }
+
+ return false;
+}
+
+static void isp1760_udc_transmit(struct isp1760_ep *ep,
+ struct isp1760_request *req)
+{
+ struct isp1760_udc *udc = ep->udc;
+ u32 *buf = req->req.buf + req->req.actual;
+ int i;
+
+ req->packet_size = min(req->req.length - req->req.actual,
+ ep->maxpacket);
+
+ dev_dbg(udc->isp->dev, "%s: transferring %u bytes (%u/%u done)\n",
+ __func__, req->packet_size, req->req.actual,
+ req->req.length);
+
+ __isp1760_udc_select_ep(ep, USB_DIR_IN);
+
+ if (req->packet_size)
+ isp1760_udc_write(udc, DC_BUFLEN, req->packet_size);
+
+ /*
+ * Make sure not to write more than one extra byte, otherwise extra data
+ * will stay in the FIFO and will be transmitted during the next control
+ * request. The endpoint control CLBUF bit is supposed to allow flushing
+ * the FIFO for this kind of conditions, but doesn't seem to work.
+ */
+ for (i = req->packet_size; i > 2; i -= 4, ++buf)
+ isp1760_udc_write(udc, DC_DATAPORT, cpu_to_le32(*buf));
+ if (i > 0)
+ writew(cpu_to_le16(*(u16 *)buf), udc->regs + DC_DATAPORT);
+
+ if (ep->addr == 0)
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN);
+ if (!req->packet_size)
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_VENDP);
+}
+
+static void isp1760_ep_rx_ready(struct isp1760_ep *ep)
+{
+ struct isp1760_udc *udc = ep->udc;
+ struct isp1760_request *req;
+ bool complete;
+
+ spin_lock(&udc->lock);
+
+ if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_OUT) {
+ spin_unlock(&udc->lock);
+ dev_dbg(udc->isp->dev, "%s: invalid ep0 state %u\n", __func__,
+ udc->ep0_state);
+ return;
+ }
+
+ if (ep->addr != 0 && !ep->desc) {
+ spin_unlock(&udc->lock);
+ dev_dbg(udc->isp->dev, "%s: ep%02x is disabled\n", __func__,
+ ep->addr);
+ return;
+ }
+
+ if (list_empty(&ep->queue)) {
+ ep->rx_pending = true;
+ spin_unlock(&udc->lock);
+ dev_dbg(udc->isp->dev, "%s: ep%02x (%p) has no request queued\n",
+ __func__, ep->addr, ep);
+ return;
+ }
+
+ req = list_first_entry(&ep->queue, struct isp1760_request,
+ queue);
+ complete = isp1760_udc_receive(ep, req);
+
+ spin_unlock(&udc->lock);
+
+ if (complete)
+ isp1760_udc_request_complete(ep, req, 0);
+}
+
+static void isp1760_ep_tx_complete(struct isp1760_ep *ep)
+{
+ struct isp1760_udc *udc = ep->udc;
+ struct isp1760_request *complete = NULL;
+ struct isp1760_request *req;
+ bool need_zlp;
+
+ spin_lock(&udc->lock);
+
+ if (ep->addr == 0 && udc->ep0_state != ISP1760_CTRL_DATA_IN) {
+ spin_unlock(&udc->lock);
+ dev_dbg(udc->isp->dev, "TX IRQ: invalid endpoint state %u\n",
+ udc->ep0_state);
+ return;
+ }
+
+ if (list_empty(&ep->queue)) {
+ /*
+ * This can happen for the control endpoint when the reply to
+ * the GET_STATUS IN control request is sent directly by the
+ * setup IRQ handler. Just proceed to the status stage.
+ */
+ if (ep->addr == 0) {
+ isp1760_udc_ctrl_send_status(ep, USB_DIR_IN);
+ spin_unlock(&udc->lock);
+ return;
+ }
+
+ spin_unlock(&udc->lock);
+ dev_dbg(udc->isp->dev, "%s: ep%02x has no request queued\n",
+ __func__, ep->addr);
+ return;
+ }
+
+ req = list_first_entry(&ep->queue, struct isp1760_request,
+ queue);
+ req->req.actual += req->packet_size;
+
+ need_zlp = req->req.actual == req->req.length &&
+ !(req->req.length % ep->maxpacket) &&
+ req->packet_size && req->req.zero;
+
+ dev_dbg(udc->isp->dev,
+ "TX IRQ: req %p actual/length %u/%u maxpacket %u packet size %u zero %u need zlp %u\n",
+ req, req->req.actual, req->req.length, ep->maxpacket,
+ req->packet_size, req->req.zero, need_zlp);
+
+ /*
+ * Complete the request if all data has been sent and we don't need to
+ * transmit a zero length packet.
+ */
+ if (req->req.actual == req->req.length && !need_zlp) {
+ complete = req;
+ list_del(&req->queue);
+
+ if (ep->addr == 0)
+ isp1760_udc_ctrl_send_status(ep, USB_DIR_IN);
+
+ if (!list_empty(&ep->queue))
+ req = list_first_entry(&ep->queue,
+ struct isp1760_request, queue);
+ else
+ req = NULL;
+ }
+
+ /*
+ * Transmit the next packet or start the next request, if any.
+ *
+ * TODO: If the endpoint is stalled the next request shouldn't be
+ * started, but what about the next packet ?
+ */
+ if (req)
+ isp1760_udc_transmit(ep, req);
+
+ spin_unlock(&udc->lock);
+
+ if (complete)
+ isp1760_udc_request_complete(ep, complete, 0);
+}
+
+static int __isp1760_udc_set_halt(struct isp1760_ep *ep, bool halt)
+{
+ struct isp1760_udc *udc = ep->udc;
+
+ dev_dbg(udc->isp->dev, "%s: %s halt on ep%02x\n", __func__,
+ halt ? "set" : "clear", ep->addr);
+
+ if (ep->desc && usb_endpoint_xfer_isoc(ep->desc)) {
+ dev_dbg(udc->isp->dev, "%s: ep%02x is isochronous\n", __func__,
+ ep->addr);
+ return -EINVAL;
+ }
+
+ isp1760_udc_select_ep(ep);
+ isp1760_udc_write(udc, DC_CTRLFUNC, halt ? DC_STALL : 0);
+
+ if (ep->addr == 0) {
+ /* When halting the control endpoint, stall both IN and OUT. */
+ __isp1760_udc_select_ep(ep, USB_DIR_IN);
+ isp1760_udc_write(udc, DC_CTRLFUNC, halt ? DC_STALL : 0);
+ } else if (!halt) {
+ /* Reset the data PID by cycling the endpoint enable bit. */
+ u16 eptype = isp1760_udc_read(udc, DC_EPTYPE);
+
+ isp1760_udc_write(udc, DC_EPTYPE, eptype & ~DC_EPENABLE);
+ isp1760_udc_write(udc, DC_EPTYPE, eptype);
+
+ /*
+ * Disabling the endpoint emptied the transmit FIFO, fill it
+ * again if a request is pending.
+ *
+ * TODO: Does the gadget framework require synchronizatino with
+ * the TX IRQ handler ?
+ */
+ if ((ep->addr & USB_DIR_IN) && !list_empty(&ep->queue)) {
+ struct isp1760_request *req;
+
+ req = list_first_entry(&ep->queue,
+ struct isp1760_request, queue);
+ isp1760_udc_transmit(ep, req);
+ }
+ }
+
+ ep->halted = halt;
+
+ return 0;
+}
+
+/* -----------------------------------------------------------------------------
+ * Control Endpoint
+ */
+
+static int isp1760_udc_get_status(struct isp1760_udc *udc,
+ const struct usb_ctrlrequest *req)
+{
+ struct isp1760_ep *ep;
+ u16 status;
+
+ if (req->wLength != cpu_to_le16(2) || req->wValue != cpu_to_le16(0))
+ return -EINVAL;
+
+ switch (req->bRequestType) {
+ case USB_DIR_IN | USB_RECIP_DEVICE:
+ status = udc->devstatus;
+ break;
+
+ case USB_DIR_IN | USB_RECIP_INTERFACE:
+ status = 0;
+ break;
+
+ case USB_DIR_IN | USB_RECIP_ENDPOINT:
+ ep = isp1760_udc_find_ep(udc, le16_to_cpu(req->wIndex));
+ if (!ep)
+ return -EINVAL;
+
+ status = 0;
+ if (ep->halted)
+ status |= 1 << USB_ENDPOINT_HALT;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ isp1760_udc_write(udc, DC_EPINDEX, DC_ENDPIDX(0) | DC_EPDIR);
+ isp1760_udc_write(udc, DC_BUFLEN, 2);
+
+ writew(cpu_to_le16(status), udc->regs + DC_DATAPORT);
+
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN);
+
+ dev_dbg(udc->isp->dev, "%s: status 0x%04x\n", __func__, status);
+
+ return 0;
+}
+
+static int isp1760_udc_set_address(struct isp1760_udc *udc, u16 addr)
+{
+ if (addr > 127) {
+ dev_dbg(udc->isp->dev, "invalid device address %u\n", addr);
+ return -EINVAL;
+ }
+
+ if (udc->gadget.state != USB_STATE_DEFAULT &&
+ udc->gadget.state != USB_STATE_ADDRESS) {
+ dev_dbg(udc->isp->dev, "can't set address in state %u\n",
+ udc->gadget.state);
+ return -EINVAL;
+ }
+
+ usb_gadget_set_state(&udc->gadget, addr ? USB_STATE_ADDRESS :
+ USB_STATE_DEFAULT);
+
+ isp1760_udc_write(udc, DC_ADDRESS, DC_DEVEN | addr);
+
+ spin_lock(&udc->lock);
+ isp1760_udc_ctrl_send_status(&udc->ep[0], USB_DIR_OUT);
+ spin_unlock(&udc->lock);
+
+ return 0;
+}
+
+static bool isp1760_ep0_setup_standard(struct isp1760_udc *udc,
+ struct usb_ctrlrequest *req)
+{
+ bool stall;
+
+ switch (req->bRequest) {
+ case USB_REQ_GET_STATUS:
+ return isp1760_udc_get_status(udc, req);
+
+ case USB_REQ_CLEAR_FEATURE:
+ switch (req->bRequestType) {
+ case USB_DIR_OUT | USB_RECIP_DEVICE: {
+ /* TODO: Handle remote wakeup feature. */
+ return true;
+ }
+
+ case USB_DIR_OUT | USB_RECIP_ENDPOINT: {
+ u16 index = le16_to_cpu(req->wIndex);
+ struct isp1760_ep *ep;
+
+ if (req->wLength != cpu_to_le16(0) ||
+ req->wValue != cpu_to_le16(USB_ENDPOINT_HALT))
+ return true;
+
+ ep = isp1760_udc_find_ep(udc, index);
+ if (!ep)
+ return true;
+
+ spin_lock(&udc->lock);
+
+ /*
+ * If the endpoint is wedged only the gadget can clear
+ * the halt feature. Pretend success in that case, but
+ * keep the endpoint halted.
+ */
+ if (!ep->wedged)
+ stall = __isp1760_udc_set_halt(ep, false);
+ else
+ stall = false;
+
+ if (!stall)
+ isp1760_udc_ctrl_send_status(&udc->ep[0],
+ USB_DIR_OUT);
+
+ spin_unlock(&udc->lock);
+ return stall;
+ }
+
+ default:
+ return true;
+ }
+ break;
+
+ case USB_REQ_SET_FEATURE:
+ switch (req->bRequestType) {
+ case USB_DIR_OUT | USB_RECIP_DEVICE: {
+ /* TODO: Handle remote wakeup and test mode features */
+ return true;
+ }
+
+ case USB_DIR_OUT | USB_RECIP_ENDPOINT: {
+ u16 index = le16_to_cpu(req->wIndex);
+ struct isp1760_ep *ep;
+
+ if (req->wLength != cpu_to_le16(0) ||
+ req->wValue != cpu_to_le16(USB_ENDPOINT_HALT))
+ return true;
+
+ ep = isp1760_udc_find_ep(udc, index);
+ if (!ep)
+ return true;
+
+ spin_lock(&udc->lock);
+
+ stall = __isp1760_udc_set_halt(ep, true);
+ if (!stall)
+ isp1760_udc_ctrl_send_status(&udc->ep[0],
+ USB_DIR_OUT);
+
+ spin_unlock(&udc->lock);
+ return stall;
+ }
+
+ default:
+ return true;
+ }
+ break;
+
+ case USB_REQ_SET_ADDRESS:
+ if (req->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
+ return true;
+
+ return isp1760_udc_set_address(udc, le16_to_cpu(req->wValue));
+
+ case USB_REQ_SET_CONFIGURATION:
+ if (req->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
+ return true;
+
+ if (udc->gadget.state != USB_STATE_ADDRESS &&
+ udc->gadget.state != USB_STATE_CONFIGURED)
+ return true;
+
+ stall = udc->driver->setup(&udc->gadget, req) < 0;
+ if (stall)
+ return true;
+
+ usb_gadget_set_state(&udc->gadget, req->wValue ?
+ USB_STATE_CONFIGURED : USB_STATE_ADDRESS);
+
+ /*
+ * SET_CONFIGURATION (and SET_INTERFACE) must reset the halt
+ * feature on all endpoints. There is however no need to do so
+ * explicitly here as the gadget driver will disable and
+ * reenable endpoints, clearing the halt feature.
+ */
+ return false;
+
+ default:
+ return udc->driver->setup(&udc->gadget, req) < 0;
+ }
+}
+
+static void isp1760_ep0_setup(struct isp1760_udc *udc)
+{
+ union {
+ struct usb_ctrlrequest r;
+ u32 data[2];
+ } req;
+ unsigned int count;
+ bool stall = false;
+
+ spin_lock(&udc->lock);
+
+ isp1760_udc_write(udc, DC_EPINDEX, DC_EP0SETUP);
+
+ count = isp1760_udc_read(udc, DC_BUFLEN) & DC_DATACOUNT_MASK;
+ if (count != sizeof(req)) {
+ spin_unlock(&udc->lock);
+
+ dev_err(udc->isp->dev, "invalid length %u for setup packet\n",
+ count);
+
+ isp1760_udc_ctrl_send_stall(&udc->ep[0]);
+ return;
+ }
+
+ req.data[0] = isp1760_udc_read(udc, DC_DATAPORT);
+ req.data[1] = isp1760_udc_read(udc, DC_DATAPORT);
+
+ if (udc->ep0_state != ISP1760_CTRL_SETUP) {
+ spin_unlock(&udc->lock);
+ dev_dbg(udc->isp->dev, "unexpected SETUP packet\n");
+ return;
+ }
+
+ /* Move to the data stage. */
+ if (!req.r.wLength)
+ udc->ep0_state = ISP1760_CTRL_STATUS;
+ else if (req.r.bRequestType & USB_DIR_IN)
+ udc->ep0_state = ISP1760_CTRL_DATA_IN;
+ else
+ udc->ep0_state = ISP1760_CTRL_DATA_OUT;
+
+ udc->ep0_dir = req.r.bRequestType & USB_DIR_IN;
+ udc->ep0_length = le16_to_cpu(req.r.wLength);
+
+ spin_unlock(&udc->lock);
+
+ dev_dbg(udc->isp->dev,
+ "%s: bRequestType 0x%02x bRequest 0x%02x wValue 0x%04x wIndex 0x%04x wLength 0x%04x\n",
+ __func__, req.r.bRequestType, req.r.bRequest,
+ le16_to_cpu(req.r.wValue), le16_to_cpu(req.r.wIndex),
+ le16_to_cpu(req.r.wLength));
+
+ if ((req.r.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
+ stall = isp1760_ep0_setup_standard(udc, &req.r);
+ else
+ stall = udc->driver->setup(&udc->gadget, &req.r) < 0;
+
+ if (stall)
+ isp1760_udc_ctrl_send_stall(&udc->ep[0]);
+}
+
+/* -----------------------------------------------------------------------------
+ * Gadget Endpoint Operations
+ */
+
+static int isp1760_ep_enable(struct usb_ep *ep,
+ const struct usb_endpoint_descriptor *desc)
+{
+ struct isp1760_ep *uep = ep_to_udc_ep(ep);
+ struct isp1760_udc *udc = uep->udc;
+ unsigned long flags;
+ unsigned int type;
+
+ dev_dbg(uep->udc->isp->dev, "%s\n", __func__);
+
+ /*
+ * Validate the descriptor. The control endpoint can't be enabled
+ * manually.
+ */
+ if (desc->bDescriptorType != USB_DT_ENDPOINT ||
+ desc->bEndpointAddress == 0 ||
+ desc->bEndpointAddress != uep->addr ||
+ le16_to_cpu(desc->wMaxPacketSize) > ep->maxpacket) {
+ dev_dbg(udc->isp->dev,
+ "%s: invalid descriptor type %u addr %02x ep addr %02x max packet size %u/%u\n",
+ __func__, desc->bDescriptorType,
+ desc->bEndpointAddress, uep->addr,
+ le16_to_cpu(desc->wMaxPacketSize), ep->maxpacket);
+ return -EINVAL;
+ }
+
+ switch (usb_endpoint_type(desc)) {
+ case USB_ENDPOINT_XFER_ISOC:
+ type = DC_ENDPTYP_ISOC;
+ break;
+ case USB_ENDPOINT_XFER_BULK:
+ type = DC_ENDPTYP_BULK;
+ break;
+ case USB_ENDPOINT_XFER_INT:
+ type = DC_ENDPTYP_INTERRUPT;
+ break;
+ case USB_ENDPOINT_XFER_CONTROL:
+ default:
+ dev_dbg(udc->isp->dev, "%s: control endpoints unsupported\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ uep->desc = desc;
+ uep->maxpacket = le16_to_cpu(desc->wMaxPacketSize);
+ uep->rx_pending = false;
+ uep->halted = false;
+ uep->wedged = false;
+
+ isp1760_udc_select_ep(uep);
+ isp1760_udc_write(udc, DC_EPMAXPKTSZ, uep->maxpacket);
+ isp1760_udc_write(udc, DC_BUFLEN, uep->maxpacket);
+ isp1760_udc_write(udc, DC_EPTYPE, DC_EPENABLE | type);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+static int isp1760_ep_disable(struct usb_ep *ep)
+{
+ struct isp1760_ep *uep = ep_to_udc_ep(ep);
+ struct isp1760_udc *udc = uep->udc;
+ struct isp1760_request *req, *nreq;
+ LIST_HEAD(req_list);
+ unsigned long flags;
+
+ dev_dbg(udc->isp->dev, "%s\n", __func__);
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ if (!uep->desc) {
+ dev_dbg(udc->isp->dev, "%s: endpoint not enabled\n", __func__);
+ spin_unlock_irqrestore(&udc->lock, flags);
+ return -EINVAL;
+ }
+
+ uep->desc = NULL;
+ uep->maxpacket = 0;
+
+ isp1760_udc_select_ep(uep);
+ isp1760_udc_write(udc, DC_EPTYPE, 0);
+
+ /* TODO Synchronize with the IRQ handler */
+
+ list_splice_init(&uep->queue, &req_list);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ list_for_each_entry_safe(req, nreq, &req_list, queue) {
+ list_del(&req->queue);
+ isp1760_udc_request_complete(uep, req, -ESHUTDOWN);
+ }
+
+ return 0;
+}
+
+static struct usb_request *isp1760_ep_alloc_request(struct usb_ep *ep,
+ gfp_t gfp_flags)
+{
+ struct isp1760_request *req;
+
+ req = kzalloc(sizeof(*req), gfp_flags);
+
+ return &req->req;
+}
+
+static void isp1760_ep_free_request(struct usb_ep *ep, struct usb_request *_req)
+{
+ struct isp1760_request *req = req_to_udc_req(_req);
+
+ kfree(req);
+}
+
+static int isp1760_ep_queue(struct usb_ep *ep, struct usb_request *_req,
+ gfp_t gfp_flags)
+{
+ struct isp1760_request *req = req_to_udc_req(_req);
+ struct isp1760_ep *uep = ep_to_udc_ep(ep);
+ struct isp1760_udc *udc = uep->udc;
+ bool complete = false;
+ unsigned long flags;
+ int ret = 0;
+
+ _req->status = -EINPROGRESS;
+ _req->actual = 0;
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ dev_dbg(udc->isp->dev,
+ "%s: req %p (%u bytes%s) ep %p(0x%02x)\n", __func__, _req,
+ _req->length, _req->zero ? " (zlp)" : "", uep, uep->addr);
+
+ req->ep = uep;
+
+ if (uep->addr == 0) {
+ if (_req->length != udc->ep0_length &&
+ udc->ep0_state != ISP1760_CTRL_DATA_IN) {
+ dev_dbg(udc->isp->dev,
+ "%s: invalid length %u for req %p\n",
+ __func__, _req->length, req);
+ ret = -EINVAL;
+ goto done;
+ }
+
+ switch (udc->ep0_state) {
+ case ISP1760_CTRL_DATA_IN:
+ dev_dbg(udc->isp->dev, "%s: transmitting req %p\n",
+ __func__, req);
+
+ list_add_tail(&req->queue, &uep->queue);
+ isp1760_udc_transmit(uep, req);
+ break;
+
+ case ISP1760_CTRL_DATA_OUT:
+ list_add_tail(&req->queue, &uep->queue);
+ __isp1760_udc_select_ep(uep, USB_DIR_OUT);
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_DSEN);
+ break;
+
+ case ISP1760_CTRL_STATUS:
+ complete = true;
+ break;
+
+ default:
+ dev_dbg(udc->isp->dev, "%s: invalid ep0 state\n",
+ __func__);
+ ret = -EINVAL;
+ break;
+ }
+ } else if (uep->desc) {
+ bool empty = list_empty(&uep->queue);
+
+ list_add_tail(&req->queue, &uep->queue);
+ if ((uep->addr & USB_DIR_IN) && !uep->halted && empty)
+ isp1760_udc_transmit(uep, req);
+ else if (!(uep->addr & USB_DIR_IN) && uep->rx_pending)
+ complete = isp1760_udc_receive(uep, req);
+ } else {
+ dev_dbg(udc->isp->dev,
+ "%s: can't queue request to disabled ep%02x\n",
+ __func__, uep->addr);
+ ret = -ESHUTDOWN;
+ }
+
+done:
+ if (ret < 0)
+ req->ep = NULL;
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ if (complete)
+ isp1760_udc_request_complete(uep, req, 0);
+
+ return ret;
+}
+
+static int isp1760_ep_dequeue(struct usb_ep *ep, struct usb_request *_req)
+{
+ struct isp1760_request *req = req_to_udc_req(_req);
+ struct isp1760_ep *uep = ep_to_udc_ep(ep);
+ struct isp1760_udc *udc = uep->udc;
+ unsigned long flags;
+
+ dev_dbg(uep->udc->isp->dev, "%s(ep%02x)\n", __func__, uep->addr);
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ if (req->ep != uep)
+ req = NULL;
+ else
+ list_del(&req->queue);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ if (!req)
+ return -EINVAL;
+
+ isp1760_udc_request_complete(uep, req, -ECONNRESET);
+ return 0;
+}
+
+static int __isp1760_ep_set_halt(struct isp1760_ep *uep, bool stall, bool wedge)
+{
+ struct isp1760_udc *udc = uep->udc;
+ int ret;
+
+ if (!uep->addr) {
+ /*
+ * Halting the control endpoint is only valid as a delayed error
+ * response to a SETUP packet. Make sure EP0 is in the right
+ * stage and that the gadget isn't trying to clear the halt
+ * condition.
+ */
+ if (WARN_ON(udc->ep0_state == ISP1760_CTRL_SETUP || !stall ||
+ wedge)) {
+ return -EINVAL;
+ }
+ }
+
+ if (uep->addr && !uep->desc) {
+ dev_dbg(udc->isp->dev, "%s: ep%02x is disabled\n", __func__,
+ uep->addr);
+ return -EINVAL;
+ }
+
+ if (uep->addr & USB_DIR_IN) {
+ /* Refuse to halt IN endpoints with active transfers. */
+ if (!list_empty(&uep->queue)) {
+ dev_dbg(udc->isp->dev,
+ "%s: ep%02x has request pending\n", __func__,
+ uep->addr);
+ return -EAGAIN;
+ }
+ }
+
+ ret = __isp1760_udc_set_halt(uep, stall);
+ if (ret < 0)
+ return ret;
+
+ if (!uep->addr) {
+ /*
+ * Stalling EP0 completes the control transaction, move back to
+ * the SETUP state.
+ */
+ udc->ep0_state = ISP1760_CTRL_SETUP;
+ return 0;
+ }
+
+ if (wedge)
+ uep->wedged = true;
+ else if (!stall)
+ uep->wedged = false;
+
+ return 0;
+}
+
+static int isp1760_ep_set_halt(struct usb_ep *ep, int value)
+{
+ struct isp1760_ep *uep = ep_to_udc_ep(ep);
+ unsigned long flags;
+ int ret;
+
+ dev_dbg(uep->udc->isp->dev, "%s: %s halt on ep%02x\n", __func__,
+ value ? "set" : "clear", uep->addr);
+
+ spin_lock_irqsave(&uep->udc->lock, flags);
+ ret = __isp1760_ep_set_halt(uep, value, false);
+ spin_unlock_irqrestore(&uep->udc->lock, flags);
+
+ return ret;
+}
+
+static int isp1760_ep_set_wedge(struct usb_ep *ep)
+{
+ struct isp1760_ep *uep = ep_to_udc_ep(ep);
+ unsigned long flags;
+ int ret;
+
+ dev_dbg(uep->udc->isp->dev, "%s: set wedge on ep%02x)\n", __func__,
+ uep->addr);
+
+ spin_lock_irqsave(&uep->udc->lock, flags);
+ ret = __isp1760_ep_set_halt(uep, true, true);
+ spin_unlock_irqrestore(&uep->udc->lock, flags);
+
+ return ret;
+}
+
+static void isp1760_ep_fifo_flush(struct usb_ep *ep)
+{
+ struct isp1760_ep *uep = ep_to_udc_ep(ep);
+ struct isp1760_udc *udc = uep->udc;
+ unsigned long flags;
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ isp1760_udc_select_ep(uep);
+
+ /*
+ * Set the CLBUF bit twice to flush both buffers in case double
+ * buffering is enabled.
+ */
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF);
+ isp1760_udc_write(udc, DC_CTRLFUNC, DC_CLBUF);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+}
+
+static const struct usb_ep_ops isp1760_ep_ops = {
+ .enable = isp1760_ep_enable,
+ .disable = isp1760_ep_disable,
+ .alloc_request = isp1760_ep_alloc_request,
+ .free_request = isp1760_ep_free_request,
+ .queue = isp1760_ep_queue,
+ .dequeue = isp1760_ep_dequeue,
+ .set_halt = isp1760_ep_set_halt,
+ .set_wedge = isp1760_ep_set_wedge,
+ .fifo_flush = isp1760_ep_fifo_flush,
+};
+
+/* -----------------------------------------------------------------------------
+ * Device States
+ */
+
+/* Called with the UDC spinlock held. */
+static void isp1760_udc_connect(struct isp1760_udc *udc)
+{
+ usb_gadget_set_state(&udc->gadget, USB_STATE_POWERED);
+ mod_timer(&udc->vbus_timer, jiffies + ISP1760_VBUS_POLL_INTERVAL);
+}
+
+/* Called with the UDC spinlock held. */
+static void isp1760_udc_disconnect(struct isp1760_udc *udc)
+{
+ if (udc->gadget.state < USB_STATE_POWERED)
+ return;
+
+ dev_dbg(udc->isp->dev, "Device disconnected in state %u\n",
+ udc->gadget.state);
+
+ udc->gadget.speed = USB_SPEED_UNKNOWN;
+ usb_gadget_set_state(&udc->gadget, USB_STATE_ATTACHED);
+
+ if (udc->driver->disconnect)
+ udc->driver->disconnect(&udc->gadget);
+
+ del_timer(&udc->vbus_timer);
+
+ /* TODO Reset all endpoints ? */
+}
+
+static void isp1760_udc_init_hw(struct isp1760_udc *udc)
+{
+ /*
+ * The device controller currently shares its interrupt with the host
+ * controller, the DC_IRQ polarity and signaling mode are ignored. Set
+ * the to active-low level-triggered.
+ *
+ * Configure the control, in and out pipes to generate interrupts on
+ * ACK tokens only (and NYET for the out pipe). The default
+ * configuration also generates an interrupt on the first NACK token.
+ */
+ isp1760_udc_write(udc, DC_INTCONF, DC_CDBGMOD_ACK | DC_DDBGMODIN_ACK |
+ DC_DDBGMODOUT_ACK_NYET);
+
+ isp1760_udc_write(udc, DC_INTENABLE, DC_IEPRXTX(7) | DC_IEPRXTX(6) |
+ DC_IEPRXTX(5) | DC_IEPRXTX(4) | DC_IEPRXTX(3) |
+ DC_IEPRXTX(2) | DC_IEPRXTX(1) | DC_IEPRXTX(0) |
+ DC_IEP0SETUP | DC_IEVBUS | DC_IERESM | DC_IESUSP |
+ DC_IEHS_STA | DC_IEBRST);
+
+ if (udc->connected)
+ isp1760_set_pullup(udc->isp, true);
+
+ isp1760_udc_write(udc, DC_ADDRESS, DC_DEVEN);
+}
+
+static void isp1760_udc_reset(struct isp1760_udc *udc)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ /*
+ * The bus reset has reset most registers to their default value,
+ * reinitialize the UDC hardware.
+ */
+ isp1760_udc_init_hw(udc);
+
+ udc->ep0_state = ISP1760_CTRL_SETUP;
+ udc->gadget.speed = USB_SPEED_FULL;
+
+ usb_gadget_udc_reset(&udc->gadget, udc->driver);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+}
+
+static void isp1760_udc_suspend(struct isp1760_udc *udc)
+{
+ if (udc->gadget.state < USB_STATE_DEFAULT)
+ return;
+
+ if (udc->driver->suspend)
+ udc->driver->suspend(&udc->gadget);
+}
+
+static void isp1760_udc_resume(struct isp1760_udc *udc)
+{
+ if (udc->gadget.state < USB_STATE_DEFAULT)
+ return;
+
+ if (udc->driver->resume)
+ udc->driver->resume(&udc->gadget);
+}
+
+/* -----------------------------------------------------------------------------
+ * Gadget Operations
+ */
+
+static int isp1760_udc_get_frame(struct usb_gadget *gadget)
+{
+ struct isp1760_udc *udc = gadget_to_udc(gadget);
+
+ return isp1760_udc_read(udc, DC_FRAMENUM) & ((1 << 11) - 1);
+}
+
+static int isp1760_udc_wakeup(struct usb_gadget *gadget)
+{
+ struct isp1760_udc *udc = gadget_to_udc(gadget);
+
+ dev_dbg(udc->isp->dev, "%s\n", __func__);
+ return -ENOTSUPP;
+}
+
+static int isp1760_udc_set_selfpowered(struct usb_gadget *gadget,
+ int is_selfpowered)
+{
+ struct isp1760_udc *udc = gadget_to_udc(gadget);
+
+ if (is_selfpowered)
+ udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
+ else
+ udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
+
+ return 0;
+}
+
+static int isp1760_udc_pullup(struct usb_gadget *gadget, int is_on)
+{
+ struct isp1760_udc *udc = gadget_to_udc(gadget);
+
+ isp1760_set_pullup(udc->isp, is_on);
+ udc->connected = is_on;
+
+ return 0;
+}
+
+static int isp1760_udc_start(struct usb_gadget *gadget,
+ struct usb_gadget_driver *driver)
+{
+ struct isp1760_udc *udc = gadget_to_udc(gadget);
+
+ /* The hardware doesn't support low speed. */
+ if (driver->max_speed < USB_SPEED_FULL) {
+ dev_err(udc->isp->dev, "Invalid gadget driver\n");
+ return -EINVAL;
+ }
+
+ spin_lock(&udc->lock);
+
+ if (udc->driver) {
+ dev_err(udc->isp->dev, "UDC already has a gadget driver\n");
+ spin_unlock(&udc->lock);
+ return -EBUSY;
+ }
+
+ udc->driver = driver;
+
+ spin_unlock(&udc->lock);
+
+ dev_dbg(udc->isp->dev, "starting UDC with driver %s\n",
+ driver->function);
+
+ udc->devstatus = 0;
+ udc->connected = true;
+
+ usb_gadget_set_state(&udc->gadget, USB_STATE_ATTACHED);
+
+ /* DMA isn't supported yet, don't enable the DMA clock. */
+ isp1760_udc_write(udc, DC_MODE, DC_GLINTENA);
+
+ isp1760_udc_init_hw(udc);
+
+ dev_dbg(udc->isp->dev, "UDC started with driver %s\n",
+ driver->function);
+
+ return 0;
+}
+
+static int isp1760_udc_stop(struct usb_gadget *gadget)
+{
+ struct isp1760_udc *udc = gadget_to_udc(gadget);
+
+ dev_dbg(udc->isp->dev, "%s\n", __func__);
+
+ del_timer_sync(&udc->vbus_timer);
+
+ isp1760_udc_write(udc, DC_MODE, 0);
+
+ spin_lock(&udc->lock);
+ udc->driver = NULL;
+ spin_unlock(&udc->lock);
+
+ return 0;
+}
+
+static struct usb_gadget_ops isp1760_udc_ops = {
+ .get_frame = isp1760_udc_get_frame,
+ .wakeup = isp1760_udc_wakeup,
+ .set_selfpowered = isp1760_udc_set_selfpowered,
+ .pullup = isp1760_udc_pullup,
+ .udc_start = isp1760_udc_start,
+ .udc_stop = isp1760_udc_stop,
+};
+
+/* -----------------------------------------------------------------------------
+ * Interrupt Handling
+ */
+
+static irqreturn_t isp1760_udc_irq(int irq, void *dev)
+{
+ struct isp1760_udc *udc = dev;
+ unsigned int i;
+ u32 status;
+
+ status = isp1760_udc_read(udc, DC_INTERRUPT)
+ & isp1760_udc_read(udc, DC_INTENABLE);
+ isp1760_udc_write(udc, DC_INTERRUPT, status);
+
+ if (status & DC_IEVBUS) {
+ dev_dbg(udc->isp->dev, "%s(VBUS)\n", __func__);
+ /* The VBUS interrupt is only triggered when VBUS appears. */
+ spin_lock(&udc->lock);
+ isp1760_udc_connect(udc);
+ spin_unlock(&udc->lock);
+ }
+
+ if (status & DC_IEBRST) {
+ dev_dbg(udc->isp->dev, "%s(BRST)\n", __func__);
+
+ isp1760_udc_reset(udc);
+ }
+
+ for (i = 0; i <= 7; ++i) {
+ struct isp1760_ep *ep = &udc->ep[i*2];
+
+ if (status & DC_IEPTX(i)) {
+ dev_dbg(udc->isp->dev, "%s(EPTX%u)\n", __func__, i);
+ isp1760_ep_tx_complete(ep);
+ }
+
+ if (status & DC_IEPRX(i)) {
+ dev_dbg(udc->isp->dev, "%s(EPRX%u)\n", __func__, i);
+ isp1760_ep_rx_ready(i ? ep - 1 : ep);
+ }
+ }
+
+ if (status & DC_IEP0SETUP) {
+ dev_dbg(udc->isp->dev, "%s(EP0SETUP)\n", __func__);
+
+ isp1760_ep0_setup(udc);
+ }
+
+ if (status & DC_IERESM) {
+ dev_dbg(udc->isp->dev, "%s(RESM)\n", __func__);
+ isp1760_udc_resume(udc);
+ }
+
+ if (status & DC_IESUSP) {
+ dev_dbg(udc->isp->dev, "%s(SUSP)\n", __func__);
+
+ spin_lock(&udc->lock);
+ if (!(isp1760_udc_read(udc, DC_MODE) & DC_VBUSSTAT))
+ isp1760_udc_disconnect(udc);
+ else
+ isp1760_udc_suspend(udc);
+ spin_unlock(&udc->lock);
+ }
+
+ if (status & DC_IEHS_STA) {
+ dev_dbg(udc->isp->dev, "%s(HS_STA)\n", __func__);
+ udc->gadget.speed = USB_SPEED_HIGH;
+ }
+
+ return status ? IRQ_HANDLED : IRQ_NONE;
+}
+
+static void isp1760_udc_vbus_poll(unsigned long data)
+{
+ struct isp1760_udc *udc = (struct isp1760_udc *)data;
+ unsigned long flags;
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ if (!(isp1760_udc_read(udc, DC_MODE) & DC_VBUSSTAT))
+ isp1760_udc_disconnect(udc);
+ else if (udc->gadget.state >= USB_STATE_POWERED)
+ mod_timer(&udc->vbus_timer,
+ jiffies + ISP1760_VBUS_POLL_INTERVAL);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+}
+
+/* -----------------------------------------------------------------------------
+ * Registration
+ */
+
+static void isp1760_udc_init_eps(struct isp1760_udc *udc)
+{
+ unsigned int i;
+
+ INIT_LIST_HEAD(&udc->gadget.ep_list);
+
+ for (i = 0; i < ARRAY_SIZE(udc->ep); ++i) {
+ struct isp1760_ep *ep = &udc->ep[i];
+ unsigned int ep_num = (i + 1) / 2;
+ bool is_in = !(i & 1);
+
+ ep->udc = udc;
+
+ INIT_LIST_HEAD(&ep->queue);
+
+ ep->addr = (ep_num && is_in ? USB_DIR_IN : USB_DIR_OUT)
+ | ep_num;
+ ep->desc = NULL;
+
+ sprintf(ep->name, "ep%u%s", ep_num,
+ ep_num ? (is_in ? "in" : "out") : "");
+
+ ep->ep.ops = &isp1760_ep_ops;
+ ep->ep.name = ep->name;
+
+ /*
+ * Hardcode the maximum packet sizes for now, to 64 bytes for
+ * the control endpoint and 512 bytes for all other endpoints.
+ * This fits in the 8kB FIFO without double-buffering.
+ */
+ if (ep_num == 0) {
+ ep->ep.maxpacket = 64;
+ ep->maxpacket = 64;
+ udc->gadget.ep0 = &ep->ep;
+ } else {
+ ep->ep.maxpacket = 512;
+ ep->maxpacket = 0;
+ list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
+ }
+ }
+}
+
+static int isp1760_udc_init(struct isp1760_udc *udc)
+{
+ u16 scratch;
+ u32 chipid;
+
+ /*
+ * Check that the controller is present by writing to the scratch
+ * register, modifying the bus pattern by reading from the chip ID
+ * register, and reading the scratch register value back. The chip ID
+ * and scratch register contents must match the expected values.
+ */
+ isp1760_udc_write(udc, DC_SCRATCH, 0xbabe);
+ chipid = isp1760_udc_read(udc, DC_CHIPID);
+ scratch = isp1760_udc_read(udc, DC_SCRATCH);
+
+ if (scratch != 0xbabe) {
+ dev_err(udc->isp->dev,
+ "udc: scratch test failed (0x%04x/0x%08x)\n",
+ scratch, chipid);
+ return -ENODEV;
+ }
+
+ if (chipid != 0x00011582) {
+ dev_err(udc->isp->dev, "udc: invalid chip ID 0x%08x\n", chipid);
+ return -ENODEV;
+ }
+
+ /* Reset the device controller. */
+ isp1760_udc_write(udc, DC_MODE, DC_SFRESET);
+ usleep_range(10000, 11000);
+ isp1760_udc_write(udc, DC_MODE, 0);
+ usleep_range(10000, 11000);
+
+ return 0;
+}
+
+int isp1760_udc_register(struct isp1760_device *isp, int irq,
+ unsigned long irqflags)
+{
+ struct isp1760_udc *udc = &isp->udc;
+ const char *devname;
+ int ret;
+
+ udc->irq = -1;
+ udc->isp = isp;
+ udc->regs = isp->regs;
+
+ spin_lock_init(&udc->lock);
+ setup_timer(&udc->vbus_timer, isp1760_udc_vbus_poll,
+ (unsigned long)udc);
+
+ ret = isp1760_udc_init(udc);
+ if (ret < 0)
+ return ret;
+
+ devname = dev_name(isp->dev);
+ udc->irqname = kmalloc(strlen(devname) + 7, GFP_KERNEL);
+ if (!udc->irqname)
+ return -ENOMEM;
+
+ sprintf(udc->irqname, "%s (udc)", devname);
+
+ ret = request_irq(irq, isp1760_udc_irq, IRQF_SHARED | IRQF_DISABLED |
+ irqflags, udc->irqname, udc);
+ if (ret < 0)
+ goto error;
+
+ udc->irq = irq;
+
+ /*
+ * Initialize the gadget static fields and register its device. Gadget
+ * fields that vary during the life time of the gadget are initialized
+ * by the UDC core.
+ */
+ udc->gadget.ops = &isp1760_udc_ops;
+ udc->gadget.speed = USB_SPEED_UNKNOWN;
+ udc->gadget.max_speed = USB_SPEED_HIGH;
+ udc->gadget.name = "isp1761_udc";
+
+ isp1760_udc_init_eps(udc);
+
+ ret = usb_add_gadget_udc(isp->dev, &udc->gadget);
+ if (ret < 0)
+ goto error;
+
+ return 0;
+
+error:
+ if (udc->irq >= 0)
+ free_irq(udc->irq, udc);
+ kfree(udc->irqname);
+
+ return ret;
+}
+
+void isp1760_udc_unregister(struct isp1760_device *isp)
+{
+ struct isp1760_udc *udc = &isp->udc;
+
+ usb_del_gadget_udc(&udc->gadget);
+
+ free_irq(udc->irq, udc);
+ kfree(udc->irqname);
+}
--- /dev/null
+/*
+ * Driver for the NXP ISP1761 device controller
+ *
+ * Copyright 2014 Ideas on Board Oy
+ *
+ * Contacts:
+ * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ */
+
+#ifndef _ISP1760_UDC_H_
+#define _ISP1760_UDC_H_
+
+#include <linux/ioport.h>
+#include <linux/list.h>
+#include <linux/spinlock.h>
+#include <linux/timer.h>
+#include <linux/usb/gadget.h>
+
+struct isp1760_device;
+struct isp1760_udc;
+
+enum isp1760_ctrl_state {
+ ISP1760_CTRL_SETUP, /* Waiting for a SETUP transaction */
+ ISP1760_CTRL_DATA_IN, /* Setup received, data IN stage */
+ ISP1760_CTRL_DATA_OUT, /* Setup received, data OUT stage */
+ ISP1760_CTRL_STATUS, /* 0-length request in status stage */
+};
+
+struct isp1760_ep {
+ struct isp1760_udc *udc;
+ struct usb_ep ep;
+
+ struct list_head queue;
+
+ unsigned int addr;
+ unsigned int maxpacket;
+ char name[7];
+
+ const struct usb_endpoint_descriptor *desc;
+
+ bool rx_pending;
+ bool halted;
+ bool wedged;
+};
+
+/**
+ * struct isp1760_udc - UDC state information
+ * irq: IRQ number
+ * irqname: IRQ name (as passed to request_irq)
+ * regs: Base address of the UDC registers
+ * driver: Gadget driver
+ * gadget: Gadget device
+ * lock: Protects driver, vbus_timer, ep, ep0_*, DC_EPINDEX register
+ * ep: Array of endpoints
+ * ep0_state: Control request state for endpoint 0
+ * ep0_dir: Direction of the current control request
+ * ep0_length: Length of the current control request
+ * connected: Tracks gadget driver bus connection state
+ */
+struct isp1760_udc {
+#if CONFIG_USB_ISP1761_UDC
+ struct isp1760_device *isp;
+
+ int irq;
+ char *irqname;
+ void __iomem *regs;
+
+ struct usb_gadget_driver *driver;
+ struct usb_gadget gadget;
+
+ spinlock_t lock;
+ struct timer_list vbus_timer;
+
+ struct isp1760_ep ep[15];
+
+ enum isp1760_ctrl_state ep0_state;
+ u8 ep0_dir;
+ u16 ep0_length;
+
+ bool connected;
+
+ unsigned int devstatus;
+#endif
+};
+
+#if CONFIG_USB_ISP1761_UDC
+int isp1760_udc_register(struct isp1760_device *isp, int irq,
+ unsigned long irqflags);
+void isp1760_udc_unregister(struct isp1760_device *isp);
+#else
+static inline int isp1760_udc_register(struct isp1760_device *isp, int irq,
+ unsigned long irqflags)
+{
+ return 0;
+}
+
+static inline void isp1760_udc_unregister(struct isp1760_device *isp)
+{
+}
+#endif
+
+#endif
projects / openwrt / staging / blogic.git / commitdiff