WIP: another attempt to get working network

Configure the switch to see if network on the switchports works.
Unfortunately same problem as with eth0-eth2.

diff --git a/target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m200.dts b/target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m200.dts
index cadb7ff4793c69319bdbe229eb2a5f51eeb7047f..b86bfd94020a659c12c9bc069facffc73d0d3606 100644 (file)
--- a/target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m200.dts
+++ b/target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m200.dts
@@ -49,6 +49,8 @@
                ethernet0 = &enet2;
                ethernet1 = &enet0;
                ethernet2 = &enet1;
+               ethernet3 = &enet3;
+               ethernet4 = &enet4;
        };
 
 };
@@ -60,16 +62,9 @@
 #include "t1040si-post.dtsi"
 #include "watchguard-firebox-mx00-ifc.dtsi"
 
-&fman0 {
-       // ethernet@e6000 and ethernet@e8000 are defined in t104xrdb.dtsi
-       // remove these nodes to fix the interface order
-       /delete-node/ ethernet@e6000;
-       /delete-node/ ethernet@e8000;
-};
-
 // ethernet @ e4000 = eth0 = phy@0
 &enet2 {
-       phy-mode = "rgmii";
+       phy-mode = "sgmii";
        phy-handle = <&phy0>;
 };
 
@@ -81,12 +76,32 @@
 
 // ethernet @ e2000 = eth2 = phy@2
 &enet1 {
-       phy-mode = "gmii";
+       phy-mode = "sgmii";
        phy-handle = <&phy2>;
 };
 
+&enet3 {
+       phy-connection-type = "rgmii";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&enet4 {
+       phy-connection-type = "rgmii";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
 
 &mdio0 {
+       compatible = "fsl,fman-memac-mdio";
+
        // m200 ethernet port 0
        phy0: ethernet-phy@0 {
                reg = <0x00>;
@@ -105,4 +120,103 @@
        phy3: ethernet-phy@3 {
                reg = <0x03>;
        };
+
+       switch0: switch@10 {
+               compatible = "marvell,mv88e6085";
+               reg = <0x10>;
+
+               mdio {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       switch0phy0: switch0phy0@0 {
+                               reg = <0x00>;
+                               interrupt-parent = <&switch0>;
+                       };
+
+                       switch0phy1: switch0phy1@1 {
+                               reg = <0x01>;
+                               interrupt-parent = <&switch0>;
+                       };
+
+                       switch0phy2: switch0phy2@2 {
+                               reg = <0x02>;
+                               interrupt-parent = <&switch0>;
+                       };
+
+                       switch0phy3: switch0phy3@3 {
+                               reg = <0x03>;
+                               interrupt-parent = <&switch0>;
+                       };
+
+                       switch0phy4: switch0phy4@4 {
+                               reg = <0x04>;
+                               interrupt-parent = <&switch0>;
+                       };
+               };
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "sweth3";
+                               phy-handle = <&switch0phy0>;
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "sweth4";
+                               phy-handle = <&switch0phy1>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "sweth5";
+                               phy-handle = <&switch0phy2>;
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "sweth6";
+                               phy-handle = <&switch0phy3>;
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "sweth7";
+                               phy-handle = <&switch0phy4>;
+                       };
+
+                       // OEM bootlog suggests multiple ports are attached to switch
+                       // Keep this until OEM supplies GPL sources
+                       port@5 {
+                               status = "disabled";
+
+                               reg = "<5>";
+                               label = "cpu";
+                               ethernet = <&enet4>;
+                               phy-mode = "rgmii-id";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@6 {
+                               //status = "disabled";
+                               reg = <6>;
+                               label = "cpu";
+                               ethernet = <&enet3>;
+                               phy-mode = "rgmii-rxid";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+               };
+       };
 };