powerpc/mpc8xxx DDR: Fix CAS latency calculation

Empty slot should be skipped when calculating CAS latency.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index a474a654c2e861039267bab135d0c2e48010256c..03a784cd4791a13bc22420a7e3e89c719d796049 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -27,8 +27,10 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
 
        /* compute the common CAS latency supported between slots */
        tmp = dimm_params[0].caslat_X;
-       for (i = 1; i < number_of_dimms; i++)
-                tmp &= dimm_params[i].caslat_X;
+       for (i = 1; i < number_of_dimms; i++) {
+               if (dimm_params[i].n_ranks)
+                       tmp &= dimm_params[i].caslat_X;
+       }
        common_caslat = tmp;
 
        /* compute the max tAAmin tCKmin between slots */