init_laws();
invalidate_tlb(0);
-#ifdef CONFIG_FSL_INIT_TLBS
init_tlbs();
-#else
- {
- extern u32 tlb1_entry;
- u32 *tmp = &tlb1_entry;
- int i;
- int num = tmp[2];
-
- /* skip to actual table */
- tmp += 3;
-
- for (i = 0; i < num; i++, tmp += 4) {
- mtspr(MAS0, tmp[0]);
- mtspr(MAS1, tmp[1]);
- mtspr(MAS2, tmp[2]);
- mtspr(MAS3, tmp[3]);
- asm volatile("isync;msync;tlbwe;isync");
- }
- }
-#endif
}
/*
void init_tlbs(void)
{
-#ifdef CONFIG_FSL_INIT_TLBS
int i;
for (i = 0; i < num_tlb_entries; i++) {
tlb_table[i].ts, tlb_table[i].esel, tlb_table[i].tsize,
tlb_table[i].iprot);
}
-#endif
return ;
}
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/* Using Localbus SDRAM to emulate flash before we can program the flash,
* normally you only need a flash-boot image(u-boot.bin),if unsure undef this.
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
#endif
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/