nvbios_exec(&init);
}
- ret = dp->func->lnk_ctl(dp, ior->dp.nr, ior->dp.bw, ior->dp.ef);
+ ret = ior->func->dp.links(ior, dp->aux);
if (ret) {
- if (ret < 0)
- OUTP_ERR(&dp->outp, "lnk_ctl failed with %d", ret);
- return ret;
+ if (ret < 0) {
+ OUTP_ERR(&dp->outp, "train failed with %d", ret);
+ return ret;
+ }
+ return 0;
}
dp->func->lnk_pwr(dp, ior->dp.nr);
struct nvkm_output_dp_func {
int (*pattern)(struct nvkm_output_dp *, int);
int (*lnk_pwr)(struct nvkm_output_dp *, int nr);
- int (*lnk_ctl)(struct nvkm_output_dp *, int nr, int bw, bool ef);
int (*drv_ctl)(struct nvkm_output_dp *, int ln, int vs, int pe, int pc);
void (*vcpi)(struct nvkm_output_dp *, int head, u8 start_slot,
u8 num_slots, u16 pbn, u16 aligned_pbn);
int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
struct nvkm_output **);
-int gf119_sor_dp_lnk_ctl(struct nvkm_dp *, int, int, bool);
int gf119_sor_dp_drv_ctl(struct nvkm_dp *, int, int, int, int);
void gf119_sor_dp_vcpi(struct nvkm_dp *, int, u8, u8, u16, u16);
#ifndef __NVKM_DISP_IOR_H__
#define __NVKM_DISP_IOR_H__
#include "priv.h"
+struct nvkm_i2c_aux;
struct nvkm_ior {
const struct nvkm_ior_func *func;
struct {
u8 lanes[4];
+ int (*links)(struct nvkm_ior *, struct nvkm_i2c_aux *);
} dp;
};
void nv50_dac_power(struct nvkm_ior *, bool, bool, bool, bool, bool);
int nv50_dac_sense(struct nvkm_ior *, u32);
+static inline u32
+nv50_sor_link(struct nvkm_ior *ior)
+{
+ return nv50_ior_base(ior) + ((ior->asy.link == 2) * 0x80);
+}
+
void nv50_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
void nv50_sor_power(struct nvkm_ior *, bool, bool, bool, bool, bool);
void g94_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
+int g94_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
+
void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
+int gf119_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
void g84_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);
void gt215_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);
}
static int
-nv50_pior_output_dp_lnk_ctl(struct nvkm_output_dp *outp,
- int nr, int bw, bool ef)
+nv50_pior_dp_links(struct nvkm_ior *pior, struct nvkm_i2c_aux *aux)
{
- int ret = nvkm_i2c_aux_lnk_ctl(outp->aux, nr, bw, ef);
+ int ret = nvkm_i2c_aux_lnk_ctl(aux, pior->dp.nr, pior->dp.bw,
+ pior->dp.ef);
if (ret)
return ret;
return 1;
nv50_pior_output_dp_func = {
.pattern = nv50_pior_output_dp_pattern,
.lnk_pwr = nv50_pior_output_dp_lnk_pwr,
- .lnk_ctl = nv50_pior_output_dp_lnk_ctl,
};
int
nv50_pior = {
.state = nv50_pior_state,
.power = nv50_pior_power,
+ .dp = {
+ .links = nv50_pior_dp_links,
+ },
};
int
return 0;
}
-static int
-g94_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef)
+int
+g94_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)
{
- struct nvkm_device *device = outp->base.disp->engine.subdev.device;
- const u32 soff = g94_sor_soff(outp);
- const u32 loff = g94_sor_loff(outp);
+ struct nvkm_device *device = sor->disp->engine.subdev.device;
+ const u32 soff = nv50_ior_base(sor);
+ const u32 loff = nv50_sor_link(sor);
u32 dpctrl = 0x00000000;
u32 clksor = 0x00000000;
- dpctrl |= ((1 << nr) - 1) << 16;
- if (ef)
+ dpctrl |= ((1 << sor->dp.nr) - 1) << 16;
+ if (sor->dp.ef)
dpctrl |= 0x00004000;
- if (bw > 0x06)
+ if (sor->dp.bw > 0x06)
clksor |= 0x00040000;
nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor);
g94_sor_dp_func = {
.pattern = g94_sor_dp_pattern,
.lnk_pwr = g94_sor_dp_lnk_pwr,
- .lnk_ctl = g94_sor_dp_lnk_ctl,
.drv_ctl = g94_sor_dp_drv_ctl,
};
.power = nv50_sor_power,
.dp = {
.lanes = { 2, 1, 0, 3},
+ .links = g94_sor_dp_links,
},
};
}
int
-gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef)
+gf119_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)
{
- struct nvkm_device *device = outp->base.disp->engine.subdev.device;
- const u32 soff = gf119_sor_soff(outp);
- const u32 loff = gf119_sor_loff(outp);
+ struct nvkm_device *device = sor->disp->engine.subdev.device;
+ const u32 soff = nv50_ior_base(sor);
+ const u32 loff = nv50_sor_link(sor);
u32 dpctrl = 0x00000000;
u32 clksor = 0x00000000;
- clksor |= bw << 18;
- dpctrl |= ((1 << nr) - 1) << 16;
- if (outp->lt.mst)
+ clksor |= sor->dp.bw << 18;
+ dpctrl |= ((1 << sor->dp.nr) - 1) << 16;
+ if (sor->dp.mst)
dpctrl |= 0x40000000;
- if (ef)
+ if (sor->dp.ef)
dpctrl |= 0x00004000;
nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor);
gf119_sor_dp_func = {
.pattern = gf119_sor_dp_pattern,
.lnk_pwr = g94_sor_dp_lnk_pwr,
- .lnk_ctl = gf119_sor_dp_lnk_ctl,
.drv_ctl = gf119_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi,
};
},
.dp = {
.lanes = { 2, 1, 0, 3 },
+ .links = gf119_sor_dp_links,
},
};
},
.dp = {
.lanes = { 2, 1, 0, 3 },
+ .links = gf119_sor_dp_links,
},
};
gm107_sor_dp_func = {
.pattern = gm107_sor_dp_pattern,
.lnk_pwr = g94_sor_dp_lnk_pwr,
- .lnk_ctl = gf119_sor_dp_lnk_ctl,
.drv_ctl = gf119_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi,
};
},
.dp = {
.lanes = { 0, 1, 2, 3 },
+ .links = gf119_sor_dp_links,
},
};
gm200_sor_dp_func = {
.pattern = gm107_sor_dp_pattern,
.lnk_pwr = gm200_sor_dp_lnk_pwr,
- .lnk_ctl = gf119_sor_dp_lnk_ctl,
.drv_ctl = gm200_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi,
};
},
.dp = {
.lanes = { 0, 1, 2, 3 },
+ .links = gf119_sor_dp_links,
},
};
},
.dp = {
.lanes = { 2, 1, 0, 3 },
+ .links = g94_sor_dp_links,
},
};
},
.dp = {
.lanes = { 2, 1, 0, 3},
+ .links = g94_sor_dp_links,
},
};
},
.dp = {
.lanes = { 3, 2, 1, 0 },
+ .links = g94_sor_dp_links,
},
};