drm/i915: assert_panel_unlocked() in chv_enable_pll()

Supposedly the power sequencer still locks out the DPLL registers on
CHV, so let's issue a warning if it's still locked when enabling the
DPLL.

Also drop the redundant IS_MOBILE() check for VLV when we check the same
thing.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458052809-23426-6-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6a95c31ac3fe55f49a16541b9b7a1bfc7594c17c..4fbff487cf2b13b05195f4020b580beef405ca1e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1535,8 +1535,7 @@ static void vlv_enable_pll(struct intel_crtc *crtc,
        assert_pipe_disabled(dev_priv, pipe);
 
        /* PLL is protected by panel, make sure we can write it */
-       if (IS_MOBILE(dev_priv->dev))
-               assert_panel_unlocked(dev_priv, pipe);
+       assert_panel_unlocked(dev_priv, pipe);
 
        I915_WRITE(reg, dpll);
        POSTING_READ(reg);
@@ -1571,6 +1570,9 @@ static void chv_enable_pll(struct intel_crtc *crtc,
 
        assert_pipe_disabled(dev_priv, pipe);
 
+       /* PLL is protected by panel, make sure we can write it */
+       assert_panel_unlocked(dev_priv, pipe);
+
        mutex_lock(&dev_priv->sb_lock);
 
        /* Enable back the 10bit clock to display controller */