skb_reserve(skb, SH_ETH_RX_ALIGN - reserve);
}
-
-/* CPU <-> EDMAC endian convert */
-static inline __u32 cpu_to_edmac(struct sh_eth_private *mdp, u32 x)
-{
- return cpu_to_le32(x);
-}
-
-static inline __u32 edmac_to_cpu(struct sh_eth_private *mdp, u32 x)
-{
- return le32_to_cpu(x);
-}
-
/* Program the hardware MAC address from dev->dev_addr. */
static void update_mac_address(struct net_device *ndev)
{
rxdesc = &mdp->rx_ring[i];
/* The size of the buffer is a multiple of 32 bytes. */
buf_len = ALIGN(mdp->rx_buf_sz, 32);
- rxdesc->len = cpu_to_edmac(mdp, buf_len << 16);
+ rxdesc->len = cpu_to_le32(buf_len << 16);
dma_addr = dma_map_single(&ndev->dev, skb->data, buf_len,
DMA_FROM_DEVICE);
if (dma_mapping_error(&ndev->dev, dma_addr)) {
break;
}
mdp->rx_skbuff[i] = skb;
- rxdesc->addr = cpu_to_edmac(mdp, dma_addr);
- rxdesc->status = cpu_to_edmac(mdp, RD_RACT | RD_RFP);
+ rxdesc->addr = cpu_to_le32(dma_addr);
+ rxdesc->status = cpu_to_le32(RD_RACT | RD_RFP);
/* Rx descriptor address set */
if (i == 0) {
mdp->dirty_rx = (u32) (i - mdp->num_rx_ring);
/* Mark the last entry as wrapping the ring. */
- rxdesc->status |= cpu_to_edmac(mdp, RD_RDLE);
+ rxdesc->status |= cpu_to_le32(RD_RDLE);
memset(mdp->tx_ring, 0, tx_ringsize);
for (i = 0; i < mdp->num_tx_ring; i++) {
mdp->tx_skbuff[i] = NULL;
txdesc = &mdp->tx_ring[i];
- txdesc->status = cpu_to_edmac(mdp, TD_TFP);
- txdesc->len = cpu_to_edmac(mdp, 0);
+ txdesc->status = cpu_to_le32(TD_TFP);
+ txdesc->len = cpu_to_le32(0);
if (i == 0) {
/* Tx descriptor address set */
sh_eth_write(ndev, mdp->tx_desc_dma, TDLAR);
}
}
- txdesc->status |= cpu_to_edmac(mdp, TD_TDLE);
+ txdesc->status |= cpu_to_le32(TD_TDLE);
}
/* Get skb and descriptor buffer */
* packet boundary if it's currently running
*/
for (i = 0; i < mdp->num_tx_ring; i++)
- mdp->tx_ring[i].status &= ~cpu_to_edmac(mdp, TD_TACT);
+ mdp->tx_ring[i].status &= ~cpu_to_le32(TD_TACT);
/* Disable TX FIFO egress to MAC */
sh_eth_rcv_snd_disable(ndev);
for (; mdp->cur_tx - mdp->dirty_tx > 0; mdp->dirty_tx++) {
entry = mdp->dirty_tx % mdp->num_tx_ring;
txdesc = &mdp->tx_ring[entry];
- if (txdesc->status & cpu_to_edmac(mdp, TD_TACT))
+ if (txdesc->status & cpu_to_le32(TD_TACT))
break;
/* TACT bit must be checked before all the following reads */
dma_rmb();
netif_info(mdp, tx_done, ndev,
"tx entry %d status 0x%08x\n",
- entry, edmac_to_cpu(mdp, txdesc->status));
+ entry, le32_to_cpu(txdesc->status));
/* Free the original skb. */
if (mdp->tx_skbuff[entry]) {
- dma_unmap_single(&ndev->dev,
- edmac_to_cpu(mdp, txdesc->addr),
- edmac_to_cpu(mdp, txdesc->len) >> 16,
+ dma_unmap_single(&ndev->dev, le32_to_cpu(txdesc->addr),
+ le32_to_cpu(txdesc->len) >> 16,
DMA_TO_DEVICE);
dev_kfree_skb_irq(mdp->tx_skbuff[entry]);
mdp->tx_skbuff[entry] = NULL;
free_num++;
}
- txdesc->status = cpu_to_edmac(mdp, TD_TFP);
+ txdesc->status = cpu_to_le32(TD_TFP);
if (entry >= mdp->num_tx_ring - 1)
- txdesc->status |= cpu_to_edmac(mdp, TD_TDLE);
+ txdesc->status |= cpu_to_le32(TD_TDLE);
ndev->stats.tx_packets++;
- ndev->stats.tx_bytes += edmac_to_cpu(mdp, txdesc->len) >> 16;
+ ndev->stats.tx_bytes += le32_to_cpu(txdesc->len) >> 16;
}
return free_num;
}
boguscnt = min(boguscnt, *quota);
limit = boguscnt;
rxdesc = &mdp->rx_ring[entry];
- while (!(rxdesc->status & cpu_to_edmac(mdp, RD_RACT))) {
+ while (!(rxdesc->status & cpu_to_le32(RD_RACT))) {
/* RACT bit must be checked before all the following reads */
dma_rmb();
- desc_status = edmac_to_cpu(mdp, rxdesc->status);
- pkt_len = edmac_to_cpu(mdp, rxdesc->len) & RD_RFL;
+ desc_status = le32_to_cpu(rxdesc->status);
+ pkt_len = le32_to_cpu(rxdesc->len) & RD_RFL;
if (--boguscnt < 0)
break;
if (desc_status & RD_RFS10)
ndev->stats.rx_over_errors++;
} else if (skb) {
- dma_addr = edmac_to_cpu(mdp, rxdesc->addr);
+ dma_addr = le32_to_cpu(rxdesc->addr);
if (!mdp->cd->hw_swap)
sh_eth_soft_swap(
phys_to_virt(ALIGN(dma_addr, 4)),
rxdesc = &mdp->rx_ring[entry];
/* The size of the buffer is 32 byte boundary. */
buf_len = ALIGN(mdp->rx_buf_sz, 32);
- rxdesc->len = cpu_to_edmac(mdp, buf_len << 16);
+ rxdesc->len = cpu_to_le32(buf_len << 16);
if (mdp->rx_skbuff[entry] == NULL) {
skb = netdev_alloc_skb(ndev, skbuff_size);
mdp->rx_skbuff[entry] = skb;
skb_checksum_none_assert(skb);
- rxdesc->addr = cpu_to_edmac(mdp, dma_addr);
+ rxdesc->addr = cpu_to_le32(dma_addr);
}
dma_wmb(); /* RACT bit must be set after all the above writes */
if (entry >= mdp->num_rx_ring - 1)
rxdesc->status |=
- cpu_to_edmac(mdp, RD_RACT | RD_RFP | RD_RDLE);
+ cpu_to_le32(RD_RACT | RD_RFP | RD_RDLE);
else
- rxdesc->status |=
- cpu_to_edmac(mdp, RD_RACT | RD_RFP);
+ rxdesc->status |= cpu_to_le32(RD_RACT | RD_RFP);
}
/* Restart Rx engine if stopped. */
/* Free all the skbuffs in the Rx queue. */
for (i = 0; i < mdp->num_rx_ring; i++) {
rxdesc = &mdp->rx_ring[i];
- rxdesc->status = cpu_to_edmac(mdp, 0);
- rxdesc->addr = cpu_to_edmac(mdp, 0xBADF00D0);
+ rxdesc->status = cpu_to_le32(0);
+ rxdesc->addr = cpu_to_le32(0xBADF00D0);
dev_kfree_skb(mdp->rx_skbuff[i]);
mdp->rx_skbuff[i] = NULL;
}
kfree_skb(skb);
return NETDEV_TX_OK;
}
- txdesc->addr = cpu_to_edmac(mdp, dma_addr);
- txdesc->len = cpu_to_edmac(mdp, skb->len << 16);
+ txdesc->addr = cpu_to_le32(dma_addr);
+ txdesc->len = cpu_to_le32(skb->len << 16);
dma_wmb(); /* TACT bit must be set after all the above writes */
if (entry >= mdp->num_tx_ring - 1)
- txdesc->status |= cpu_to_edmac(mdp, TD_TACT | TD_TDLE);
+ txdesc->status |= cpu_to_le32(TD_TACT | TD_TDLE);
else
- txdesc->status |= cpu_to_edmac(mdp, TD_TACT);
+ txdesc->status |= cpu_to_le32(TD_TACT);
mdp->cur_tx++;