drm/amdgpu: Only update the CUR_SIZE register when necessary
authorMichel Dänzer <michel.daenzer@amd.com>
Thu, 27 Oct 2016 08:44:07 +0000 (17:44 +0900)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 6 Dec 2016 23:08:28 +0000 (18:08 -0500)
Normally only necessary when the cursor size changes.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

index ccb5e02e7b20ffb3f8cb1776ea6a67a1b879cb33..9999dc71b998599f909464c32e98ca8cc1be5ddb 100644 (file)
@@ -2512,8 +2512,6 @@ static int dce_v10_0_cursor_move_locked(struct drm_crtc *crtc,
 
        WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y);
        WREG32(mmCUR_HOT_SPOT + amdgpu_crtc->crtc_offset, (xorigin << 16) | yorigin);
-       WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
-              ((amdgpu_crtc->cursor_width - 1) << 16) | (amdgpu_crtc->cursor_height - 1));
 
        return 0;
 }
@@ -2539,6 +2537,7 @@ static int dce_v10_0_crtc_cursor_set2(struct drm_crtc *crtc,
                                      int32_t hot_y)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+       struct amdgpu_device *adev = crtc->dev->dev_private;
        struct drm_gem_object *obj;
        struct amdgpu_bo *aobj;
        int ret;
@@ -2579,9 +2578,7 @@ static int dce_v10_0_crtc_cursor_set2(struct drm_crtc *crtc,
 
        dce_v10_0_lock_cursor(crtc, true);
 
-       if (width != amdgpu_crtc->cursor_width ||
-           height != amdgpu_crtc->cursor_height ||
-           hot_x != amdgpu_crtc->cursor_hot_x ||
+       if (hot_x != amdgpu_crtc->cursor_hot_x ||
            hot_y != amdgpu_crtc->cursor_hot_y) {
                int x, y;
 
@@ -2590,12 +2587,18 @@ static int dce_v10_0_crtc_cursor_set2(struct drm_crtc *crtc,
 
                dce_v10_0_cursor_move_locked(crtc, x, y);
 
-               amdgpu_crtc->cursor_width = width;
-               amdgpu_crtc->cursor_height = height;
                amdgpu_crtc->cursor_hot_x = hot_x;
                amdgpu_crtc->cursor_hot_y = hot_y;
        }
 
+       if (width != amdgpu_crtc->cursor_width ||
+           height != amdgpu_crtc->cursor_height) {
+               WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
+                      (width - 1) << 16 | (height - 1));
+               amdgpu_crtc->cursor_width = width;
+               amdgpu_crtc->cursor_height = height;
+       }
+
        dce_v10_0_show_cursor(crtc);
        dce_v10_0_lock_cursor(crtc, false);
 
@@ -2617,6 +2620,7 @@ unpin:
 static void dce_v10_0_cursor_reset(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+       struct amdgpu_device *adev = crtc->dev->dev_private;
 
        if (amdgpu_crtc->cursor_bo) {
                dce_v10_0_lock_cursor(crtc, true);
@@ -2624,6 +2628,10 @@ static void dce_v10_0_cursor_reset(struct drm_crtc *crtc)
                dce_v10_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,
                                             amdgpu_crtc->cursor_y);
 
+               WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
+                      (amdgpu_crtc->cursor_width - 1) << 16 |
+                      (amdgpu_crtc->cursor_height - 1));
+
                dce_v10_0_show_cursor(crtc);
 
                dce_v10_0_lock_cursor(crtc, false);
index a1aa0335c6869addb6977e0be0ce5619035ff359..b3d62b909f4372db1e569308e29a436de873d0c9 100644 (file)
@@ -2528,8 +2528,6 @@ static int dce_v11_0_cursor_move_locked(struct drm_crtc *crtc,
 
        WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y);
        WREG32(mmCUR_HOT_SPOT + amdgpu_crtc->crtc_offset, (xorigin << 16) | yorigin);
-       WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
-              ((amdgpu_crtc->cursor_width - 1) << 16) | (amdgpu_crtc->cursor_height - 1));
 
        return 0;
 }
@@ -2555,6 +2553,7 @@ static int dce_v11_0_crtc_cursor_set2(struct drm_crtc *crtc,
                                      int32_t hot_y)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+       struct amdgpu_device *adev = crtc->dev->dev_private;
        struct drm_gem_object *obj;
        struct amdgpu_bo *aobj;
        int ret;
@@ -2595,9 +2594,7 @@ static int dce_v11_0_crtc_cursor_set2(struct drm_crtc *crtc,
 
        dce_v11_0_lock_cursor(crtc, true);
 
-       if (width != amdgpu_crtc->cursor_width ||
-           height != amdgpu_crtc->cursor_height ||
-           hot_x != amdgpu_crtc->cursor_hot_x ||
+       if (hot_x != amdgpu_crtc->cursor_hot_x ||
            hot_y != amdgpu_crtc->cursor_hot_y) {
                int x, y;
 
@@ -2606,12 +2603,18 @@ static int dce_v11_0_crtc_cursor_set2(struct drm_crtc *crtc,
 
                dce_v11_0_cursor_move_locked(crtc, x, y);
 
-               amdgpu_crtc->cursor_width = width;
-               amdgpu_crtc->cursor_height = height;
                amdgpu_crtc->cursor_hot_x = hot_x;
                amdgpu_crtc->cursor_hot_y = hot_y;
        }
 
+       if (width != amdgpu_crtc->cursor_width ||
+           height != amdgpu_crtc->cursor_height) {
+               WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
+                      (width - 1) << 16 | (height - 1));
+               amdgpu_crtc->cursor_width = width;
+               amdgpu_crtc->cursor_height = height;
+       }
+
        dce_v11_0_show_cursor(crtc);
        dce_v11_0_lock_cursor(crtc, false);
 
@@ -2633,6 +2636,7 @@ unpin:
 static void dce_v11_0_cursor_reset(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+       struct amdgpu_device *adev = crtc->dev->dev_private;
 
        if (amdgpu_crtc->cursor_bo) {
                dce_v11_0_lock_cursor(crtc, true);
@@ -2640,6 +2644,10 @@ static void dce_v11_0_cursor_reset(struct drm_crtc *crtc)
                dce_v11_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,
                                             amdgpu_crtc->cursor_y);
 
+               WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
+                      (amdgpu_crtc->cursor_width - 1) << 16 |
+                      (amdgpu_crtc->cursor_height - 1));
+
                dce_v11_0_show_cursor(crtc);
 
                dce_v11_0_lock_cursor(crtc, false);
index 25c5322de77859be8b8734ed2f2c83cc04a0fb76..18cb295c0f38b21a4d1218b54b7a3c645435a19a 100644 (file)
@@ -1860,8 +1860,6 @@ static int dce_v6_0_cursor_move_locked(struct drm_crtc *crtc,
        struct amdgpu_device *adev = crtc->dev->dev_private;
        int xorigin = 0, yorigin = 0;
 
-       int w = amdgpu_crtc->cursor_width;
-
        amdgpu_crtc->cursor_x = x;
        amdgpu_crtc->cursor_y = y;
 
@@ -1881,8 +1879,6 @@ static int dce_v6_0_cursor_move_locked(struct drm_crtc *crtc,
 
        WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y);
        WREG32(mmCUR_HOT_SPOT + amdgpu_crtc->crtc_offset, (xorigin << 16) | yorigin);
-       WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
-              ((w - 1) << 16) | (amdgpu_crtc->cursor_height - 1));
 
        return 0;
 }
@@ -1908,6 +1904,7 @@ static int dce_v6_0_crtc_cursor_set2(struct drm_crtc *crtc,
                                     int32_t hot_y)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+       struct amdgpu_device *adev = crtc->dev->dev_private;
        struct drm_gem_object *obj;
        struct amdgpu_bo *aobj;
        int ret;
@@ -1965,6 +1962,14 @@ static int dce_v6_0_crtc_cursor_set2(struct drm_crtc *crtc,
                amdgpu_crtc->cursor_hot_y = hot_y;
        }
 
+       if (width != amdgpu_crtc->cursor_width ||
+           height != amdgpu_crtc->cursor_height) {
+               WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
+                      (width - 1) << 16 | (height - 1));
+               amdgpu_crtc->cursor_width = width;
+               amdgpu_crtc->cursor_height = height;
+       }
+
        dce_v6_0_show_cursor(crtc);
        dce_v6_0_lock_cursor(crtc, false);
 
@@ -1986,6 +1991,7 @@ unpin:
 static void dce_v6_0_cursor_reset(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+       struct amdgpu_device *adev = crtc->dev->dev_private;
 
        if (amdgpu_crtc->cursor_bo) {
                dce_v6_0_lock_cursor(crtc, true);
@@ -1993,6 +1999,10 @@ static void dce_v6_0_cursor_reset(struct drm_crtc *crtc)
                dce_v6_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,
                                            amdgpu_crtc->cursor_y);
 
+               WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
+                      (amdgpu_crtc->cursor_width - 1) << 16 |
+                      (amdgpu_crtc->cursor_height - 1));
+
                dce_v6_0_show_cursor(crtc);
                dce_v6_0_lock_cursor(crtc, false);
        }
index 28102bb1704d0b618318a9bcf4b9668bce899150..6ce7fb42dbef68232a8325d720d54bf99b3c8783 100644 (file)
@@ -2363,8 +2363,6 @@ static int dce_v8_0_cursor_move_locked(struct drm_crtc *crtc,
 
        WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y);
        WREG32(mmCUR_HOT_SPOT + amdgpu_crtc->crtc_offset, (xorigin << 16) | yorigin);
-       WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
-              ((amdgpu_crtc->cursor_width - 1) << 16) | (amdgpu_crtc->cursor_height - 1));
 
        return 0;
 }
@@ -2390,6 +2388,7 @@ static int dce_v8_0_crtc_cursor_set2(struct drm_crtc *crtc,
                                     int32_t hot_y)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+       struct amdgpu_device *adev = crtc->dev->dev_private;
        struct drm_gem_object *obj;
        struct amdgpu_bo *aobj;
        int ret;
@@ -2430,9 +2429,7 @@ static int dce_v8_0_crtc_cursor_set2(struct drm_crtc *crtc,
 
        dce_v8_0_lock_cursor(crtc, true);
 
-       if (width != amdgpu_crtc->cursor_width ||
-           height != amdgpu_crtc->cursor_height ||
-           hot_x != amdgpu_crtc->cursor_hot_x ||
+       if (hot_x != amdgpu_crtc->cursor_hot_x ||
            hot_y != amdgpu_crtc->cursor_hot_y) {
                int x, y;
 
@@ -2447,6 +2444,14 @@ static int dce_v8_0_crtc_cursor_set2(struct drm_crtc *crtc,
                amdgpu_crtc->cursor_hot_y = hot_y;
        }
 
+       if (width != amdgpu_crtc->cursor_width ||
+           height != amdgpu_crtc->cursor_height) {
+               WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
+                      (width - 1) << 16 | (height - 1));
+               amdgpu_crtc->cursor_width = width;
+               amdgpu_crtc->cursor_height = height;
+       }
+
        dce_v8_0_show_cursor(crtc);
        dce_v8_0_lock_cursor(crtc, false);
 
@@ -2468,6 +2473,7 @@ unpin:
 static void dce_v8_0_cursor_reset(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+       struct amdgpu_device *adev = crtc->dev->dev_private;
 
        if (amdgpu_crtc->cursor_bo) {
                dce_v8_0_lock_cursor(crtc, true);
@@ -2475,6 +2481,10 @@ static void dce_v8_0_cursor_reset(struct drm_crtc *crtc)
                dce_v8_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,
                                            amdgpu_crtc->cursor_y);
 
+               WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,
+                      (amdgpu_crtc->cursor_width - 1) << 16 |
+                      (amdgpu_crtc->cursor_height - 1));
+
                dce_v8_0_show_cursor(crtc);
 
                dce_v8_0_lock_cursor(crtc, false);