Documentation: Update APM X-Gene clock binding for v2 hardware

Update APM X-Gene clock binding documentation for SoC and
PCP PLL for v2 hardware.

Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/xgene.txt b/Documentation/devicetree/bindings/clock/xgene.txt
index 1c4ef773feea1b7ee659d887f1f03287268db9b4..82f9638121dbf31fd36d24b02e714e410b7c5be7 100644 (file)
--- a/Documentation/devicetree/bindings/clock/xgene.txt
+++ b/Documentation/devicetree/bindings/clock/xgene.txt
@@ -9,6 +9,8 @@ Required properties:
        "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
        "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
        "apm,xgene-device-clock" - for a X-Gene device clock
+       "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
+       "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
 
 Required properties for SoC or PCP PLL clocks:
 - reg : shall be the physical PLL register address for the pll clock.