drm/i915: Return a default RCS context size
authorOscar Mateo <oscar.mateo@intel.com>
Thu, 11 Jan 2018 22:55:06 +0000 (14:55 -0800)
committerPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 19 Jan 2018 20:09:47 +0000 (18:09 -0200)
Instead of returning whatever size the latest GEN used. This is because
context sizes for new GENs can go up or down, but the only safe thing to
do for missing cases is to use the largest known one, whatever that is.

Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1515711307-28979-1-git-send-email-oscar.mateo@intel.com
drivers/gpu/drm/i915/intel_engine_cs.c

index b221610f2365f37b105e46735f16161129f8abf4..3639af5bdc2372490c7f6672d7e621601df671bb 100644 (file)
@@ -38,6 +38,7 @@
  */
 #define HSW_CXT_TOTAL_SIZE             (17 * PAGE_SIZE)
 
+#define DEFAULT_LR_CONTEXT_RENDER_SIZE (22 * PAGE_SIZE)
 #define GEN8_LR_CONTEXT_RENDER_SIZE    (20 * PAGE_SIZE)
 #define GEN9_LR_CONTEXT_RENDER_SIZE    (22 * PAGE_SIZE)
 #define GEN10_LR_CONTEXT_RENDER_SIZE   (18 * PAGE_SIZE)
@@ -157,6 +158,7 @@ __intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class)
                switch (INTEL_GEN(dev_priv)) {
                default:
                        MISSING_CASE(INTEL_GEN(dev_priv));
+                       return DEFAULT_LR_CONTEXT_RENDER_SIZE;
                case 10:
                        return GEN10_LR_CONTEXT_RENDER_SIZE;
                case 9: