reg = <0x30800000 0x400000>;
ranges;
- ecspi1: ecspi@30820000 {
+ spba-bus@30800000 {
+ compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
- reg = <0x30820000 0x10000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
- <&clks IMX7D_ECSPI1_ROOT_CLK>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ #size-cells = <1>;
+ reg = <0x30800000 0x100000>;
+ ranges;
- ecspi2: ecspi@30830000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
- reg = <0x30830000 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
- <&clks IMX7D_ECSPI2_ROOT_CLK>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi1: ecspi@30820000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
+ <&clks IMX7D_ECSPI1_ROOT_CLK>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- ecspi3: ecspi@30840000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
- reg = <0x30840000 0x10000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
- <&clks IMX7D_ECSPI3_ROOT_CLK>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi2: ecspi@30830000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
+ <&clks IMX7D_ECSPI2_ROOT_CLK>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart1: serial@30860000 {
- compatible = "fsl,imx7d-uart",
- "fsl,imx6q-uart";
- reg = <0x30860000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_UART1_ROOT_CLK>,
- <&clks IMX7D_UART1_ROOT_CLK>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ ecspi3: ecspi@30840000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
+ <&clks IMX7D_ECSPI3_ROOT_CLK>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart2: serial@30890000 {
- compatible = "fsl,imx7d-uart",
- "fsl,imx6q-uart";
- reg = <0x30890000 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_UART2_ROOT_CLK>,
- <&clks IMX7D_UART2_ROOT_CLK>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ uart1: serial@30860000 {
+ compatible = "fsl,imx7d-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30860000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_UART1_ROOT_CLK>,
+ <&clks IMX7D_UART1_ROOT_CLK>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- uart3: serial@30880000 {
- compatible = "fsl,imx7d-uart",
- "fsl,imx6q-uart";
- reg = <0x30880000 0x10000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_UART3_ROOT_CLK>,
- <&clks IMX7D_UART3_ROOT_CLK>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
+ uart2: serial@30890000 {
+ compatible = "fsl,imx7d-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30890000 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_UART2_ROOT_CLK>,
+ <&clks IMX7D_UART2_ROOT_CLK>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- sai1: sai@308a0000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
- reg = <0x308a0000 0x10000>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_SAI1_IPG_CLK>,
- <&clks IMX7D_SAI1_ROOT_CLK>,
- <&clks IMX7D_CLK_DUMMY>,
- <&clks IMX7D_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dma-names = "rx", "tx";
- dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
- status = "disabled";
- };
+ uart3: serial@30880000 {
+ compatible = "fsl,imx7d-uart",
+ "fsl,imx6q-uart";
+ reg = <0x30880000 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_UART3_ROOT_CLK>,
+ <&clks IMX7D_UART3_ROOT_CLK>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
- sai2: sai@308b0000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
- reg = <0x308b0000 0x10000>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_SAI2_IPG_CLK>,
- <&clks IMX7D_SAI2_ROOT_CLK>,
- <&clks IMX7D_CLK_DUMMY>,
- <&clks IMX7D_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dma-names = "rx", "tx";
- dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
- status = "disabled";
- };
+ sai1: sai@308a0000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
+ reg = <0x308a0000 0x10000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_SAI1_IPG_CLK>,
+ <&clks IMX7D_SAI1_ROOT_CLK>,
+ <&clks IMX7D_CLK_DUMMY>,
+ <&clks IMX7D_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "rx", "tx";
+ dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
+ status = "disabled";
+ };
- sai3: sai@308c0000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
- reg = <0x308c0000 0x10000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX7D_SAI3_IPG_CLK>,
- <&clks IMX7D_SAI3_ROOT_CLK>,
- <&clks IMX7D_CLK_DUMMY>,
- <&clks IMX7D_CLK_DUMMY>;
- clock-names = "bus", "mclk1", "mclk2", "mclk3";
- dma-names = "rx", "tx";
- dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
- status = "disabled";
+ sai2: sai@308b0000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
+ reg = <0x308b0000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_SAI2_IPG_CLK>,
+ <&clks IMX7D_SAI2_ROOT_CLK>,
+ <&clks IMX7D_CLK_DUMMY>,
+ <&clks IMX7D_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "rx", "tx";
+ dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
+ status = "disabled";
+ };
+
+ sai3: sai@308c0000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
+ reg = <0x308c0000 0x10000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_SAI3_IPG_CLK>,
+ <&clks IMX7D_SAI3_ROOT_CLK>,
+ <&clks IMX7D_CLK_DUMMY>,
+ <&clks IMX7D_CLK_DUMMY>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "rx", "tx";
+ dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
+ status = "disabled";
+ };
};
+ crypto: caam@30900000 {
+ compatible = "fsl,sec-v4.0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30900000 0x40000>;
+ ranges = <0 0x30900000 0x40000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_CAAM_CLK>,
+ <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
+ clock-names = "ipg", "aclk";
+
+ sec_jr0: jr0@1000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x1000 0x1000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr1: jr1@2000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x2000 0x1000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr2: jr1@3000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x3000 0x1000>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
flexcan1: can@30a00000 {
compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
reg = <0x30a00000 0x10000>;