staging: comedi: ni_tio_internal.h: replace NITIO_Gi_Second_Gate_Reg()
authorH Hartley Sweeten <hsweeten@visionengravers.com>
Thu, 19 Dec 2013 23:31:42 +0000 (16:31 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 20 Dec 2013 19:49:32 +0000 (11:49 -0800)
The "Second Gate" registers are sequential in the enum ni_gpct_register.
Replace this inline CamelCase function with a simple define.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/comedi/drivers/ni_tio.c
drivers/staging/comedi/drivers/ni_tio_internal.h

index f79140563901e68f939b58d224426aa8b13e0d1f..5203103084fcc4aa008ca9db8c85aa1a899e5ba3 100644 (file)
@@ -403,13 +403,13 @@ void ni_tio_init_counter(struct ni_gpct *counter)
        }
        if (ni_tio_second_gate_registers_present(counter_dev)) {
                counter_dev->
-                   regs[NITIO_Gi_Second_Gate_Reg(counter->counter_index)] =
+                   regs[NITIO_GATE2_REG(counter->counter_index)] =
                    0x0;
                write_register(counter,
                               counter_dev->
-                              regs[NITIO_Gi_Second_Gate_Reg
+                              regs[NITIO_GATE2_REG
                                    (counter->counter_index)],
-                              NITIO_Gi_Second_Gate_Reg(counter->
+                              NITIO_GATE2_REG(counter->
                                                        counter_index));
        }
        ni_tio_set_bits(counter,
@@ -718,7 +718,7 @@ static void ni_tio_set_source_subselect(struct ni_gpct *counter,
 {
        struct ni_gpct_device *counter_dev = counter->counter_dev;
        const unsigned second_gate_reg =
-           NITIO_Gi_Second_Gate_Reg(counter->counter_index);
+           NITIO_GATE2_REG(counter->counter_index);
 
        if (counter_dev->variant != ni_gpct_variant_m_series)
                return;
@@ -828,7 +828,7 @@ static unsigned ni_m_series_clock_src_select(const struct ni_gpct *counter)
 {
        struct ni_gpct_device *counter_dev = counter->counter_dev;
        const unsigned second_gate_reg =
-           NITIO_Gi_Second_Gate_Reg(counter->counter_index);
+           NITIO_GATE2_REG(counter->counter_index);
        unsigned clock_source = 0;
        unsigned i;
        const unsigned input_select = (ni_tio_get_soft_copy(counter,
@@ -1136,7 +1136,7 @@ static int ni_660x_set_second_gate(struct ni_gpct *counter,
 {
        struct ni_gpct_device *counter_dev = counter->counter_dev;
        const unsigned second_gate_reg =
-           NITIO_Gi_Second_Gate_Reg(counter->counter_index);
+           NITIO_GATE2_REG(counter->counter_index);
        const unsigned selected_second_gate = CR_CHAN(gate_source);
        /* bits of second_gate that may be meaningful to second gate register */
        static const unsigned selected_second_gate_mask = 0x1f;
@@ -1195,7 +1195,7 @@ static int ni_m_series_set_second_gate(struct ni_gpct *counter,
 {
        struct ni_gpct_device *counter_dev = counter->counter_dev;
        const unsigned second_gate_reg =
-           NITIO_Gi_Second_Gate_Reg(counter->counter_index);
+           NITIO_GATE2_REG(counter->counter_index);
        const unsigned selected_second_gate = CR_CHAN(gate_source);
        /* bits of second_gate that may be meaningful to second gate register */
        static const unsigned selected_second_gate_mask = 0x1f;
@@ -1223,7 +1223,7 @@ int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned gate_index,
 {
        struct ni_gpct_device *counter_dev = counter->counter_dev;
        const unsigned second_gate_reg =
-           NITIO_Gi_Second_Gate_Reg(counter->counter_index);
+           NITIO_GATE2_REG(counter->counter_index);
 
        switch (gate_index) {
        case 0:
@@ -1495,7 +1495,7 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
                                                        (counter->
                                                         counter_index));
        const unsigned second_gate_reg =
-           NITIO_Gi_Second_Gate_Reg(counter->counter_index);
+           NITIO_GATE2_REG(counter->counter_index);
        unsigned gate_select_bits;
 
        switch (gate_index) {
index 0a4809accfe782c68b882c9e1a2f257df9adc0fa..1ef5f35f4049c1be02d5f742b386ba8eb787a4f5 100644 (file)
@@ -29,6 +29,7 @@
 #define NITIO_LOADB_REG(x)             (NITIO_G0_LOADB + (x))
 #define NITIO_INPUT_SEL_REG(x)         (NITIO_G0_INPUT_SEL + (x))
 #define NITIO_CNT_MODE_REG(x)          (NITIO_G0_CNT_MODE + (x))
+#define NITIO_GATE2_REG(x)             (NITIO_G0_GATE2 + (x))
 
 static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx)
 {
@@ -82,21 +83,6 @@ static inline enum ni_gpct_register NITIO_Gxx_Status_Reg(unsigned idx)
        return 0;
 }
 
-static inline enum ni_gpct_register NITIO_Gi_Second_Gate_Reg(unsigned idx)
-{
-       switch (idx) {
-       case 0:
-               return NITIO_G0_GATE2;
-       case 1:
-               return NITIO_G1_GATE2;
-       case 2:
-               return NITIO_G2_GATE2;
-       case 3:
-               return NITIO_G3_GATE2;
-       }
-       return 0;
-}
-
 static inline enum ni_gpct_register NITIO_Gi_DMA_Config_Reg(unsigned idx)
 {
        switch (idx) {