Since the vast majority of GPIO I2C implementations behave the same way,
support the common GPIO framework with default settings.
This adds two new defines CONFIG_SOFT_I2C_GPIO_{SCL,SDA} so that boards
which want GPIO I2C support need only define these.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
#define I2C_DELAY udelay(2)
+ CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
+
+ If your arch supports the generic GPIO framework (asm/gpio.h),
+ then you may alternatively define the two GPIOs that are to be
+ used as SCL / SDA. Any of the previous I2C_xxx macros will
+ have GPIO-based defaults assigned to them as appropriate.
+
+ You should define these to the GPIO value as given directly to
+ the generic GPIO functions.
+
CONFIG_SYS_I2C_INIT_BOARD
When a board is reset during an i2c bus transfer
#endif
#include <i2c.h>
+#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
+# include <asm/gpio.h>
+
+# ifndef I2C_GPIO_SYNC
+# define I2C_GPIO_SYNC
+# endif
+
+# ifndef I2C_INIT
+# define I2C_INIT \
+ do { \
+ gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
+ gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
+ } while (0)
+# endif
+
+# ifndef I2C_ACTIVE
+# define I2C_ACTIVE do { } while (0)
+# endif
+
+# ifndef I2C_TRISTATE
+# define I2C_TRISTATE do { } while (0)
+# endif
+
+# ifndef I2C_READ
+# define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
+# endif
+
+# ifndef I2C_SDA
+# define I2C_SDA(bit) \
+ do { \
+ if (bit) \
+ gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
+ else \
+ gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
+ I2C_GPIO_SYNC; \
+ } while (0)
+# endif
+
+# ifndef I2C_SCL
+# define I2C_SCL(bit) \
+ do { \
+ gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
+ I2C_GPIO_SYNC; \
+ } while (0)
+# endif
+
+# ifndef I2C_DELAY
+# define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+# endif
+
+#endif
+
/* #define DEBUG_I2C */
#ifdef DEBUG_I2C