obj-$(CONFIG_ARCH_P1023) += p1023_serdes.o
obj-$(CONFIG_ARCH_P1024) += p1021_serdes.o
obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o
-obj-$(CONFIG_P2010) += p2020_serdes.o
obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o
obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
obj-$(CONFIG_PPC_P3041) += p3041_serdes.o
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A005125
-/* P2010 is single core version of P2020 */
-#elif defined(CONFIG_P2010)
-#define CONFIG_MAX_CPUS 1
-#define CONFIG_SYS_FSL_NUM_LAWS 12
-#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
-#define CONFIG_SYS_FSL_SEC_COMPAT 2
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
-#define CONFIG_SYS_FSL_ERRATUM_A004508
-#define CONFIG_SYS_FSL_ERRATUM_A005125
-
#elif defined(CONFIG_ARCH_P2020)
#define CONFIG_MAX_CPUS 2
#define CONFIG_SYS_FSL_NUM_LAWS 12
P1022DS config_sram_p1022ds.dat
P2020DS config_sram_p2020ds.dat
-P2010DS config_sram_p2020ds.dat
P1020RDB config_ddr2_1g_p1020rdb_533M.dat
P1020RDB config_ddr2_1g_p1020rdb_667M.dat
P2020RDB config_ddr2_1g_p2020rdb_800M.dat
P2020RDB config_ddr2_1g_p2020rdb_667M.dat
P2020RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat
-P2010RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat
P1020RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
P1011RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
P1010RDB config_ddr3_1gb_p1010rdb_800M.dat