only parses the 'fsl,pins' property and configures related
registers.
+config PINCTRL_IMX8M
+ bool "IMX8M pinctrl driver"
+ depends on ARCH_IMX8M && PINCTRL_FULL
+ select DEVRES
+ select PINCTRL_IMX
+ help
+ Say Y here to enable the imx8m pinctrl driver
+
+ This provides a simple pinctrl driver for i.MX8M SoC familiy.
+ This feature depends on device tree configuration. This driver
+ is different from the linux one, this is a simple implementation,
+ only parses the 'fsl,pins' property and configure related
+ registers.
+
config PINCTRL_VYBRID
bool "Vybrid (vf610) pinctrl driver"
depends on ARCH_VF610 && PINCTRL_FULL
obj-$(CONFIG_PINCTRL_IMX7ULP) += pinctrl-imx7ulp.o
obj-$(CONFIG_PINCTRL_IMX_SCU) += pinctrl-scu.o
obj-$(CONFIG_PINCTRL_IMX8) += pinctrl-imx8.o
+obj-$(CONFIG_PINCTRL_IMX8M) += pinctrl-imx8m.o
obj-$(CONFIG_PINCTRL_VYBRID) += pinctrl-vf610.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+
+#include "pinctrl-imx.h"
+
+static struct imx_pinctrl_soc_info imx8mq_pinctrl_soc_info;
+
+static int imx8mq_pinctrl_probe(struct udevice *dev)
+{
+ struct imx_pinctrl_soc_info *info =
+ (struct imx_pinctrl_soc_info *)dev_get_driver_data(dev);
+
+ return imx_pinctrl_probe(dev, info);
+}
+
+static const struct udevice_id imx8m_pinctrl_match[] = {
+ { .compatible = "fsl,imx8mq-iomuxc", .data = (ulong)&imx8mq_pinctrl_soc_info },
+ { .compatible = "fsl,imx8mm-iomuxc", .data = (ulong)&imx8mq_pinctrl_soc_info },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(imx8mq_pinctrl) = {
+ .name = "imx8mq-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = of_match_ptr(imx8m_pinctrl_match),
+ .probe = imx8mq_pinctrl_probe,
+ .remove = imx_pinctrl_remove,
+ .priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv),
+ .ops = &imx_pinctrl_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};