EDAC/amd64: Recognize x16 symbol size

Future AMD systems may support x16 symbol sizes.

Recognize if a system is using x16 symbol size. Also, simplify the print
statement.

Note that a x16 syndrome vector table is not necessary like with x4 or
x8 syndromes. This is because systems that support x16 symbol sizes are
SMCA systems and in that case, the syndrome can be directly extracted
from the MCA_SYND[Syndrome] field.

 [ bp: massage. ]

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Kim Phillips <kim.phillips@amd.com>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: https://lkml.kernel.org/r/20190228153558.127292-4-Yazen.Ghannam@amd.com

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 54acd3a7acdc1f397160b486e72c762addd28c90..1457919cb3b5905f4c7cd2072d3019fb062f6ab9 100644 (file)
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -900,8 +900,7 @@ static void dump_misc_regs(struct amd64_pvt *pvt)
 
        edac_dbg(1, "  DramHoleValid: %s\n", dhar_valid(pvt) ? "yes" : "no");
 
-       amd64_info("using %s syndromes.\n",
-                       ((pvt->ecc_sym_sz == 8) ? "x8" : "x4"));
+       amd64_info("using x%u syndromes.\n", pvt->ecc_sym_sz);
 }
 
 /*
@@ -2612,17 +2611,17 @@ static void determine_ecc_sym_sz(struct amd64_pvt *pvt)
 
                for_each_umc(i) {
                        /* Check enabled channels only: */
-                       if ((pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) &&
-                           (pvt->umc[i].ecc_ctrl & BIT(7))) {
-                               pvt->ecc_sym_sz = 8;
-                               break;
+                       if (pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) {
+                               if (pvt->umc[i].ecc_ctrl & BIT(9)) {
+                                       pvt->ecc_sym_sz = 16;
+                                       return;
+                               } else if (pvt->umc[i].ecc_ctrl & BIT(7)) {
+                                       pvt->ecc_sym_sz = 8;
+                                       return;
+                               }
                        }
                }
-
-               return;
-       }
-
-       if (pvt->fam >= 0x10) {
+       } else if (pvt->fam >= 0x10) {
                u32 tmp;
 
                amd64_read_pci_cfg(pvt->F3, EXT_NB_MCA_CFG, &tmp);

diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 88ca6dc2d5df83003ef53bbe0162130b90365745..8f66472f7adc221ee5e4e6787f35547c663b8930 100644 (file)
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -364,7 +364,7 @@ struct amd64_pvt {
        u32 dct_sel_hi;         /* DRAM Controller Select High */
        u32 online_spare;       /* On-Line spare Reg */
 
-       /* x4 or x8 syndromes in use */
+       /* x4, x8, or x16 syndromes in use */
        u8 ecc_sym_sz;
 
        /* place to store error injection parameters prior to issue */