soc: bcm: brcmstb: pm: Add support for newer rev B3.0 controllers
authorDoug Berger <opendmb@gmail.com>
Fri, 11 May 2018 22:02:41 +0000 (15:02 -0700)
committerFlorian Fainelli <f.fainelli@gmail.com>
Tue, 26 Jun 2018 22:44:14 +0000 (15:44 -0700)
Update the Device Tree binding document and add a matching entry for the
MEMC DDR controller revision B3.0 which is found on chips like 7278A0
and newer.

Signed-off-by: Doug Berger <opendmb@gmail.com>
[florian: tweak commit message, make it apply to upstream kernel]
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
drivers/soc/bcm/brcmstb/pm/pm-arm.c

index c052caad36e806907988fa20e8250f2dce7d90d6..fb762059e68e05dd43bb7e615755cbd718e94c96 100644 (file)
@@ -190,6 +190,7 @@ Power-Down (SRPD), among other things.
 Required properties:
 - compatible     : should contain one of these
        "brcm,brcmstb-memc-ddr-rev-b.2.2"
+       "brcm,brcmstb-memc-ddr-rev-b.3.0"
        "brcm,brcmstb-memc-ddr"
 - reg            : the MEMC DDR register range
 
index dcf8c8065508e0ddf8d182a909bfa401ac916e79..ade724677238ce8be7c031cf6886d55b08ca5770 100644 (file)
@@ -631,6 +631,10 @@ static const struct of_device_id brcmstb_memc_of_match[] = {
                .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.2",
                .data = &ddr_seq_b22,
        },
+       {
+               .compatible = "brcm,brcmstb-memc-ddr-rev-b.3.0",
+               .data = &ddr_seq_b22,
+       },
        {
                .compatible = "brcm,brcmstb-memc-ddr",
                .data = &ddr_seq,